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Brnch:pre master Trgt:chisel
Time elapsed: 35 minutes, 12 seconds
Flags: --multifile=4 --instrument --synth
Chisel.Unit.ArbitraryLambda: Pass
Chisel.Unit.BasicCondFSM: Pass
Chisel.Unit.BasicFSM: Pass
Chisel.Unit.BlockReduce1D: Pass
Chisel.Unit.BlockReduce2D: Pass
Chisel.Unit.Breakpoint: Pass
Chisel.Unit.BubbledWriteTest: Pass
Chisel.Unit.ChangingCtrMax: Pass
Chisel.Unit.CompactingFifo: Pass
Chisel.Unit.CtrlEnable: Pass
Chisel.Unit.DeviceMemcpy: Pass
Chisel.Unit.DiagBanking: Pass
Chisel.Unit.DotProductFSM: Pass
Chisel.Unit.FifoLoadSRAMStore: Pass
Chisel.Unit.FifoLoadStore: Pass
Chisel.Unit.FifoPushPop: Pass
Chisel.Unit.FifoStackFSM: Pass
Chisel.Unit.FixPtInOutArg: Pass
Chisel.Unit.FixPtMem: Pass
Chisel.Unit.FloatBasics: Pass
Chisel.Unit.IndirectLoad: Pass
Chisel.Unit.InOutArg: Pass
Chisel.Unit.LaneMaskPar: Pass
Chisel.Unit.LittleTypeTest: Pass
Chisel.Unit.LUTTest: Pass
Chisel.Unit.MaskedWrite: Pass
Chisel.Unit.Memcpy2D: Pass
Chisel.Unit.MemTest1D: Pass
Chisel.Unit.MemTest2D: Pass
Chisel.Unit.MixedIOTest: Pass
Chisel.Unit.MultiWriteBuffer: Pass
Chisel.Unit.Niter: Pass
Chisel.Unit.OHM: Pass
Chisel.Unit.PageBoundaryTest: Pass
Chisel.Unit.ParFifoLoad: Pass
Chisel.Unit.RetimedFifoBranch: Pass
Chisel.Unit.SequentialWrites: Pass
Chisel.Unit.SimpleFold: Pass
Chisel.Unit.SimpleMemReduce: Pass
Chisel.Unit.SimpleReduce: Pass
Chisel.Unit.SimpleSequential: Pass
Chisel.Unit.SimpleTileLoadStore: Pass
Chisel.Unit.SmallTensorLoad: Pass
Chisel.Unit.SpecialMath: Pass
Chisel.Unit.SSV1D: Pass
Chisel.Unit.SSV2D: Pass
Chisel.Unit.StackLoadStore: Pass
Chisel.Unit.StridedLoad: Pass
Chisel.Unit.Tensor3D: Pass
Chisel.Unit.Tensor4D: Pass
Chisel.Unit.Tensor5D: Pass
Chisel.Unit.UnalignedFifoLoad: Pass
Chisel.Unit.UnalignedLd: Pass
Chisel.Unit.UnalignedTileLoadStore: Pass
Chisel.Unit.UniqueParallelLoad: Pass
Chisel.Dense.AES: Pass
Chisel.Dense.BlockReduce1D: Pass
Chisel.Dense.BTC: Pass
Chisel.Dense.Convolution_FPGA: Pass
Chisel.Dense.Differentiator: Pass
Chisel.Dense.DotProduct: Pass
Chisel.Dense.EdgeDetector: Pass
Chisel.Dense.FFT_Strided: Pass
Chisel.Dense.FFT_Transpose: Pass
Chisel.Dense.FixPtMem: Pass
Chisel.Dense.FloatBasics: Pass
Chisel.Dense.GDA: Pass
Chisel.Dense.GEMM_Blocked: Pass
Chisel.Dense.GEMM_NCubed: Pass
Chisel.Dense.Gibbs_Ising2D: Pass
Chisel.Dense.JPEG_Decompress: Pass
Chisel.Dense.JPEG_Markers: Pass
Chisel.Dense.Kmeans: Pass
Chisel.Dense.KMP: Pass
Chisel.Dense.MatMult_inner: Pass
Chisel.Dense.MatMult_outer: Pass
Chisel.Dense.MD_Grid: Pass
Chisel.Dense.MD_KNN: Pass
Chisel.Dense.MultiplexedWriteTest: Pass
Chisel.Dense.Niter: Pass
Chisel.Dense.NW: Pass
Chisel.Dense.OuterProduct: Pass
Chisel.Dense.SGD_minibatch: Pass
Chisel.Dense.SGD: Pass
Chisel.Dense.SHA1: Pass
Chisel.Dense.SimpleRowStridedConv: Pass
Chisel.Dense.Sobel: Pass
Chisel.Dense.Sort_Merge: Pass
Chisel.Dense.Sort_Radix: Pass
Chisel.Dense.Stencil2D: Pass
Chisel.Dense.Stencil3D: Pass
Chisel.Dense.SVRG: Pass
Chisel.Dense.SW: Pass
Chisel.Dense.SYRK_col: Pass
Chisel.Dense.Tensor3D: Pass
Chisel.Dense.Tensor4D: Pass
Chisel.Dense.Tensor5D: Pass
Chisel.Dense.TPCHQ6: Pass
Chisel.Dense.TRSM: Pass
Chisel.Dense.Viterbi: Pass
Chisel.Sparse.BFS_Bulk: Pass
Chisel.Sparse.BFS_Queue: Pass
Chisel.Sparse.GatherStore: Pass
Chisel.Sparse.PageRank_Bulk: Pass
Chisel.Sparse.PageRank: Pass
Chisel.Sparse.ScatterGather: Pass
Chisel.Sparse.SPMV_CRS: Pass
Chisel.Sparse.SPMV_ELL: Pass
Chisel.Fixme.Backprop: Pass
Spatial commit
commit 3e71b980eb1ef1abbc5f4a080184b345b2fc9c88
Merge: d5aa994 01fb7a0
Author: Matthew Feldman <[email protected]>
Date: Tue Feb 27 09:56:33 2018 -0800
Merge remote-tracking branch 'origin/pre-master'
commit 01fb7a0107a2cf597264d41099c8e8cb54b741f2
Merge: 12f9de3 4bfc522
Author: Matthew Feldman <[email protected]>
Date: Tue Feb 27 09:56:13 2018 -0800
Merge remote-tracking branch 'origin/syncMem' into pre-master
commit 4bfc5227d7619b11d230503b15290b22e188cd7e
Author: Matthew Feldman <[email protected]>
Date: Tue Feb 27 09:55:08 2018 -0800
fix wrong quote
M spatial/core/src/spatial/codegen/chiselgen/ChiselGenController.scala
commit 2ab86172cccf1bf807dcb30c8f5d4863cd22cd89
Merge: 86c3a79 3addf50
Author: Matthew Feldman <[email protected]>
Date: Tue Feb 27 09:53:58 2018 -0800
Merge remote-tracking branch 'origin/retime' into syncMem
commit 3addf50eeb37ec6f71b56423aec9f5e4d651d036
Merge: 830ae83 86b262e
Author: Matthew Feldman <[email protected]>
Date: Tue Feb 27 09:53:39 2018 -0800
Merge remote-tracking branch 'origin/develop' into retime
commit 86b262ef2b673d136449594fabc1d9194933d006
Merge: 3305223 f7da90e
Author: Matthew Feldman <[email protected]>
Date: Tue Feb 27 09:53:22 2018 -0800
Merge remote-tracking branch 'origin/fpga' into develop
commit f7da90e1e63071c767e88d7f22fa1555bfd394bb
Author: Matthew Feldman <[email protected]>
Date: Tue Feb 27 09:53:01 2018 -0800
fix retime of length double in counter logic
M spatial/core/src/spatial/codegen/chiselgen/ChiselGenController.scala
Argon commit
commit d04edf8049fc5eb102c2519e4f0c1f2ff67339dc
Author: Matthew Feldman <[email protected]>
Date: Fri Feb 23 15:43:29 2018 -0800
change saturating and unbiased ops to conform to scala op priorities
M core/src/argon/emul/FixedPoint.scala
M core/src/argon/lang/FixPt.scala
Virtualized commit
commit 1a5adc8e9cd171f1a8c3f1f66dddbc04d89aa51f
Author: David Koeplinger <[email protected]>
Date: Fri Jul 21 17:15:08 2017 -0700
fix mistake in Structs
M src/org/virtualized/Structs.scala
Spatial-Apps commit
commit 74f2c6961d2463e36e35ff2037765075e9584565
Author: Matthew Feldman <[email protected]>
Date: Mon Feb 26 18:57:26 2018 -0800
make spechialmath a little harder to pass
M src/Regression.scala
M src/Training.scala
M src/UnitTests.scala
Creation Time- 2018-02-27_10-26-48 | Status- debug | Type- chisel | tests- all | User- mattfel | Origin- london | Destination- london | Branch- pre-master | Spatial- 3e71b | Argon- d04ed | Virtualized- 1a5ad | Spatial-apps- 74f2c