Merge pull request #50 from pulp-platform/lanes

Add support for 2, 8, 16 lanes
pulp-platform · Jul 16, 2021 · 990bf16 · 990bf16
2 parents 76305f1 + 9aa4f1f
commit 990bf16
Show file tree

Hide file tree

Showing 40 changed files with 1,425 additions and 409 deletions.
diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
@@ -145,11 +145,6 @@ jobs:
       if: steps.tc-verilator-cache.outputs.cache-hit != 'true'
       run: |
         git submodule update --init --recursive -- toolchain/verilator
-    - name: Install LLVM and Clang
-      if: steps.tc-verilator-cache.outputs.cache-hit != 'true'
-      uses: KyleMayes/install-llvm-action@v1
-      with:
-        version: "10.0"
     - name: Compile Verilator
       if: steps.tc-verilator-cache.outputs.cache-hit != 'true'
       run: |
@@ -169,6 +164,9 @@ jobs:
 
   compile-apps:
     runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        ara_config: [2_lanes, 4_lanes, 8_lanes, 16_lanes]
     needs: tc-llvm
     steps:
     - uses: actions/checkout@v2
@@ -183,15 +181,18 @@ jobs:
     - name: Untar LLVM
       run: tar xvf tc-llvm.tar
     - name: Compile applications
-      run: make -C apps
+      run: config=${{ matrix.ara_config }} make -C apps
     - name: Upload applications
       uses: actions/upload-artifact@v2
       with:
-        name: compile-apps
+        name: compile-apps-${{ matrix.ara_config }}
         path: apps/bin
 
   compile-riscv-tests:
     runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        ara_config: [2_lanes, 4_lanes, 8_lanes, 16_lanes]
     needs: ["tc-llvm", "tc-gcc", "tc-isa-sim"]
     steps:
     - uses: actions/checkout@v2
@@ -218,15 +219,18 @@ jobs:
     - name: Untar GCC
       run: tar xvf tc-gcc.tar
     - name: Compile applications
-      run: make -C apps riscv_tests
+      run: config=${{ matrix.ara_config }} make -C apps riscv_tests
     - name: Upload applications
       uses: actions/upload-artifact@v2
       with:
-        name: compile-riscv-tests
+        name: compile-riscv-tests-${{ matrix.ara_config }}
         path: apps/bin
 
   compile-ara:
     runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        ara_config: [2_lanes, 4_lanes, 8_lanes, 16_lanes]
     needs: ["tc-verilator", "tc-isa-sim"]
     steps:
     - uses: actions/checkout@v2
@@ -254,21 +258,17 @@ jobs:
         ln -s $VERILATOR_ROOT/share/verilator/bin/verilator_includer $VERILATOR_ROOT/bin/verilator_includer
     - name: Download RTL submodules
       run: git submodule update --init --recursive hardware
-    - name: Install LLVM and Clang
-      uses: KyleMayes/install-llvm-action@v1
-      with:
-        version: "10.0"
     - name: Compile Verilated model of Ara
       run: |
         sudo apt-get install libelf-dev
         make -C hardware apply-patches
-        make -C hardware verilate
+        config=${{ matrix.ara_config }} make -C hardware verilate
     - name: Tar Verilated model of Ara
       run: tar -cvf ara.tar hardware/build/verilator hardware/bender
     - name: Upload Ara Verilated model
       uses: actions/upload-artifact@v2
       with:
-        name: compile-ara
+        name: compile-ara-${{ matrix.ara_config }}
         path: ara.tar
 
 ####################
@@ -277,6 +277,9 @@ jobs:
 
   simulate-hello-world:
     runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        ara_config: [2_lanes, 4_lanes, 8_lanes, 16_lanes]
     needs: ["compile-ara", "compile-apps"]
     steps:
     - uses: actions/checkout@v2
@@ -289,19 +292,22 @@ jobs:
     - name: Get Verilated model of Ara
       uses: actions/download-artifact@v2
       with:
-        name: compile-ara
+        name: compile-ara-${{ matrix.ara_config }}
     - name: Untar Verilated model of Ara
       run: tar xvf ara.tar
     - name: Get applications
       uses: actions/download-artifact@v2
       with:
-        name: compile-apps
+        name: compile-apps-${{ matrix.ara_config }}
         path: apps/bin
     - name: Run test
-      run: make -C hardware app=hello_world simv
+      run: config=${{ matrix.ara_config }} make -C hardware app=hello_world simv
 
   simulate-imatmul:
     runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        ara_config: [2_lanes, 4_lanes, 8_lanes, 16_lanes]
     needs: ["compile-ara", "compile-apps"]
     steps:
     - uses: actions/checkout@v2
@@ -314,19 +320,22 @@ jobs:
     - name: Get Verilated model of Ara
       uses: actions/download-artifact@v2
       with:
-        name: compile-ara
+        name: compile-ara-${{ matrix.ara_config }}
     - name: Untar Verilated model of Ara
       run: tar xvf ara.tar
     - name: Get applications
       uses: actions/download-artifact@v2
       with:
-        name: compile-apps
+        name: compile-apps-${{ matrix.ara_config }}
         path: apps/bin
     - name: Run test
-      run: make -C hardware app=imatmul simv
+      run: config=${{ matrix.ara_config }} make -C hardware app=imatmul simv
 
   simulate-fmatmul:
     runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        ara_config: [2_lanes, 4_lanes, 8_lanes, 16_lanes]
     needs: ["compile-ara", "compile-apps"]
     steps:
     - uses: actions/checkout@v2
@@ -339,19 +348,22 @@ jobs:
     - name: Get Verilated model of Ara
       uses: actions/download-artifact@v2
       with:
-        name: compile-ara
+        name: compile-ara-${{ matrix.ara_config }}
     - name: Untar Verilated model of Ara
       run: tar xvf ara.tar
     - name: Get applications
       uses: actions/download-artifact@v2
       with:
-        name: compile-apps
+        name: compile-apps-${{ matrix.ara_config }}
         path: apps/bin
     - name: Run test
-      run: make -C hardware app=fmatmul simv
+      run: config=${{ matrix.ara_config }} make -C hardware app=fmatmul simv
 
   simulate-conv2d:
     runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        ara_config: [2_lanes, 4_lanes, 8_lanes, 16_lanes]
     needs: ["compile-ara", "compile-apps"]
     steps:
     - uses: actions/checkout@v2
@@ -364,23 +376,26 @@ jobs:
     - name: Get Verilated model of Ara
       uses: actions/download-artifact@v2
       with:
-        name: compile-ara
+        name: compile-ara-${{ matrix.ara_config }}
     - name: Untar Verilated model of Ara
       run: tar xvf ara.tar
     - name: Get applications
       uses: actions/download-artifact@v2
       with:
-        name: compile-apps
+        name: compile-apps-${{ matrix.ara_config }}
         path: apps/bin
     - name: Run test
-      run: make -C hardware app=conv2d simv
+      run: config=${{ matrix.ara_config }} make -C hardware app=conv2d simv
 
 ########################
 #  RISC-V Tests stage  #
 ########################
 
   riscv-tests-simv:
     runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        ara_config: [2_lanes, 4_lanes, 8_lanes, 16_lanes]
     needs: ["compile-ara", "compile-riscv-tests"]
     steps:
     - uses: actions/checkout@v2
@@ -393,16 +408,16 @@ jobs:
     - name: Get Verilated model of Ara
       uses: actions/download-artifact@v2
       with:
-        name: compile-ara
+        name: compile-ara-${{ matrix.ara_config }}
     - name: Untar Verilated model of Ara
       run: tar xvf ara.tar
     - name: Get RISC-V tests
       uses: actions/download-artifact@v2
       with:
-        name: compile-riscv-tests
+        name: compile-riscv-tests-${{ matrix.ara_config }}
         path: apps/bin
     - name: Run tests
-      run: make -C hardware -j4 riscv_tests_simv
+      run: config=${{ matrix.ara_config }} make -C hardware -j4 riscv_tests_simv
 
   riscv-tests-spike:
     runs-on: ubuntu-latest
@@ -518,7 +533,21 @@ jobs:
             tc-gcc
             tc-isa-sim
             tc-verilator
-            compile-ara
-            compile-apps
-            compile-riscv-tests
             riscv-tests-spike
+
+  clean-up-compile-runs:
+    runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        ara_config: [2_lanes, 4_lanes, 8_lanes, 16_lanes]
+    if: always()
+    needs: ["simulate-hello-world", "simulate-imatmul", "simulate-fmatmul", "simulate-conv2d", "riscv-tests-spike", "riscv-tests-simv"]
+    steps:
+      - uses: actions/checkout@v2
+      - name: Delete artifacts
+        uses: geekyeggo/delete-artifact@v1
+        with:
+          name: |
+            compile-ara-${{ matrix.ara_config }}
+            compile-apps-${{ matrix.ara_config }}
+            compile-riscv-tests-${{ matrix.ara_config }}
diff --git a/Bender.lock b/Bender.lock
@@ -1,17 +1,16 @@
 ---
 packages:
   axi:
-    revision: b7d2b0b629dc2bf44789f7e993f757bfc7961b3f
-    version: ~
+    revision: 442ff3375710513623f95944d66cc2bd09b2f155
+    version: 0.29.1
     source:
       Git: "https://github.com/pulp-platform/axi.git"
     dependencies:
       - common_cells
       - common_verification
-      - tech_cells_generic
   common_cells:
-    revision: 6aeee85d0a34fedc06c14f04fd6363c9f7b4eeea
-    version: 1.21.0
+    revision: 015917ff33e5f944e866814f72f2074fb0f4220f
+    version: 1.22.1
     source:
       Git: "https://github.com/pulp-platform/common_cells.git"
     dependencies:
@@ -24,7 +23,7 @@ packages:
       Git: "https://github.com/pulp-platform/common_verification.git"
     dependencies: []
   cva6:
-    revision: 91e6745380ccd371b2b346e5c9382cf45c6413d3
+    revision: 3245e44ec49c1cdcd19eb298cd81f0672eaf81ca
     version: ~
     source:
       Git: "https://github.com/pulp-platform/cva6.git"

diff --git a/Bender.yml b/Bender.yml
@@ -8,14 +8,17 @@ package:
     - "Paul Scheffler <[email protected]>"
 
 dependencies:
-  axi:                { git: "https://github.com/pulp-platform/axi.git",                rev: axi_llc    }
-  common_cells:       { git: "https://github.com/pulp-platform/common_cells.git",       version: 1.19.0 }
+  axi:                { git: "https://github.com/pulp-platform/axi.git",                version: 0.29.1 }
+  common_cells:       { git: "https://github.com/pulp-platform/common_cells.git",       version: 1.22.1 }
   cva6:               { git: "https://github.com/pulp-platform/cva6.git",               rev: acc_port   }
   tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.1  }
 
 workspace:
   checkout_dir: "hardware/deps"
 
+export_include_dirs:
+  - hardware/include
+
 sources:
   files:
     # Headers
@@ -24,6 +27,7 @@ sources:
 
     # Sources
     # Level 1
+    - hardware/src/axi_to_mem.sv
     - hardware/src/ctrl_registers.sv
     - hardware/src/cva6_accel_first_pass_decoder.sv
     - hardware/src/ara_dispatcher.sv

diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -6,13 +6,29 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.
 
 ## [Unreleased]
 
+### Fixed
+
+- Fix calculation of `vstu`'s vector length
+- Fix `vslideup` and `vslidedown` operand's vector length trimming
+- Mute mask requests on idle lanes
+- Mute instructions with vector length zero on the respective `lane_sequencer` and `operand_requester`
+- Fix `simd_div`'s offset calculation
+- Delay acknowledgment of memory requests if the `axi_inval_filter` is busy
+
 ### Added
 
 - Format source files in the `apps` folder with clang-format by running `make format`
+- Support for the `2_lanes`, `8_lanes`, and `16_lanes` configurations, besides the default `4_lanes` one
 
 ### Changed
 
 - Compile Verilator and Ara's verilated model with LLVM, for a faster compile time.
+- Verilator updated to version v4.210.
+- Verilation is done with a hierarchical verilation flow
+- Replace `ara_soc`'s LLC with a simple main memory
+- Reduce number of words on the main memory, for faster Verilation
+- Update `common_cells` to v1.22.1
+- Update `axi` to v0.29.1
 
 ## 2.0.0 - 2021-06-24
 

diff --git a/Makefile b/Makefile
@@ -24,7 +24,7 @@ GCC_INSTALL_DIR     ?= ${INSTALL_DIR}/riscv-gcc
 LLVM_INSTALL_DIR    ?= ${INSTALL_DIR}/riscv-llvm
 ISA_SIM_INSTALL_DIR ?= ${INSTALL_DIR}/riscv-isa-sim
 VERIL_INSTALL_DIR   ?= ${INSTALL_DIR}/verilator
-VERIL_VERSION       ?= v4.106
+VERIL_VERSION       ?= v4.210
 
 CMAKE ?= cmake
 
@@ -37,6 +37,17 @@ ifeq ($(origin CXX),default)
 CXX    = g++
 endif
 
+# We need a recent LLVM to compile Verilator
+CLANG_CC  ?= clang
+CLANG_CXX ?= clang++
+ifneq (${CLANG_PATH},)
+	CLANG_CXXFLAGS := "-nostdinc++ -isystem $(CLANG_PATH)/include/c++/v1"
+	CLANG_LDFLAGS  := "-L $(CLANG_PATH)/lib -Wl,-rpath,$(CLANG_PATH)/lib -lc++ -nostdlib++"
+else
+	CLANG_CXXFLAGS := ""
+	CLANG_LDFLAGS  := ""
+endif
+
 # Default target
 all: toolchains riscv-isa-sim verilator
 
@@ -131,7 +142,8 @@ ${VERIL_INSTALL_DIR}: Makefile
 	cd $(CURDIR)/toolchain/verilator && git reset --hard && git fetch && git checkout ${VERIL_VERSION}
 	# Compile verilator
 	cd $(CURDIR)/toolchain/verilator && git clean -xfdf && autoconf && \
-	CC=clang CXX=clang++ ./configure --prefix=$(VERIL_INSTALL_DIR) && make -j4 && make install
+	CC=$(CLANG_CC) CXX=$(CLANG_CXX) CXXFLAGS=$(CLANG_CXXFLAGS) LDFLAGS=$(CLANG_LDFLAGS) \
+		./configure --prefix=$(VERIL_INSTALL_DIR) && make -j8 && make install
 
 # RISC-V Tests
 riscv_tests:

diff --git a/README.md b/README.md
@@ -60,9 +60,11 @@ make verilator
 
 ## Configuration
 
-Ara's parameters are centralized in the `config` folder, in the `config.mk` file.
+Ara's parameters are centralized in the `config` folder, which provides several configurations to the vector machine.
 Please check `config/README.md` for more details.
 
+Prepend `config=chosen_ara_configuration` to your Makefile commands, or export the `ARA_CONFIGURATION` variable, to chose a configuration other than the `default` one.
+
 ## Software
 
 ### Build Applications

diff --git a/apps/.gitignore b/apps/.gitignore
@@ -1 +1,2 @@
 bin
+common/link.ld