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Updating prim names #7

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merged 1 commit into from
Aug 3, 2022
Merged

Updating prim names #7

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56 changes: 28 additions & 28 deletions cells/addf/gf180mcu_fd_sc_mcu7t5v0__addf_1.cdl
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -13,32 +13,32 @@
* limitations under the License.

.SUBCKT gf180mcu_fd_sc_mcu7t5v0__addf_1 A B CI CO S VDD VNW VPW VSS
M_M51 VSS net9 S VPW nmos_5p0 W=7.1e-07 L=6e-07
M_M46 net9 CI net47 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M45 net42 CI VSS VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M34 CO net7 VSS VPW nmos_5p0 W=8.15e-07 L=6e-07
M_M33 VDD net9 S VNW pmos_5p0 W=1.215e-06 L=5e-07
M_M28 net9 CI net29 VNW pmos_5p0 W=6.6e-07 L=5e-07
M_M24 net9 net7 net3 VNW pmos_5p0 W=6.6e-07 L=5e-07
M_M25 net3 A VDD VNW pmos_5p0 W=6.6e-07 L=5e-07
M_M26 VDD B net3 VNW pmos_5p0 W=6.6e-07 L=5e-07
M_M27 net3 CI VDD VNW pmos_5p0 W=6.6e-07 L=5e-07
M_M21 net7 CI net1 VNW pmos_5p0 W=7e-07 L=5e-07
M_M20 net19 B net7 VNW pmos_5p0 W=7e-07 L=5e-07
M_M18 VDD A net19 VNW pmos_5p0 W=7e-07 L=5e-07
M_M17 CO net7 VDD VNW pmos_5p0 W=1.215e-06 L=5e-07
M_M48 net47 B net49 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M41 net9 net7 net42 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M43 net42 A VSS VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M44 VSS B net42 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M38 net7 CI net5 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M37 net36 B net7 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M35 VSS A net36 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M30 net29 B net31 VNW pmos_5p0 W=6.6e-07 L=5e-07
M_M23 VDD B net1 VNW pmos_5p0 W=7e-07 L=5e-07
M_M22 net1 A VDD VNW pmos_5p0 W=7e-07 L=5e-07
M_M50 net49 A VSS VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M40 VSS B net5 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M39 net5 A VSS VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M32 net31 A VDD VNW pmos_5p0 W=6.6e-07 L=5e-07
M_M51 VSS net9 S VPW nfet_05v0 W=7.1e-07 L=6e-07
M_M46 net9 CI net47 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M45 net42 CI VSS VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M34 CO net7 VSS VPW nfet_05v0 W=8.15e-07 L=6e-07
M_M33 VDD net9 S VNW pfet_05v0 W=1.215e-06 L=5e-07
M_M28 net9 CI net29 VNW pfet_05v0 W=6.6e-07 L=5e-07
M_M24 net9 net7 net3 VNW pfet_05v0 W=6.6e-07 L=5e-07
M_M25 net3 A VDD VNW pfet_05v0 W=6.6e-07 L=5e-07
M_M26 VDD B net3 VNW pfet_05v0 W=6.6e-07 L=5e-07
M_M27 net3 CI VDD VNW pfet_05v0 W=6.6e-07 L=5e-07
M_M21 net7 CI net1 VNW pfet_05v0 W=7e-07 L=5e-07
M_M20 net19 B net7 VNW pfet_05v0 W=7e-07 L=5e-07
M_M18 VDD A net19 VNW pfet_05v0 W=7e-07 L=5e-07
M_M17 CO net7 VDD VNW pfet_05v0 W=1.215e-06 L=5e-07
M_M48 net47 B net49 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M41 net9 net7 net42 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M43 net42 A VSS VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M44 VSS B net42 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M38 net7 CI net5 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M37 net36 B net7 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M35 VSS A net36 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M30 net29 B net31 VNW pfet_05v0 W=6.6e-07 L=5e-07
M_M23 VDD B net1 VNW pfet_05v0 W=7e-07 L=5e-07
M_M22 net1 A VDD VNW pfet_05v0 W=7e-07 L=5e-07
M_M50 net49 A VSS VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M40 VSS B net5 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M39 net5 A VSS VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M32 net31 A VDD VNW pfet_05v0 W=6.6e-07 L=5e-07
.ENDS
64 changes: 32 additions & 32 deletions cells/addf/gf180mcu_fd_sc_mcu7t5v0__addf_2.cdl
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -13,36 +13,36 @@
* limitations under the License.

.SUBCKT gf180mcu_fd_sc_mcu7t5v0__addf_2 A B CI CO S VDD VNW VPW VSS
M_M51_17 VSS net9 S VPW nmos_5p0 W=8.15e-07 L=6e-07
M_M51 VSS net9 S VPW nmos_5p0 W=8.15e-07 L=6e-07
M_M46 net9 CI net47 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M45 net42 CI VSS VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M34 CO net7 VSS VPW nmos_5p0 W=8.15e-07 L=6e-07
M_M34_25 CO net7 VSS VPW nmos_5p0 W=8.15e-07 L=6e-07
M_M33_12 VDD net9 S VNW pmos_5p0 W=1.12e-06 L=5e-07
M_M33 VDD net9 S VNW pmos_5p0 W=1.12e-06 L=5e-07
M_M28 net9 CI net29 VNW pmos_5p0 W=6.8e-07 L=5e-07
M_M24 net9 net7 net3 VNW pmos_5p0 W=6.8e-07 L=5e-07
M_M25 net3 A VDD VNW pmos_5p0 W=6.8e-07 L=5e-07
M_M26 VDD B net3 VNW pmos_5p0 W=6.8e-07 L=5e-07
M_M27 net3 CI VDD VNW pmos_5p0 W=6.8e-07 L=5e-07
M_M21 net7 CI net1 VNW pmos_5p0 W=7.8e-07 L=5e-07
M_M20 net19 B net7 VNW pmos_5p0 W=7.8e-07 L=5e-07
M_M18 VDD A net19 VNW pmos_5p0 W=7.8e-07 L=5e-07
M_M17 CO net7 VDD VNW pmos_5p0 W=1.195e-06 L=5e-07
M_M17_23 CO net7 VDD VNW pmos_5p0 W=1.195e-06 L=5e-07
M_M48 net47 B net49 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M41 net9 net7 net42 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M43 net42 A VSS VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M44 VSS B net42 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M38 net7 CI net5 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M37 net36 B net7 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M35 VSS A net36 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M30 net29 B net31 VNW pmos_5p0 W=6.8e-07 L=5e-07
M_M23 VDD B net1 VNW pmos_5p0 W=7.8e-07 L=5e-07
M_M22 net1 A VDD VNW pmos_5p0 W=7.8e-07 L=5e-07
M_M50 net49 A VSS VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M40 VSS B net5 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M39 net5 A VSS VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M32 net31 A VDD VNW pmos_5p0 W=6.8e-07 L=5e-07
M_M51_17 VSS net9 S VPW nfet_05v0 W=8.15e-07 L=6e-07
M_M51 VSS net9 S VPW nfet_05v0 W=8.15e-07 L=6e-07
M_M46 net9 CI net47 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M45 net42 CI VSS VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M34 CO net7 VSS VPW nfet_05v0 W=8.15e-07 L=6e-07
M_M34_25 CO net7 VSS VPW nfet_05v0 W=8.15e-07 L=6e-07
M_M33_12 VDD net9 S VNW pfet_05v0 W=1.12e-06 L=5e-07
M_M33 VDD net9 S VNW pfet_05v0 W=1.12e-06 L=5e-07
M_M28 net9 CI net29 VNW pfet_05v0 W=6.8e-07 L=5e-07
M_M24 net9 net7 net3 VNW pfet_05v0 W=6.8e-07 L=5e-07
M_M25 net3 A VDD VNW pfet_05v0 W=6.8e-07 L=5e-07
M_M26 VDD B net3 VNW pfet_05v0 W=6.8e-07 L=5e-07
M_M27 net3 CI VDD VNW pfet_05v0 W=6.8e-07 L=5e-07
M_M21 net7 CI net1 VNW pfet_05v0 W=7.8e-07 L=5e-07
M_M20 net19 B net7 VNW pfet_05v0 W=7.8e-07 L=5e-07
M_M18 VDD A net19 VNW pfet_05v0 W=7.8e-07 L=5e-07
M_M17 CO net7 VDD VNW pfet_05v0 W=1.195e-06 L=5e-07
M_M17_23 CO net7 VDD VNW pfet_05v0 W=1.195e-06 L=5e-07
M_M48 net47 B net49 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M41 net9 net7 net42 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M43 net42 A VSS VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M44 VSS B net42 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M38 net7 CI net5 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M37 net36 B net7 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M35 VSS A net36 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M30 net29 B net31 VNW pfet_05v0 W=6.8e-07 L=5e-07
M_M23 VDD B net1 VNW pfet_05v0 W=7.8e-07 L=5e-07
M_M22 net1 A VDD VNW pfet_05v0 W=7.8e-07 L=5e-07
M_M50 net49 A VSS VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M40 VSS B net5 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M39 net5 A VSS VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M32 net31 A VDD VNW pfet_05v0 W=6.8e-07 L=5e-07
.ENDS
80 changes: 40 additions & 40 deletions cells/addf/gf180mcu_fd_sc_mcu7t5v0__addf_4.cdl
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -13,44 +13,44 @@
* limitations under the License.

.SUBCKT gf180mcu_fd_sc_mcu7t5v0__addf_4 A B CI CO S VDD VNW VPW VSS
M_M51_17_0 VSS net9 S VPW nmos_5p0 W=8.15e-07 L=6e-07
M_M51_18 VSS net9 S VPW nmos_5p0 W=8.15e-07 L=6e-07
M_M51_17 VSS net9 S VPW nmos_5p0 W=8.15e-07 L=6e-07
M_M51 VSS net9 S VPW nmos_5p0 W=8.15e-07 L=6e-07
M_M46 net9 CI net47 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M45 net42 CI VSS VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M34 CO net7 VSS VPW nmos_5p0 W=8.15e-07 L=6e-07
M_M34_25 CO net7 VSS VPW nmos_5p0 W=8.15e-07 L=6e-07
M_M34_53 CO net7 VSS VPW nmos_5p0 W=8.15e-07 L=6e-07
M_M34_25_56 CO net7 VSS VPW nmos_5p0 W=8.15e-07 L=6e-07
M_M33_12_23 VDD net9 S VNW pmos_5p0 W=1.095e-06 L=5e-07
M_M33_34 VDD net9 S VNW pmos_5p0 W=1.095e-06 L=5e-07
M_M33_12 VDD net9 S VNW pmos_5p0 W=1.095e-06 L=5e-07
M_M33 VDD net9 S VNW pmos_5p0 W=1.095e-06 L=5e-07
M_M28 net9 CI net29 VNW pmos_5p0 W=6.6e-07 L=5e-07
M_M24 net9 net7 net3 VNW pmos_5p0 W=6.6e-07 L=5e-07
M_M25 net3 A VDD VNW pmos_5p0 W=6.6e-07 L=5e-07
M_M26 VDD B net3 VNW pmos_5p0 W=6.6e-07 L=5e-07
M_M27 net3 CI VDD VNW pmos_5p0 W=6.6e-07 L=5e-07
M_M21 net7 CI net1 VNW pmos_5p0 W=7.8e-07 L=5e-07
M_M20 net19 B net7 VNW pmos_5p0 W=7.8e-07 L=5e-07
M_M18 VDD A net19 VNW pmos_5p0 W=7.8e-07 L=5e-07
M_M17 CO net7 VDD VNW pmos_5p0 W=1.215e-06 L=5e-07
M_M17_23 CO net7 VDD VNW pmos_5p0 W=1.215e-06 L=5e-07
M_M17_66 CO net7 VDD VNW pmos_5p0 W=1.215e-06 L=5e-07
M_M17_23_46 CO net7 VDD VNW pmos_5p0 W=1.215e-06 L=5e-07
M_M48 net47 B net49 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M41 net9 net7 net42 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M43 net42 A VSS VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M44 VSS B net42 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M38 net7 CI net5 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M37 net36 B net7 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M35 VSS A net36 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M30 net29 B net31 VNW pmos_5p0 W=6.6e-07 L=5e-07
M_M23 VDD B net1 VNW pmos_5p0 W=7.8e-07 L=5e-07
M_M22 net1 A VDD VNW pmos_5p0 W=7.8e-07 L=5e-07
M_M50 net49 A VSS VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M40 VSS B net5 VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M39 net5 A VSS VPW nmos_5p0 W=3.8e-07 L=6e-07
M_M32 net31 A VDD VNW pmos_5p0 W=6.6e-07 L=5e-07
M_M51_17_0 VSS net9 S VPW nfet_05v0 W=8.15e-07 L=6e-07
M_M51_18 VSS net9 S VPW nfet_05v0 W=8.15e-07 L=6e-07
M_M51_17 VSS net9 S VPW nfet_05v0 W=8.15e-07 L=6e-07
M_M51 VSS net9 S VPW nfet_05v0 W=8.15e-07 L=6e-07
M_M46 net9 CI net47 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M45 net42 CI VSS VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M34 CO net7 VSS VPW nfet_05v0 W=8.15e-07 L=6e-07
M_M34_25 CO net7 VSS VPW nfet_05v0 W=8.15e-07 L=6e-07
M_M34_53 CO net7 VSS VPW nfet_05v0 W=8.15e-07 L=6e-07
M_M34_25_56 CO net7 VSS VPW nfet_05v0 W=8.15e-07 L=6e-07
M_M33_12_23 VDD net9 S VNW pfet_05v0 W=1.095e-06 L=5e-07
M_M33_34 VDD net9 S VNW pfet_05v0 W=1.095e-06 L=5e-07
M_M33_12 VDD net9 S VNW pfet_05v0 W=1.095e-06 L=5e-07
M_M33 VDD net9 S VNW pfet_05v0 W=1.095e-06 L=5e-07
M_M28 net9 CI net29 VNW pfet_05v0 W=6.6e-07 L=5e-07
M_M24 net9 net7 net3 VNW pfet_05v0 W=6.6e-07 L=5e-07
M_M25 net3 A VDD VNW pfet_05v0 W=6.6e-07 L=5e-07
M_M26 VDD B net3 VNW pfet_05v0 W=6.6e-07 L=5e-07
M_M27 net3 CI VDD VNW pfet_05v0 W=6.6e-07 L=5e-07
M_M21 net7 CI net1 VNW pfet_05v0 W=7.8e-07 L=5e-07
M_M20 net19 B net7 VNW pfet_05v0 W=7.8e-07 L=5e-07
M_M18 VDD A net19 VNW pfet_05v0 W=7.8e-07 L=5e-07
M_M17 CO net7 VDD VNW pfet_05v0 W=1.215e-06 L=5e-07
M_M17_23 CO net7 VDD VNW pfet_05v0 W=1.215e-06 L=5e-07
M_M17_66 CO net7 VDD VNW pfet_05v0 W=1.215e-06 L=5e-07
M_M17_23_46 CO net7 VDD VNW pfet_05v0 W=1.215e-06 L=5e-07
M_M48 net47 B net49 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M41 net9 net7 net42 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M43 net42 A VSS VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M44 VSS B net42 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M38 net7 CI net5 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M37 net36 B net7 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M35 VSS A net36 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M30 net29 B net31 VNW pfet_05v0 W=6.6e-07 L=5e-07
M_M23 VDD B net1 VNW pfet_05v0 W=7.8e-07 L=5e-07
M_M22 net1 A VDD VNW pfet_05v0 W=7.8e-07 L=5e-07
M_M50 net49 A VSS VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M40 VSS B net5 VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M39 net5 A VSS VPW nfet_05v0 W=3.8e-07 L=6e-07
M_M32 net31 A VDD VNW pfet_05v0 W=6.6e-07 L=5e-07
.ENDS
28 changes: 14 additions & 14 deletions cells/addh/gf180mcu_fd_sc_mcu7t5v0__addh_1.cdl
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -13,18 +13,18 @@
* limitations under the License.

.SUBCKT gf180mcu_fd_sc_mcu7t5v0__addh_1 A B CO S VDD VNW VPW VSS
M_i_2 VSS NCO CO VPW nmos_5p0 W=8.15e-07 L=6e-07
M_i_5 net_0 A VSS VPW nmos_5p0 W=4.8e-07 L=6e-07
M_i_4 NCO B net_0 VPW nmos_5p0 W=4.8e-07 L=6e-07
M_i_0 S NS VSS VPW nmos_5p0 W=8.15e-07 L=6e-07
M_i_3 VDD NCO CO VNW pmos_5p0 W=1.22e-06 L=5e-07
M_i_7 NCO A VDD VNW pmos_5p0 W=6.35e-07 L=5e-07
M_i_6 VDD B NCO VNW pmos_5p0 W=6.35e-07 L=5e-07
M_i_11 NS A net_2 VNW pmos_5p0 W=6.35e-07 L=5e-07
M_i_13 VDD NCO NS VNW pmos_5p0 W=6.35e-07 L=5e-07
M_i_1 S NS VDD VNW pmos_5p0 W=1.22e-06 L=5e-07
M_i_9 NS B net_1 VPW nmos_5p0 W=4.2e-07 L=6e-07
M_i_8 net_1 A NS VPW nmos_5p0 W=4.2e-07 L=6e-07
M_i_10 VSS NCO net_1 VPW nmos_5p0 W=4.2e-07 L=6e-07
M_i_12 net_2 B VDD VNW pmos_5p0 W=6.35e-07 L=5e-07
M_i_2 VSS NCO CO VPW nfet_05v0 W=8.15e-07 L=6e-07
M_i_5 net_0 A VSS VPW nfet_05v0 W=4.8e-07 L=6e-07
M_i_4 NCO B net_0 VPW nfet_05v0 W=4.8e-07 L=6e-07
M_i_0 S NS VSS VPW nfet_05v0 W=8.15e-07 L=6e-07
M_i_3 VDD NCO CO VNW pfet_05v0 W=1.22e-06 L=5e-07
M_i_7 NCO A VDD VNW pfet_05v0 W=6.35e-07 L=5e-07
M_i_6 VDD B NCO VNW pfet_05v0 W=6.35e-07 L=5e-07
M_i_11 NS A net_2 VNW pfet_05v0 W=6.35e-07 L=5e-07
M_i_13 VDD NCO NS VNW pfet_05v0 W=6.35e-07 L=5e-07
M_i_1 S NS VDD VNW pfet_05v0 W=1.22e-06 L=5e-07
M_i_9 NS B net_1 VPW nfet_05v0 W=4.2e-07 L=6e-07
M_i_8 net_1 A NS VPW nfet_05v0 W=4.2e-07 L=6e-07
M_i_10 VSS NCO net_1 VPW nfet_05v0 W=4.2e-07 L=6e-07
M_i_12 net_2 B VDD VNW pfet_05v0 W=6.35e-07 L=5e-07
.ENDS
36 changes: 18 additions & 18 deletions cells/addh/gf180mcu_fd_sc_mcu7t5v0__addh_2.cdl
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Expand Up @@ -13,22 +13,22 @@
* limitations under the License.

.SUBCKT gf180mcu_fd_sc_mcu7t5v0__addh_2 A B CO S VDD VNW VPW VSS
M_i_2_1 CO NCO VSS VPW nmos_5p0 W=8.15e-07 L=6e-07
M_i_2_0 VSS NCO CO VPW nmos_5p0 W=8.15e-07 L=6e-07
M_i_5 net_0 A VSS VPW nmos_5p0 W=8.15e-07 L=6e-07
M_i_4 NCO B net_0 VPW nmos_5p0 W=8.15e-07 L=6e-07
M_i_0_1 S NS VSS VPW nmos_5p0 W=8.15e-07 L=6e-07
M_i_0_0 VSS NS S VPW nmos_5p0 W=8.15e-07 L=6e-07
M_i_3_1 CO NCO VDD VNW pmos_5p0 W=1.215e-06 L=5e-07
M_i_3_0 VDD NCO CO VNW pmos_5p0 W=1.215e-06 L=5e-07
M_i_7 NCO A VDD VNW pmos_5p0 W=1.215e-06 L=5e-07
M_i_6 VDD B NCO VNW pmos_5p0 W=1.215e-06 L=5e-07
M_i_11 NS A net_2 VNW pmos_5p0 W=9.75e-07 L=5e-07
M_i_13 VDD NCO NS VNW pmos_5p0 W=9.75e-07 L=5e-07
M_i_1_1 S NS VDD VNW pmos_5p0 W=9.75e-07 L=5e-07
M_i_1_0 VDD NS S VNW pmos_5p0 W=9.75e-07 L=5e-07
M_i_9 NS B net_1 VPW nmos_5p0 W=8.15e-07 L=6e-07
M_i_8 net_1 A NS VPW nmos_5p0 W=8.15e-07 L=6e-07
M_i_10 VSS NCO net_1 VPW nmos_5p0 W=8.15e-07 L=6e-07
M_i_12 net_2 B VDD VNW pmos_5p0 W=9.75e-07 L=5e-07
M_i_2_1 CO NCO VSS VPW nfet_05v0 W=8.15e-07 L=6e-07
M_i_2_0 VSS NCO CO VPW nfet_05v0 W=8.15e-07 L=6e-07
M_i_5 net_0 A VSS VPW nfet_05v0 W=8.15e-07 L=6e-07
M_i_4 NCO B net_0 VPW nfet_05v0 W=8.15e-07 L=6e-07
M_i_0_1 S NS VSS VPW nfet_05v0 W=8.15e-07 L=6e-07
M_i_0_0 VSS NS S VPW nfet_05v0 W=8.15e-07 L=6e-07
M_i_3_1 CO NCO VDD VNW pfet_05v0 W=1.215e-06 L=5e-07
M_i_3_0 VDD NCO CO VNW pfet_05v0 W=1.215e-06 L=5e-07
M_i_7 NCO A VDD VNW pfet_05v0 W=1.215e-06 L=5e-07
M_i_6 VDD B NCO VNW pfet_05v0 W=1.215e-06 L=5e-07
M_i_11 NS A net_2 VNW pfet_05v0 W=9.75e-07 L=5e-07
M_i_13 VDD NCO NS VNW pfet_05v0 W=9.75e-07 L=5e-07
M_i_1_1 S NS VDD VNW pfet_05v0 W=9.75e-07 L=5e-07
M_i_1_0 VDD NS S VNW pfet_05v0 W=9.75e-07 L=5e-07
M_i_9 NS B net_1 VPW nfet_05v0 W=8.15e-07 L=6e-07
M_i_8 net_1 A NS VPW nfet_05v0 W=8.15e-07 L=6e-07
M_i_10 VSS NCO net_1 VPW nfet_05v0 W=8.15e-07 L=6e-07
M_i_12 net_2 B VDD VNW pfet_05v0 W=9.75e-07 L=5e-07
.ENDS
72 changes: 36 additions & 36 deletions cells/addh/gf180mcu_fd_sc_mcu7t5v0__addh_4.cdl
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Expand Up @@ -13,40 +13,40 @@
* limitations under the License.

.SUBCKT gf180mcu_fd_sc_mcu7t5v0__addh_4 A B CO S VDD VNW VPW VSS
M_i_5_1 net_0_0 A VSS VPW nmos_5p0 W=8.2e-07 L=6e-07
M_i_4_1 NCO B net_0_0 VPW nmos_5p0 W=8.2e-07 L=6e-07
M_i_4_0 net_0_1 B NCO VPW nmos_5p0 W=8.2e-07 L=6e-07
M_i_5_0 VSS A net_0_1 VPW nmos_5p0 W=8.2e-07 L=6e-07
M_i_10_0 net_1 NCO VSS VPW nmos_5p0 W=6.1e-07 L=6e-07
M_i_8_0 NS A net_1 VPW nmos_5p0 W=6.1e-07 L=6e-07
M_i_9_0 net_1 B NS VPW nmos_5p0 W=6.1e-07 L=6e-07
M_i_9_1 NS B net_1 VPW nmos_5p0 W=6.1e-07 L=6e-07
M_i_8_1 net_1 A NS VPW nmos_5p0 W=6.1e-07 L=6e-07
M_i_10_1 VSS NCO net_1 VPW nmos_5p0 W=6.1e-07 L=6e-07
M_i_2_3 CO NCO VSS VPW nmos_5p0 W=1.05e-06 L=6e-07
M_i_2_2 VSS NCO CO VPW nmos_5p0 W=1.05e-06 L=6e-07
M_i_2_1 CO NCO VSS VPW nmos_5p0 W=1.05e-06 L=6e-07
M_i_2_0 VSS NCO CO VPW nmos_5p0 W=1.05e-06 L=6e-07
M_i_0_3 S NS VSS VPW nmos_5p0 W=8.2e-07 L=6e-07
M_i_0_2 VSS NS S VPW nmos_5p0 W=8.2e-07 L=6e-07
M_i_0_1 S NS VSS VPW nmos_5p0 W=8.2e-07 L=6e-07
M_i_0_0 VSS NS S VPW nmos_5p0 W=8.2e-07 L=6e-07
M_i_7_1 NCO A VDD VNW pmos_5p0 W=9.9e-07 L=5e-07
M_i_6_1 VDD B NCO VNW pmos_5p0 W=9.9e-07 L=5e-07
M_i_6_0 NCO B VDD VNW pmos_5p0 W=9.9e-07 L=5e-07
M_i_7_0 VDD A NCO VNW pmos_5p0 W=9.9e-07 L=5e-07
M_i_13_0 NS NCO VDD VNW pmos_5p0 W=9.9e-07 L=5e-07
M_i_11_0 net_2_0 A NS VNW pmos_5p0 W=9.9e-07 L=5e-07
M_i_12_0 VDD B net_2_0 VNW pmos_5p0 W=9.9e-07 L=5e-07
M_i_12_1 net_2_1 B VDD VNW pmos_5p0 W=9.9e-07 L=5e-07
M_i_11_1 NS A net_2_1 VNW pmos_5p0 W=9.9e-07 L=5e-07
M_i_13_1 VDD NCO NS VNW pmos_5p0 W=9.9e-07 L=5e-07
M_i_3_3 CO NCO VDD VNW pmos_5p0 W=9.9e-07 L=5e-07
M_i_3_2 VDD NCO CO VNW pmos_5p0 W=9.9e-07 L=5e-07
M_i_3_1 CO NCO VDD VNW pmos_5p0 W=9.9e-07 L=5e-07
M_i_3_0 VDD NCO CO VNW pmos_5p0 W=9.9e-07 L=5e-07
M_i_1_3 S NS VDD VNW pmos_5p0 W=9.9e-07 L=5e-07
M_i_1_2 VDD NS S VNW pmos_5p0 W=9.9e-07 L=5e-07
M_i_1_1 S NS VDD VNW pmos_5p0 W=9.9e-07 L=5e-07
M_i_1_0 VDD NS S VNW pmos_5p0 W=9.9e-07 L=5e-07
M_i_5_1 net_0_0 A VSS VPW nfet_05v0 W=8.2e-07 L=6e-07
M_i_4_1 NCO B net_0_0 VPW nfet_05v0 W=8.2e-07 L=6e-07
M_i_4_0 net_0_1 B NCO VPW nfet_05v0 W=8.2e-07 L=6e-07
M_i_5_0 VSS A net_0_1 VPW nfet_05v0 W=8.2e-07 L=6e-07
M_i_10_0 net_1 NCO VSS VPW nfet_05v0 W=6.1e-07 L=6e-07
M_i_8_0 NS A net_1 VPW nfet_05v0 W=6.1e-07 L=6e-07
M_i_9_0 net_1 B NS VPW nfet_05v0 W=6.1e-07 L=6e-07
M_i_9_1 NS B net_1 VPW nfet_05v0 W=6.1e-07 L=6e-07
M_i_8_1 net_1 A NS VPW nfet_05v0 W=6.1e-07 L=6e-07
M_i_10_1 VSS NCO net_1 VPW nfet_05v0 W=6.1e-07 L=6e-07
M_i_2_3 CO NCO VSS VPW nfet_05v0 W=1.05e-06 L=6e-07
M_i_2_2 VSS NCO CO VPW nfet_05v0 W=1.05e-06 L=6e-07
M_i_2_1 CO NCO VSS VPW nfet_05v0 W=1.05e-06 L=6e-07
M_i_2_0 VSS NCO CO VPW nfet_05v0 W=1.05e-06 L=6e-07
M_i_0_3 S NS VSS VPW nfet_05v0 W=8.2e-07 L=6e-07
M_i_0_2 VSS NS S VPW nfet_05v0 W=8.2e-07 L=6e-07
M_i_0_1 S NS VSS VPW nfet_05v0 W=8.2e-07 L=6e-07
M_i_0_0 VSS NS S VPW nfet_05v0 W=8.2e-07 L=6e-07
M_i_7_1 NCO A VDD VNW pfet_05v0 W=9.9e-07 L=5e-07
M_i_6_1 VDD B NCO VNW pfet_05v0 W=9.9e-07 L=5e-07
M_i_6_0 NCO B VDD VNW pfet_05v0 W=9.9e-07 L=5e-07
M_i_7_0 VDD A NCO VNW pfet_05v0 W=9.9e-07 L=5e-07
M_i_13_0 NS NCO VDD VNW pfet_05v0 W=9.9e-07 L=5e-07
M_i_11_0 net_2_0 A NS VNW pfet_05v0 W=9.9e-07 L=5e-07
M_i_12_0 VDD B net_2_0 VNW pfet_05v0 W=9.9e-07 L=5e-07
M_i_12_1 net_2_1 B VDD VNW pfet_05v0 W=9.9e-07 L=5e-07
M_i_11_1 NS A net_2_1 VNW pfet_05v0 W=9.9e-07 L=5e-07
M_i_13_1 VDD NCO NS VNW pfet_05v0 W=9.9e-07 L=5e-07
M_i_3_3 CO NCO VDD VNW pfet_05v0 W=9.9e-07 L=5e-07
M_i_3_2 VDD NCO CO VNW pfet_05v0 W=9.9e-07 L=5e-07
M_i_3_1 CO NCO VDD VNW pfet_05v0 W=9.9e-07 L=5e-07
M_i_3_0 VDD NCO CO VNW pfet_05v0 W=9.9e-07 L=5e-07
M_i_1_3 S NS VDD VNW pfet_05v0 W=9.9e-07 L=5e-07
M_i_1_2 VDD NS S VNW pfet_05v0 W=9.9e-07 L=5e-07
M_i_1_1 S NS VDD VNW pfet_05v0 W=9.9e-07 L=5e-07
M_i_1_0 VDD NS S VNW pfet_05v0 W=9.9e-07 L=5e-07
.ENDS
12 changes: 6 additions & 6 deletions cells/and2/gf180mcu_fd_sc_mcu7t5v0__and2_1.cdl
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Expand Up @@ -13,10 +13,10 @@
* limitations under the License.

.SUBCKT gf180mcu_fd_sc_mcu7t5v0__and2_1 A1 A2 Z VDD VNW VPW VSS
M_i_2 net_0 A1 Z_neg VPW nmos_5p0 W=3.65e-07 L=6e-07
M_i_3 VSS A2 net_0 VPW nmos_5p0 W=3.65e-07 L=6e-07
M_i_0 Z Z_neg VSS VPW nmos_5p0 W=8.15e-07 L=6e-07
M_i_4 Z_neg A1 VDD VNW pmos_5p0 W=6e-07 L=5e-07
M_i_5 VDD A2 Z_neg VNW pmos_5p0 W=6e-07 L=5e-07
M_i_1 Z Z_neg VDD VNW pmos_5p0 W=1.215e-06 L=5e-07
M_i_2 net_0 A1 Z_neg VPW nfet_05v0 W=3.65e-07 L=6e-07
M_i_3 VSS A2 net_0 VPW nfet_05v0 W=3.65e-07 L=6e-07
M_i_0 Z Z_neg VSS VPW nfet_05v0 W=8.15e-07 L=6e-07
M_i_4 Z_neg A1 VDD VNW pfet_05v0 W=6e-07 L=5e-07
M_i_5 VDD A2 Z_neg VNW pfet_05v0 W=6e-07 L=5e-07
M_i_1 Z Z_neg VDD VNW pfet_05v0 W=1.215e-06 L=5e-07
.ENDS
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