Beta38 test release

Beta 38 test release

Add save configuration option after auto calibration
Add calibration reminder on power up
Fix led flicker rate
Improve 6847 palette
Improve PLL recalibration
Add support for custom resolutions at custom frame rates:

Put your custom resolution@rate file in /Resolutions on the SD card using the format "HSIZExVSIZE@framerateHz" and it will appear in the resolutions option. e.g. 640x480@67Hz

Such custom refresh rates will ignore the refresh rate setting and inhibit genlocking unless the source computer is very close to the custom frame rate otherwise the genlock would slow down or speed up the custom refresh rate to match the computer's rate thus defeating the custom rate.

This option could be used with a HDMI to VGA converter to produce custom refresh rates for non standard CRTs.

As before, you can also put custom 50Hz & 60Hz resolutions in the appropriate 50Hz and 60Hz sub-folders in /Resolutions

Beta37 test release

Beta37 test release:
Fix major issue with EGA support (40 column text has different timing to 80 column text so required an extra profile)
Add support for Apple Lisa
Improve cache preload to eliminate top of screen glitch when OSD activated.
Improve 6847 palettes
Change D1 & D2 LED status when no sync:
D1:
Off = no sync
flashing = attempting to genlock
On = genlocked
D2:
Off = Timing Set 1
On = Timing Set 2 or No Sync (ensures at least 1 led is lit when no sync so a powered board always has one led lit)

NOTE: This version and all subsequent betas will force an update of the CPLD to the latest version on first startup to ensure that you are using the latest firmware when testing.

Beta36 test release

Beta 36 Test release

Fix some bugs with sampling phase in Beta 35
NOTE: If you tried Beta 35, you must reprogram your CPLD when running Beta 36

Changes (beta 35 & 36):
Update RGB CPLD to v94 to support 9bpp with blank input on B3 (For Atari ST) and 1bpp on Vsync input (For Atari STE)
Also add Sync Edge Leading/Trailing option to RGB CPLD (Previously only in YUV CPLD)

Update Atari ST and STE profiles to use the above options
NOTE: This requires a change to the ST and STE connections
For ST The track going to B3 must be cut on the pickup board and then B3 must be connected to the BLANK signal
For STE Composite sync must be connected to HSYNC and MONO must be connected to VSYNC

Update auto calibration for more accurate sample phase settings on some systems

Ignore flashing cursors when calibrating

General improvements and bug fixes

Beta35 test release

Beta 35 Test release

Withdrawn due to calibration bug

Beta34 test release

Add FFOSD on/off option (Was always on previously but now reduces CPU load when off). Potentially improves performance at 12bpp with >=16Mhz pixel clocks like Atari ST and Apple IIGS.

Improve 6847 palette colours

Optimise Tandy CoCo profile sample phase and voltage levels
Note: there are now separate 50Hz and 60Hz profiles due to problems with auto selection.

Change switch code so pressing SW3 cycles through NTSC Artifact Phase quadrants when NTSC artifacting enabled.
This works with all NTSC artifact profiles but is mainly aimed at the Tandy Colour Computer because the artifact phase varies by 180 degrees randomly on power up so you can select the correct phase without having to call up the menus

Beta33 test release

Generalise support for two timing sets per profile required for Apple IIGS support (Previously only used for mode7 on BBC)
Add Apple IIGS support including auto selection of 16.3Mhz or 14.3Mhz pixel clocks
Fix some NTSC artifact auto switching issues.

Beta32 test release

Fix issue with artifact quality stuck in soft mode on CGA sources
Opimise CPU usage in artifact modes

Beta31 test release

Beta31 test release
Fix some problems with Apple IIc support
Add line by line graphics enable for Apple IIc so mixed text and graphics have clean text

Beta30 test release

Beta30 test release

YUV CPLD updated v9.1 + software update to add support for TTL interface with YUV CPLD

(required for Tandy Model 3)

Beta27 test release

Fix problem with interlace detection on A2000 CPLD board
Fix issues with NTSC artifact on Tandy CoCo 1 & 2