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Cater for get/put scom for ddr5 ocmb targets #78

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Few suggestions and queries only. Approved in principle.

libpdbg/ocmb.c Outdated
uint32_t ocmb_proc = pdbg_target_index(pdbg_target_parent("proc",
&ocmb->target));
uint32_t ocmb_index = pdbg_target_index(&ocmb->target) % 0x8;
struct pdbg_target *target;
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struct pdbg_target *target = NULL just a suggestion

libpdbg/ocmb.c Outdated
// proc, ocmb index and device path
// Perform map from system device tree to bmc-backend device tree
// for ocmb target using proc and index to get device path.
uint32_t ocmb_proc = pdbg_target_index(pdbg_target_parent("proc",
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Here also we are getting the index for the ocmb_proc it seems so can we name the variable as ocmb_proc_index for better clarity?

libpdbg/ocmb.c Outdated
// Perform map from system device tree to bmc-backend device tree
// for ocmb target using proc and index to get device path.
uint32_t ocmb_proc = pdbg_target_index(pdbg_target_parent("proc",
&ocmb->target));
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What is the reason we are not doing a % 0x8 like we did at LN52? Interested to know

{
struct sbefifo *sbefifo = ocmb_to_sbefifo(ocmb);
struct sbefifo_context *sctx = sbefifo->get_sbefifo_context(sbefifo);
uint8_t instance_id;
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LN93 & 95 can be combined into a single line

@devenrao devenrao force-pushed the pib branch 7 times, most recently from 6efc79d to 79b2665 Compare December 4, 2023 03:22
This commit is to cater for odyssey DDR5 device tree changes.

Every proc chip will be associated with 8 ddr5 ocmb chips
which are accessed through sbefifo.

SBEFifo are configured as /dev/sbefifoXYY where X is the proc
number and YY as the port number.

Based on the fsi path found on the everest with ddr5 configuration
"/i2cr101/slave@00:00/raw" configured the same in the device tree
for kernel-fsi for each associated DDR5 chip.

Ensured that existing DDR4 devices does not have any impact.

Configured device path of the DDR5 OCMB odyssey chips in the
bmc backend device tree

get and put scom on ocmb chips will be using the newly configured
ocmb device path for sbefifo access

Tested:
Ensured that the new ocmb odyssesy SBE targets are added
and are probed verified both fsi and sbefifo probe is done
sucessfully

pdbg target path is /hmfsiocmb@101/sbefifo-ocmb@101
pdbg compatible is ibm,kernel-sbefifo
pdbg device-path is /dev/sbefifo101
pdbg_target_probe  status is  0
kernel_fsi_probe device_path /i2cr101/slave@00:00/raw
kernel_fsi_probe path /sys/class/fsi-master//i2cr101/slave@00:00/raw success probed
sbefifo_connect fifo_path /dev/sbefifo101

pdbg_target_probe class name is sbefifo
pdbg target path is /proc0/fsi/sbefifo@2400
pdbg compatible is ibm,kernel-sbefifo
pdbg device-path is /dev/sbefifo1
pdbg_target_probe  status is  0
kernel_fsi_probe device_path /fsi0/slave@00:00/raw
kernel_fsi_probe path /sys/class/fsi-master//fsi0/slave@00:00/raw success probed
sbefifo_connect fifo_path /dev/sbefifo1

Signed-off-by: Marri Devender Rao <[email protected]>
Change-Id: Ibf6c32ec578730ac79d7d732e545ed3be6c9ed0c
@devenrao devenrao force-pushed the pib branch 2 times, most recently from 0b2baef to 25fd17a Compare December 4, 2023 08:01
1) Uses the device path configured in the bmc backend device
tree to perform get and put scom on odyssey ddr5 chip

2) Checks attribute chip-id of the ocmb target  to differentiate
between ddr4 and ddr5 ocmb chips for get/put scom

3) For ddr5 ocmb targets parent proc sbefifo device path is used
for get/put scom

4) For ddr5 ocmb targets its corresponding sbefifo device path is
used for get/put scom

Tested:
root@ever6bmc:/tmp# getscom odyssey c0002040 -pall
odyssey k0:n0:s0:p02       0x0040010002000640
odyssey k0:n0:s0:p03       0x0040010002000640
odyssey k0:n0:s0:p34       0x0040010002000640
odyssey k0:n0:s0:p35       0x0040010002000640
/usr/bin/edbg getscom odyssey c0002040 -pall

Signed-off-by: Marri Devender Rao <[email protected]>
Change-Id: I55d438619b87b04e014bb6d8eaaef9aee986ae1b
Introduced new class name to odyssey ocmb sbefifo targets,
this helps in reducing the search to find the matching sbefifo
target for the odyssey ocmb chip.

Tested
odyssesy chip ocmb_getscom proc=0 ocmb index=2 addr= 0x08012400 value 0x40010002000640

Signed-off-by: Marri Devender Rao <[email protected]>
Change-Id: I776dbf5b8e0193b55a430f1661df6163ef7f0e7e
Signed-off-by: Marri Devender Rao <[email protected]>
Change-Id: I8391301d93d34f8c861082cbe3d36d2759b59ece
Tested:
1) At present noticing kernel panic at kernel_pib_getscom method
   need to debug further.

Signed-off-by: Marri Devender Rao <[email protected]>
Change-Id: Ic99d1e0963876ac60ce5a48c092bfac16d416855
Signed-off-by: Marri Devender Rao <[email protected]>
Change-Id: I62e4302926c6f3a4ab3cf8fa4fa90f3d51818415
cater for get cfam support for odyssey ocmb chip
@devenrao devenrao closed this Dec 6, 2023
@devenrao devenrao deleted the pib branch December 7, 2023 05:38
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2 participants