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update
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@olikraus
olikraus committed Jan 8, 2025
1 parent 4fa7835 commit e87871b
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Showing 2 changed files with 56 additions and 43 deletions.
61 changes: 43 additions & 18 deletions sys/arm/stm32l031x4/u8g2_test/main.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -103,36 +103,37 @@ void startUp(void)
RCC->APB1ENR |= RCC_APB1ENR_PWREN; /* enable power interface (PWR) */
PWR->CR |= PWR_CR_DBP; /* activate write access to RCC->CSR and RTC */

SysTick->LOAD = (SystemCoreClock/1000)*50 - 1; /* 50ms task */
SysTick->LOAD = (SystemCoreClock/1000)*10 - 1; /* 10ms task */
SysTick->VAL = 0;
SysTick->CTRL = 7; /* enable, generate interrupt (SysTick_Handler), do not divide by 2 */
}

/*=======================================================================*/
/* u8x8 display procedures */

/*
uc1609_slg19264_f SW SPI 0.3 FPS BSS 1692
uc1609_slg19264_f HW SPI 4.7 FPS BSS 1692
uc1609_slg19264_f DMA SPI 5.0 FPS BSS 1948
uc1609_slg19264_1 SW SPI 0.3 FPS BSS 348
uc1609_slg19264_1 HW SPI 2.6 FPS BSS 348
uc1609_slg19264_1 DMA SPI 2.6 FPS BSS 604
*/

void initDisplay(void)
{

/* setup display */
//u8g2_Setup_ssd1306_i2c_128x64_noname_f(&u8g2, U8G2_R2, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_stm32l0_sw_i2c);

//u8g2_Setup_uc1609_slg19264_f(&u8g2, U8G2_R2, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_stm32l0_spi);

// u8g2_Setup_uc1609_slg19264_f(&u8g2, U8G2_R2, u8x8_byte_stm32l0_hw_spi, u8x8_gpio_and_delay_stm32l0_spi);
//u8g2_Setup_uc1609_slg19264_f(&u8g2, U8G2_R2, u8x8_byte_stm32l0_hw_spi, u8x8_gpio_and_delay_stm32l0_spi);

u8g2_Setup_uc1609_slg19264_f(&u8g2, U8G2_R2, u8x8_byte_stm32l0_dma_spi, u8x8_gpio_and_delay_stm32l0_spi);


u8g2_InitDisplay(&u8g2);
u8g2_SetPowerSave(&u8g2, 0);
u8g2_SetFont(&u8g2, u8g2_font_6x12_tf);
u8g2_ClearBuffer(&u8g2);
u8g2_DrawStr(&u8g2, 0,12, "STM32L031");
u8g2_DrawStr(&u8g2, 0,24, u8x8_u8toa(SystemCoreClock/1000000, 2));
u8g2_DrawStr(&u8g2, 20,24, "MHz");
u8g2_SendBuffer(&u8g2);

}

void outChar(uint8_t c)
Expand Down Expand Up @@ -184,6 +185,8 @@ void setRow(uint8_t r)
int main()
{
uint8_t v = 0;
uint32_t frame_cnt = 0;
uint32_t start, diff, fps, fps_frac;
//setHSIClock(); /* enable 32 MHz Clock */
SystemCoreClockUpdate();
startUp(); /* enable systick irq and several power regions */
Expand All @@ -198,24 +201,46 @@ int main()
GPIOA->BSRR = GPIO_BSRR_BR_9; /* atomic clear */


frame_cnt = 0;
fps = 0;
fps_frac = 0;
start = SysTickCount;
for(;;)
{
diff = SysTickCount - start;
if ( diff > 0 )
{
fps = frame_cnt*1000 / diff; // diff are 10ms ticks
fps_frac = fps % 10;
fps /= 10;
}
GPIOA->BSRR = GPIO_BSRR_BR_9; /* atomic clear */

u8g2_SetFont(&u8g2, u8g2_font_6x12_tf);
//u8g2_SetContrast(&u8g2, v);
u8g2_ClearBuffer(&u8g2);
u8g2_DrawStr(&u8g2, 0,12, "STM32L031");
u8g2_DrawStr(&u8g2, 0,24, u8x8_u8toa(SystemCoreClock/1000000, 2));
u8g2_DrawStr(&u8g2, 20,24, "MHz");

u8g2_SetFont(&u8g2, u8g2_font_9x15B_tf);
u8g2_DrawStr(&u8g2, 0,50, u8x8_u8toa(v, 3));
//u8g2_ClearBuffer(&u8g2);
u8g2_FirstPage(&u8g2);
do
{
u8g2_SetFont(&u8g2, u8g2_font_6x12_tf);
u8g2_DrawStr(&u8g2, 0,12, "STM32L031");
u8g2_DrawStr(&u8g2, 0,24, u8x8_u8toa(SystemCoreClock/1000000, 2));
u8g2_DrawStr(&u8g2, 20,24, "MHz");

u8g2_SetFont(&u8g2, u8g2_font_9x15B_tf);
u8g2_DrawStr(&u8g2, 0,40, u8x8_u8toa(v, 3));

u8g2_DrawStr(&u8g2, 0,60, "FPS:");
u8g2_DrawStr(&u8g2, 35,60, u8x8_u8toa( fps, 3));
u8g2_DrawStr(&u8g2, 35+3*8,60, ".");
u8g2_DrawStr(&u8g2, 35+3*8+6,60, u8x8_u8toa( fps_frac, 1));
} while( u8g2_NextPage(&u8g2));

GPIOA->BSRR = GPIO_BSRR_BS_9; /* atomic clear */

u8g2_SendBuffer(&u8g2);
//u8g2_SendBuffer(&u8g2);
v++;
frame_cnt++;
}
return 0;
}
38 changes: 13 additions & 25 deletions sys/arm/stm32l031x4/u8g2_test/u8x8cb.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,6 @@
#include "stm32l031xx.h"
#include "delay.h"
#include "u8x8.h"
#include <string.h> /* memcpy */

/*
I2C:
Expand Down Expand Up @@ -251,7 +250,7 @@ uint8_t u8x8_byte_stm32l0_hw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, voi
data = (uint8_t *)arg_ptr;
while( arg_int > 0 )
{
while( ( SPI1->SR & SPI_SR_TXE ) == 0 )
while ( (SPI1->SR & SPI_SR_BSY) || (DMA1_Channel3->CNDTR != 0) ) // wait for transfer completion
;
*(uint8_t *)&(SPI1->DR) = *data;
data++;
Expand Down Expand Up @@ -322,11 +321,12 @@ uint8_t dma_buffer[256]; // required for DMA transfer

uint8_t u8x8_byte_stm32l0_dma_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
{
//uint8_t *data;
uint16_t i;
switch(msg) {
case U8X8_MSG_BYTE_SEND:
/* data in arg_ptr will be overwritten, once we leave this function, so create a copy of it */
memcpy(dma_buffer, arg_ptr, arg_int);
/* data in arg_ptr will be overwritten, once we leave this function, so create a copy of it (note: memcpy seems to be slower) */
for( i = 0; i < arg_int; i++ )
dma_buffer[i] = ((uint8_t *)arg_ptr)[i];

/* wait for completion of any previous transfer */
while ( (SPI1->SR & SPI_SR_BSY) || (DMA1_Channel3->CNDTR != 0) ) // wait for transfer completion
Expand All @@ -335,29 +335,14 @@ uint8_t u8x8_byte_stm32l0_dma_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, vo
/* setup and start DMA SPI transfer */
DMA1_Channel3->CCR = 0; // disable + reset channel 3
/* defaults:
- 8 Bit access --> ok
- read from peripheral --> changed
- none-circular mode --> ok
- no increment mode --> will be changed below
- 8 Bit access --> ok
- read from peripheral --> changed
- none-circular mode --> ok
- no increment mode --> will be changed below
*/
DMA1_Channel3->CNDTR = arg_int; /* buffer size */
DMA1_Channel3->CMAR = (uint32_t)dma_buffer;
DMA1_Channel3->CPAR = (uint32_t)&(SPI1->DR);
DMA1_Channel3->CCR |= DMA_CCR_MINC | DMA_CCR_DIR | DMA_CCR_EN; /* increment memory, copy from M to P, enable DMA */

DMA1_Channel3->CCR |= DMA_CCR_MINC | DMA_CCR_DIR; /* increment memory, copy from M to P */
DMA1_Channel3->CCR |= DMA_CCR_EN; /* enable */

/*
data = (uint8_t *)arg_ptr;
while( arg_int > 0 )
{
while( ( SPI1->SR & SPI_SR_TXE ) == 0 )
;
*(uint8_t *)&(SPI1->DR) = *data;
data++;
arg_int--;
}
*/
break;
case U8X8_MSG_BYTE_INIT:
/* enable clock for SPI and DMA*/
Expand All @@ -384,6 +369,9 @@ uint8_t u8x8_byte_stm32l0_dma_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, vo
DMA1_CSELR->CSELR |= 1 << DMA_CSELR_C3S_Pos; /* aktivate SPI_TX on Channel 3 */
DMA1_Channel3->CCR = 0; // disable + reset channel 3
DMA1_Channel3->CNDTR = 0; /* clear buffer size */
DMA1_Channel3->CMAR = (uint32_t)dma_buffer;
DMA1_Channel3->CPAR = (uint32_t)&(SPI1->DR);


/* setup and enable SPI subsystem */
/* Note: We assume SPI mode 0 for the displays (true for the most modern displays), so CPHA and CPOL are forced to 0 here. SPI mode is here: u8x8->display_info->spi_mode */
Expand Down

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