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[CIR][ThroughMLIR] Support lowering cir.condition and cir.while to scf.condition, scf.while #636

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merged 15 commits into from
Jun 7, 2024
Merged
77 changes: 56 additions & 21 deletions clang/lib/CIR/Lowering/ThroughMLIR/LowerCIRLoopToSCF.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,8 @@
#include "mlir/Dialect/SCF/Transforms/Passes.h"
#include "mlir/IR/BuiltinDialect.h"
#include "mlir/IR/BuiltinTypes.h"
#include "mlir/IR/Operation.h"
#include "mlir/IR/Visitors.h"
#include "mlir/Pass/Pass.h"
#include "mlir/Pass/PassManager.h"
#include "mlir/Support/LogicalResult.h"
Expand All @@ -30,11 +32,11 @@ using namespace llvm;

namespace cir {

class SCFLoop {
template <typename LoopOp> class SCFLoop {
public:
SCFLoop(mlir::cir::ForOp op, mlir::ConversionPatternRewriter *rewriter)
: forOp(op), rewriter(rewriter) {}

SCFLoop(LoopOp loopOp, typename LoopOp::Adaptor adaptor,
mlir::ConversionPatternRewriter *rewriter)
: loopOp(loopOp), adaptor(adaptor), rewriter(rewriter) {}
int64_t getStep() { return step; }
mlir::Value getLowerBound() { return lowerBound; }
mlir::Value getUpperBound() { return upperBound; }
Expand All @@ -46,9 +48,11 @@ class SCFLoop {

mlir::Value plusConstant(mlir::Value V, mlir::Location loc, int addend);
void transferToSCFForOp();
void transferToSCFWhileOp();

private:
mlir::cir::ForOp forOp;
LoopOp loopOp;
typename LoopOp::Adaptor adaptor;
mlir::cir::CmpOp cmpOp;
mlir::Value IVAddr, lowerBound = nullptr, upperBound = nullptr;
mlir::ConversionPatternRewriter *rewriter;
Expand All @@ -61,9 +65,10 @@ static int64_t getConstant(mlir::cir::ConstantOp op) {
return IntAttr.getValue().getSExtValue();
}

int64_t SCFLoop::findStepAndIV(mlir::Value &addr) {
template <typename LoopOp>
int64_t SCFLoop<LoopOp>::findStepAndIV(mlir::Value &addr) {
auto *stepBlock =
(forOp.maybeGetStep() ? &forOp.maybeGetStep()->front() : nullptr);
(loopOp.maybeGetStep() ? &loopOp.maybeGetStep()->front() : nullptr);
assert(stepBlock && "Can not find step block");

int64_t step = 0;
Expand Down Expand Up @@ -111,10 +116,10 @@ static bool isIVLoad(mlir::Operation *op, mlir::Value IVAddr) {
return false;
}

mlir::cir::CmpOp SCFLoop::findCmpOp() {
template <typename LoopOp> mlir::cir::CmpOp SCFLoop<LoopOp>::findCmpOp() {
cmpOp = nullptr;
for (auto *user : IVAddr.getUsers()) {
if (user->getParentRegion() != &forOp.getCond())
if (user->getParentRegion() != &loopOp.getCond())
continue;
if (auto loadOp = dyn_cast<mlir::cir::LoadOp>(*user)) {
if (!loadOp->hasOneUse())
Expand All @@ -129,10 +134,10 @@ mlir::cir::CmpOp SCFLoop::findCmpOp() {
llvm_unreachable("Can't find loop CmpOp");

auto type = cmpOp.getLhs().getType();
if (!type.isa<mlir::cir::IntType>())
if (!type.template isa<mlir::cir::IntType>())
llvm_unreachable("Non-integer type IV is not supported");

auto lhsDefOp = cmpOp.getLhs().getDefiningOp();
auto *lhsDefOp = cmpOp.getLhs().getDefiningOp();
if (!lhsDefOp)
llvm_unreachable("Can't find IV load");
if (!isIVLoad(lhsDefOp, IVAddr))
Expand All @@ -145,8 +150,9 @@ mlir::cir::CmpOp SCFLoop::findCmpOp() {
return cmpOp;
}

mlir::Value SCFLoop::plusConstant(mlir::Value V, mlir::Location loc,
int addend) {
template <typename LoopOp>
mlir::Value SCFLoop<LoopOp>::plusConstant(mlir::Value V, mlir::Location loc,
int addend) {
auto type = V.getType();
auto c1 = rewriter->create<mlir::arith::ConstantOp>(
loc, type, mlir::IntegerAttr::get(type, addend));
Expand All @@ -156,7 +162,7 @@ mlir::Value SCFLoop::plusConstant(mlir::Value V, mlir::Location loc,
// Return IV initial value by searching the store before the loop.
// The operations before the loop have been transferred to MLIR.
// So we need to go through getRemappedValue to find the value.
mlir::Value SCFLoop::findIVInitValue() {
template <typename LoopOp> mlir::Value SCFLoop<LoopOp>::findIVInitValue() {
auto remapAddr = rewriter->getRemappedValue(IVAddr);
if (!remapAddr)
return nullptr;
Expand All @@ -168,7 +174,7 @@ mlir::Value SCFLoop::findIVInitValue() {
return memrefStore->getOperand(0);
}

void SCFLoop::analysis() {
template <typename LoopOp> void SCFLoop<LoopOp>::analysis() {
step = findStepAndIV(IVAddr);
cmpOp = findCmpOp();
auto IVInit = findIVInitValue();
Expand Down Expand Up @@ -203,19 +209,19 @@ static bool isInLoopBody(mlir::Operation *op) {
return false;
}

void SCFLoop::transferToSCFForOp() {
template <typename LoopOp> void SCFLoop<LoopOp>::transferToSCFForOp() {
auto ub = getUpperBound();
auto lb = getLowerBound();
auto loc = forOp.getLoc();
auto loc = loopOp.getLoc();
auto type = lb.getType();
auto step = rewriter->create<mlir::arith::ConstantOp>(
loc, type, mlir::IntegerAttr::get(type, getStep()));
auto scfForOp = rewriter->create<mlir::scf::ForOp>(loc, lb, ub, step);
SmallVector<mlir::Value> bbArg;
rewriter->eraseOp(&scfForOp.getBody()->back());
rewriter->inlineBlockBefore(&forOp.getBody().front(), scfForOp.getBody(),
rewriter->inlineBlockBefore(&loopOp.getBody().front(), scfForOp.getBody(),
scfForOp.getBody()->end(), bbArg);
scfForOp->walk<mlir::WalkOrder::PreOrder>([&](mlir::Operation *op) {
scfForOp->template walk<mlir::WalkOrder::PreOrder>([&](mlir::Operation *op) {
if (isa<mlir::cir::BreakOp>(op) || isa<mlir::cir::ContinueOp>(op) ||
isa<mlir::cir::IfOp>(op))
llvm_unreachable(
Expand All @@ -233,24 +239,53 @@ void SCFLoop::transferToSCFForOp() {
});
}

template <typename LoopOp> void SCFLoop<LoopOp>::transferToSCFWhileOp() {
auto scfWhileOp = rewriter->create<mlir::scf::WhileOp>(
loopOp->getLoc(), loopOp->getResultTypes(), adaptor.getOperands());
rewriter->createBlock(&scfWhileOp.getBefore());
rewriter->createBlock(&scfWhileOp.getAfter());

rewriter->cloneRegionBefore(loopOp.getCond(), &scfWhileOp.getBefore().back());
rewriter->eraseBlock(&scfWhileOp.getBefore().back());

rewriter->cloneRegionBefore(loopOp.getBody(), &scfWhileOp.getAfter().back());
rewriter->eraseBlock(&scfWhileOp.getAfter().back());
}

class CIRForOpLowering : public mlir::OpConversionPattern<mlir::cir::ForOp> {
public:
using OpConversionPattern<mlir::cir::ForOp>::OpConversionPattern;

mlir::LogicalResult
matchAndRewrite(mlir::cir::ForOp op, OpAdaptor adaptor,
mlir::ConversionPatternRewriter &rewriter) const override {
SCFLoop loop(op, &rewriter);
SCFLoop<mlir::cir::ForOp> loop(op, adaptor, &rewriter);
loop.analysis();
loop.transferToSCFForOp();
rewriter.eraseOp(op);
return mlir::success();
}
};

class CIRWhileOpLowering
: public mlir::OpConversionPattern<mlir::cir::WhileOp> {
public:
using OpConversionPattern<mlir::cir::WhileOp>::OpConversionPattern;

mlir::LogicalResult
matchAndRewrite(mlir::cir::WhileOp op, OpAdaptor adaptor,
mlir::ConversionPatternRewriter &rewriter) const override {
SCFLoop<mlir::cir::WhileOp> loop(op, adaptor, &rewriter);
loop.transferToSCFWhileOp();
rewriter.eraseOp(op);
return mlir::success();
}
};

void populateCIRLoopToSCFConversionPatterns(mlir::RewritePatternSet &patterns,
mlir::TypeConverter &converter) {
patterns.add<CIRForOpLowering>(converter, patterns.getContext());
patterns.add<CIRForOpLowering, CIRWhileOpLowering>(converter,
patterns.getContext());
}

} // namespace cir
39 changes: 34 additions & 5 deletions clang/lib/CIR/Lowering/ThroughMLIR/LowerCIRToMLIR.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -31,6 +31,10 @@
#include "mlir/Dialect/SCF/Transforms/Passes.h"
#include "mlir/IR/BuiltinDialect.h"
#include "mlir/IR/BuiltinTypes.h"
#include "mlir/IR/Operation.h"
#include "mlir/IR/Region.h"
#include "mlir/IR/TypeRange.h"
#include "mlir/IR/ValueRange.h"
#include "mlir/Pass/Pass.h"
#include "mlir/Pass/PassManager.h"
#include "mlir/Support/LogicalResult.h"
Expand All @@ -43,8 +47,14 @@
#include "clang/CIR/Dialect/IR/CIRTypes.h"
#include "clang/CIR/LowerToMLIR.h"
#include "clang/CIR/Passes.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/Sequence.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/TypeSwitch.h"
#include "llvm/Analysis/RegionInfo.h"
#include "llvm/IR/Type.h"
#include "llvm/IR/Value.h"
#include "llvm/Support/Casting.h"
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nit: does the new adding include lines are required?

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These files are generated by clangd’s auto-completion, and I believe they are not necessary

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Hello, I have moved the CIRWhileOpLowering to LoweringSCFLoop.cpp , can you review it?

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Could we remove the un-required including lines?


using namespace cir;
using namespace llvm;
Expand Down Expand Up @@ -558,7 +568,6 @@ class CIRFuncOpLowering : public mlir::OpConversionPattern<mlir::cir::FuncOp> {
return mlir::failure();

rewriter.eraseOp(op);

return mlir::LogicalResult::success();
}
};
Expand Down Expand Up @@ -883,7 +892,6 @@ class CIRScopeOpLowering
if (mlir::failed(getTypeConverter()->convertTypes(scopeOp->getResultTypes(),
mlirResultTypes)))
return mlir::LogicalResult::failure();

rewriter.setInsertionPoint(scopeOp);
auto newScopeOp = rewriter.create<mlir::memref::AllocaScopeOp>(
scopeOp.getLoc(), mlirResultTypes);
Expand Down Expand Up @@ -956,7 +964,7 @@ class CIRYieldOpLowering
mlir::ConversionPatternRewriter &rewriter) const override {
auto *parentOp = op->getParentOp();
return llvm::TypeSwitch<mlir::Operation *, mlir::LogicalResult>(parentOp)
.Case<mlir::scf::IfOp, mlir::scf::ForOp>([&](auto) {
.Case<mlir::scf::IfOp, mlir::scf::ForOp, mlir::scf::WhileOp>([&](auto) {
rewriter.replaceOpWithNewOp<mlir::scf::YieldOp>(
op, adaptor.getOperands());
return mlir::success();
Expand All @@ -965,6 +973,27 @@ class CIRYieldOpLowering
}
};

class CIRConditionOpLowering
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It seems ConditionOp only be used for loops. Should we move to LowerCIRLoopToSCF.cpp?

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I move the CIRConditionOpLowering to LoweriCIRLoopToSCF

: public mlir::OpConversionPattern<mlir::cir::ConditionOp> {
public:
using OpConversionPattern<mlir::cir::ConditionOp>::OpConversionPattern;
mlir::LogicalResult
matchAndRewrite(mlir::cir::ConditionOp op, OpAdaptor adaptor,
mlir::ConversionPatternRewriter &rewriter) const override {
auto *parentOp = op->getParentOp();
return llvm::TypeSwitch<mlir::Operation *, mlir::LogicalResult>(parentOp)
.Case<mlir::scf::WhileOp>([&](auto) {
auto condition = adaptor.getCondition();
auto i1Condition = rewriter.create<mlir::arith::TruncIOp>(
op.getLoc(), rewriter.getI1Type(), condition);
rewriter.replaceOpWithNewOp<mlir::scf::ConditionOp>(
op, i1Condition, parentOp->getOperands());
return mlir::success();
})
.Default([](auto) { return mlir::failure(); });
}
};

class CIRGlobalOpLowering
: public mlir::OpConversionPattern<mlir::cir::GlobalOp> {
public:
Expand Down Expand Up @@ -1268,8 +1297,8 @@ void populateCIRToMLIRConversionPatterns(mlir::RewritePatternSet &patterns,
CIRLogOpLowering, CIRRoundOpLowering, CIRPtrStrideOpLowering,
CIRSinOpLowering, CIRShiftOpLowering, CIRBitClzOpLowering,
CIRBitCtzOpLowering, CIRBitPopcountOpLowering, CIRBitClrsbOpLowering,
CIRBitFfsOpLowering, CIRBitParityOpLowering>(converter,
patterns.getContext());
CIRBitFfsOpLowering, CIRBitParityOpLowering, CIRConditionOpLowering>(
converter, patterns.getContext());
}

static mlir::TypeConverter prepareTypeConverter() {
Expand Down
35 changes: 35 additions & 0 deletions clang/test/CIR/Lowering/ThroughMLIR/while.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,35 @@
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -fno-clangir-direct-lowering -emit-mlir %s -o %t.mlir
// RUN: FileCheck --input-file=%t.mlir %s

void foo() {
int a = 0;
while(a < 2) {
a++;
}
}

//CHECK: func.func @foo() {
//CHECK: %alloca = memref.alloca() {alignment = 4 : i64} : memref<i32>
//CHECK: %c0_i32 = arith.constant 0 : i32
//CHECK: memref.store %c0_i32, %alloca[] : memref<i32>
//CHECK: memref.alloca_scope {
//CHECK: scf.while : () -> () {
//CHECK: %0 = memref.load %alloca[] : memref<i32>
//CHECK: %c2_i32 = arith.constant 2 : i32
//CHECK: %1 = arith.cmpi ult, %0, %c2_i32 : i32
//CHECK: %2 = arith.extui %1 : i1 to i32
//CHECK: %c0_i32_0 = arith.constant 0 : i32
//CHECK: %3 = arith.cmpi ne, %2, %c0_i32_0 : i32
//CHECK: %4 = arith.extui %3 : i1 to i8
//CHECK: %5 = arith.trunci %4 : i8 to i1
//CHECK: scf.condition(%5)
//CHECK: } do {
//CHECK: %0 = memref.load %alloca[] : memref<i32>
//CHECK: %c1_i32 = arith.constant 1 : i32
//CHECK: %1 = arith.addi %0, %c1_i32 : i32
//CHECK: memref.store %1, %alloca[] : memref<i32>
//CHECK: scf.yield
//CHECK: }
//CHECK: }
//CHECK: return
//CHECK: }
48 changes: 48 additions & 0 deletions clang/test/CIR/Lowering/ThroughMLIR/while.cir
Original file line number Diff line number Diff line change
@@ -0,0 +1,48 @@
// RUN: cir-opt %s -cir-to-mlir -o %t.mlir
// RUN: FileCheck %s --input-file %t.mlir

!s32i = !cir.int<s, 32>
module {
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Please either add a comment with the C/C++ code we could use to regen this test in case CIR changes significantly or add a test coming from C/C++ source.

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Ok, I will add some comment and test case

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Hello, I add a test coming from C source , can you review it?

cir.func @foo() {
%0 = cir.alloca !s32i, !cir.ptr<!s32i>, ["__retval"] {alignment = 4 : i64}
%1 = cir.alloca !s32i, !cir.ptr<!s32i>, ["a", init] {alignment = 4 : i64}
%2 = cir.const #cir.int<0> : !s32i
cir.store %2, %1 : !s32i, !cir.ptr<!s32i>
cir.while {
%3 = cir.load %1 : !cir.ptr<!s32i>, !s32i
%4 = cir.const #cir.int<2> : !s32i
%5 = cir.cmp(lt, %3, %4) : !s32i, !cir.bool
cir.condition(%5)
} do {
%3 = cir.load %1 : !cir.ptr<!s32i>, !s32i
%4 = cir.unary(inc, %3) : !s32i, !s32i
cir.store %4, %1 : !s32i, !cir.ptr<!s32i>
cir.yield
}
cir.return
}
}

//CHECK: module {
//CHECK-NEXT: func.func @foo() {
//CHECK-NEXT: %alloca = memref.alloca() {alignment = 4 : i64} : memref<i32>
//CHECK-NEXT: %alloca_0 = memref.alloca() {alignment = 4 : i64} : memref<i32>
//CHECK-NEXT: %c0_i32 = arith.constant 0 : i32
//CHECK-NEXT: memref.store %c0_i32, %alloca_0[] : memref<i32>
//CHECK-NEXT: scf.while : () -> () {
//CHECK-NEXT: %0 = memref.load %alloca_0[] : memref<i32>
//CHECK-NEXT: %c2_i32 = arith.constant 2 : i32
//CHECK-NEXT: %1 = arith.cmpi ult, %0, %c2_i32 : i32
//CHECK-NEXT: %2 = arith.extui %1 : i1 to i8
//CHECK-NEXT: %3 = arith.trunci %2 : i8 to i1
//CHECK-NEXT: scf.condition(%3)
//CHECK-NEXT: } do {
//CHECK-NEXT: %0 = memref.load %alloca_0[] : memref<i32>
//CHECK-NEXT: %c1_i32 = arith.constant 1 : i32
//CHECK-NEXT: %1 = arith.addi %0, %c1_i32 : i32
//CHECK-NEXT: memref.store %1, %alloca_0[] : memref<i32>
//CHECK-NEXT: scf.yield
//CHECK-NEXT: }
//CHECK-NEXT: return
//CHECK-NEXT: }
//CHECK-NEXT:}
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