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[CIR][CIRGen] Support __builtin_signbitl #1117

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merged 1 commit into from
Nov 13, 2024
Merged

[CIR][CIRGen] Support __builtin_signbitl #1117

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7 changes: 5 additions & 2 deletions clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -4333,8 +4333,11 @@ class CIRSignBitOpLowering : public mlir::OpConversionPattern<cir::SignBitOp> {
if (auto longDoubleType =
mlir::dyn_cast<cir::LongDoubleType>(op.getInput().getType())) {
if (mlir::isa<cir::FP80Type>(longDoubleType.getUnderlying())) {
// see https://github.com/llvm/clangir/issues/1057
llvm_unreachable("NYI");
// If the underlying type of LongDouble is FP80Type,
// DataLayout::getTypeSizeInBits returns 128.
// See https://github.com/llvm/clangir/issues/1057.
// Set the width to 80 manually.
width = 80;
}
}
auto intTy = mlir::IntegerType::get(rewriter.getContext(), width);
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10 changes: 10 additions & 0 deletions clang/test/CIR/CodeGen/builtin-signbit.c
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Expand Up @@ -23,3 +23,13 @@ void test_signbit_double(double val) {
// LLVM: %{{.+}} = zext i1 [[TMP2]] to i32
__builtin_signbitf(val);
}

void test_signbit_long_double(long double val) {
// CIR: test_signbit_long_double
// LLVM: test_signbit_long_double
__builtin_signbitl(val);
// CIR: %{{.+}} = cir.signbit %{{.+}} : !cir.long_double<!cir.f80> -> !s32i
// LLVM: [[TMP1:%.*]] = bitcast x86_fp80 %{{.+}} to i80
// LLVM: [[TMP2:%.*]] = icmp slt i80 [[TMP1]], 0
// LLVM: %{{.+}} = zext i1 [[TMP2]] to i32
}