added test

llvm · May 27, 2024 · 60993c3 · 60993c3
1 parent 4b35daf
commit 60993c3
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Showing 2 changed files with 24 additions and 10 deletions.
diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
@@ -202,21 +202,22 @@ static mlir::Value makeBinaryAtomicValue(
   mlir::Value val = cgf.buildScalarExpr(expr->getArg(1));
   mlir::Type valueType = val.getType();
   val = buildToInt(cgf, val, typ, intType);
-
-  auto loc = cgf.getLoc(expr->getSourceRange());
+
   auto op = mlir::cir::AtomicFetch::getOperationName();
-  SmallVector<mlir::Value> atomicOperands = {destAddr.emitRawPointer(), val};
-  SmallVector<mlir::Type> atomicResTys = {val.getType()};
+  SmallVector<mlir::Value> atomicOperands = {destAddr.emitRawPointer(), val};  
   auto fetchAttr = mlir::cir::AtomicFetchKindAttr::get(builder.getContext(), kind);
-  auto rmwi = builder.create(loc, builder.getStringAttr(op), atomicOperands,
-                             atomicResTys, {});
+  auto rmwi = builder.create(cgf.getLoc(expr->getSourceRange()), 
+                             builder.getStringAttr(op), 
+                             atomicOperands,
+                             {val.getType()},
+                             {});
+
   auto orderAttr = mlir::cir::MemOrderAttr::get(builder.getContext(), ordering);
   rmwi->setAttr("binop", fetchAttr);
   rmwi->setAttr("mem_order", orderAttr);
   rmwi->setAttr("fetch_first", mlir::UnitAttr::get(builder.getContext()));
-  auto result = rmwi->getResult(0);
-
-  return buildFromInt(cgf, result, typ, valueType);
+
+  return buildFromInt(cgf, rmwi->getResult(0), typ, valueType);
 }
 
 static RValue buildBinaryAtomic(CIRGenFunction &CGF,

diff --git a/clang/test/CIR/CodeGen/atomic.cpp b/clang/test/CIR/CodeGen/atomic.cpp
@@ -337,4 +337,17 @@ void incdec() {
 
 // LLVM-LABEL: @_Z6incdecv
 // LLVM: atomicrmw add ptr {{.*}}, i32 {{.*}} monotonic, align 4
-// LLVM: atomicrmw sub ptr {{.*}}, i32 {{.*}} monotonic, align 4
+// LLVM: atomicrmw sub ptr {{.*}}, i32 {{.*}} monotonic, align 4
+
+
+void inc(int* a) {
+  int b = __sync_fetch_and_add(a, 1);
+}
+// CHECK-LABEL: @_Z3inc 
+// CHECK: %[[PTR:.*]] = cir.load {{.*}} : !cir.ptr<!cir.ptr<!s32i>>, !cir.ptr<!s32i> 
+// CHECK: %[[VAL:.*]] = cir.const #cir.int<1> : !s32i
+// CHECK: %[[RES:.*]] = cir.atomic.fetch(add, %[[PTR]] : !cir.ptr<!s32i>, %[[VAL]] : !s32i, seq_cst) fetch_first : !s32i
+// CHECK: cir.store %[[RES]], {{.*}} : !s32i, !cir.ptr<!s32i>
+
+// LLVM-LABEL: @_Z3inc
+// LLVM: atomicrmw add ptr {{.*}}, i32 1 seq_cst, align 4