[CIR][LLVMLowering][NFC] Refactor and share getLLVMAtomicOrder

llvm · Apr 24, 2024 · 5dc3353 · 5dc3353
1 parent df8b15b
commit 5dc3353
Showing 1 changed file with 19 additions and 55 deletions.
diff --git a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
@@ -2206,29 +2206,28 @@ class CIRBitPopcountOpLowering
   }
 };
 
+static mlir::LLVM::AtomicOrdering getLLVMAtomicOrder(mlir::cir::MemOrder memo) {
+  switch (memo) {
+  case mlir::cir::MemOrder::Relaxed:
+    return mlir::LLVM::AtomicOrdering::monotonic;
+  case mlir::cir::MemOrder::Consume:
+  case mlir::cir::MemOrder::Acquire:
+    return mlir::LLVM::AtomicOrdering::acquire;
+  case mlir::cir::MemOrder::Release:
+    return mlir::LLVM::AtomicOrdering::release;
+  case mlir::cir::MemOrder::AcquireRelease:
+    return mlir::LLVM::AtomicOrdering::acq_rel;
+  case mlir::cir::MemOrder::SequentiallyConsistent:
+    return mlir::LLVM::AtomicOrdering::seq_cst;
+  }
+  llvm_unreachable("shouldn't get here");
+}
+
 class CIRAtomicCmpXchgLowering
     : public mlir::OpConversionPattern<mlir::cir::AtomicCmpXchg> {
 public:
   using OpConversionPattern<mlir::cir::AtomicCmpXchg>::OpConversionPattern;
 
-  mlir::LLVM::AtomicOrdering
-  getLLVMAtomicOrder(mlir::cir::MemOrder memo) const {
-    switch (memo) {
-    case mlir::cir::MemOrder::Relaxed:
-      return mlir::LLVM::AtomicOrdering::monotonic;
-    case mlir::cir::MemOrder::Consume:
-    case mlir::cir::MemOrder::Acquire:
-      return mlir::LLVM::AtomicOrdering::acquire;
-    case mlir::cir::MemOrder::Release:
-      return mlir::LLVM::AtomicOrdering::release;
-    case mlir::cir::MemOrder::AcquireRelease:
-      return mlir::LLVM::AtomicOrdering::acq_rel;
-    case mlir::cir::MemOrder::SequentiallyConsistent:
-      return mlir::LLVM::AtomicOrdering::seq_cst;
-    }
-    llvm_unreachable("shouldn't get here");
-  }
-
   mlir::LogicalResult
   matchAndRewrite(mlir::cir::AtomicCmpXchg op, OpAdaptor adaptor,
                   mlir::ConversionPatternRewriter &rewriter) const override {
@@ -2285,7 +2284,8 @@ class CIRAtomicCmpXchgLowering
     rewriter.create<mlir::LLVM::BrOp>(op.getLoc(), continueBB);
 
     // Fill in continueBB
-    // Zero-extend the cmp result so it matches the bool type on the other side.
+    // Zero-extend the cmp result so it matches the bool type on the other
+    // side.
     rewriter.setInsertionPoint(continueBB, continueBB->begin());
     auto extCmp = rewriter.create<mlir::LLVM::ZExtOp>(
         op.getLoc(), rewriter.getI8Type(), cmp);
@@ -2299,24 +2299,6 @@ class CIRAtomicXchgLowering
 public:
   using OpConversionPattern<mlir::cir::AtomicXchg>::OpConversionPattern;
 
-  mlir::LLVM::AtomicOrdering
-  getLLVMAtomicOrder(mlir::cir::MemOrder memo) const {
-    switch (memo) {
-    case mlir::cir::MemOrder::Relaxed:
-      return mlir::LLVM::AtomicOrdering::monotonic;
-    case mlir::cir::MemOrder::Consume:
-    case mlir::cir::MemOrder::Acquire:
-      return mlir::LLVM::AtomicOrdering::acquire;
-    case mlir::cir::MemOrder::Release:
-      return mlir::LLVM::AtomicOrdering::release;
-    case mlir::cir::MemOrder::AcquireRelease:
-      return mlir::LLVM::AtomicOrdering::acq_rel;
-    case mlir::cir::MemOrder::SequentiallyConsistent:
-      return mlir::LLVM::AtomicOrdering::seq_cst;
-    }
-    llvm_unreachable("shouldn't get here");
-  }
-
   mlir::LogicalResult
   matchAndRewrite(mlir::cir::AtomicXchg op, OpAdaptor adaptor,
                   mlir::ConversionPatternRewriter &rewriter) const override {
@@ -2334,24 +2316,6 @@ class CIRAtomicFetchLowering
 public:
   using OpConversionPattern<mlir::cir::AtomicFetch>::OpConversionPattern;
 
-  mlir::LLVM::AtomicOrdering
-  getLLVMAtomicOrder(mlir::cir::MemOrder memo) const {
-    switch (memo) {
-    case mlir::cir::MemOrder::Relaxed:
-      return mlir::LLVM::AtomicOrdering::monotonic;
-    case mlir::cir::MemOrder::Consume:
-    case mlir::cir::MemOrder::Acquire:
-      return mlir::LLVM::AtomicOrdering::acquire;
-    case mlir::cir::MemOrder::Release:
-      return mlir::LLVM::AtomicOrdering::release;
-    case mlir::cir::MemOrder::AcquireRelease:
-      return mlir::LLVM::AtomicOrdering::acq_rel;
-    case mlir::cir::MemOrder::SequentiallyConsistent:
-      return mlir::LLVM::AtomicOrdering::seq_cst;
-    }
-    llvm_unreachable("shouldn't get here");
-  }
-
   mlir::Value buildPostOp(mlir::cir::AtomicFetch op, OpAdaptor adaptor,
                           mlir::ConversionPatternRewriter &rewriter,
                           mlir::Value rmwVal, bool isInt) const {