Handle D/T bits.

jpd002 · Jul 31, 2024 · c12276d · c12276d
1 parent 758b45c
commit c12276d
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Showing 7 changed files with 32 additions and 8 deletions.
diff --git a/Source/ee/Ee_SubSystem.cpp b/Source/ee/Ee_SubSystem.cpp
@@ -64,6 +64,13 @@ CSubSystem::CSubSystem(uint8* iopRam, CIopBios& iopBios)
 	//Setup link between EE's VU context and VU0's VU context
 	m_vu0StateChangedConnection = m_vpu0->VuStateChanged.Connect([this](CVpu::VU_STATE newState) { Vu0StateChanged(newState); });
 
+	m_vu1InterruptTriggeredConnection = m_vpu1->VuInterruptTriggered.Connect(
+	    [this]() {
+		    uint32 currentState = m_intc.GetRegister(CINTC::INTC_STAT);
+		    assert((currentState & (1 << CINTC::INTC_LINE_VU1)) == 0);
+		    m_intc.AssertLine(CINTC::INTC_LINE_VU1);
+	    });
+
 	//EmotionEngine context setup
 	{
 		m_EE.m_executor = std::make_unique<CEeExecutor>(m_EE, m_ram);

diff --git a/Source/ee/Ee_SubSystem.h b/Source/ee/Ee_SubSystem.h
@@ -122,5 +122,6 @@ namespace Ee
 
 		Framework::CSignal<void()>::Connection m_OnRequestInstructionCacheFlushConnection;
 		CVpu::VuStateChangedEvent::Connection m_vu0StateChangedConnection;
+		CVpu::VuInterruptTriggeredEvent::Connection m_vu1InterruptTriggeredConnection;
 	};
 };
diff --git a/Source/ee/MA_VU_Upper.cpp b/Source/ee/MA_VU_Upper.cpp
@@ -6,7 +6,6 @@
 #include "offsetof_def.h"
 
 #undef MAX
-#define LOG_NAME ("ma_vu")
 
 CMA_VU::CUpper::CUpper()
     : CMIPSInstructionFactory(MIPS_REGSIZE_32)
@@ -33,7 +32,8 @@ void CMA_VU::CUpper::CompileInstruction(uint32 nAddress, CMipsJitter* codeGen, C
 
 	if((m_nOpcode & (VUShared::VU_UPPEROP_BIT_D | VUShared::VU_UPPEROP_BIT_T)) != 0)
 	{
-		CLog::GetInstance().Warn(LOG_NAME, "0x%08X: m_nOpcode : 0x%08X - Either the D and/or T bits are set!\r\n", nAddress, m_nOpcode);
+		m_codeGen->PushCst(2);
+		m_codeGen->PullRel(offsetof(CMIPS, m_State.nHasException));
 	}
 
 	//Check I bit

diff --git a/Source/ee/PS2OS.cpp b/Source/ee/PS2OS.cpp
@@ -732,6 +732,7 @@ void CPS2OS::AssembleInterruptHandler()
 		generateIntHandler(assembler, CINTC::INTC_LINE_VBLANK_END);
 		generateIntHandler(assembler, CINTC::INTC_LINE_VIF0);
 		generateIntHandler(assembler, CINTC::INTC_LINE_VIF1);
+		generateIntHandler(assembler, CINTC::INTC_LINE_VU1);
 		generateIntHandler(assembler, CINTC::INTC_LINE_IPU);
 		generateIntHandler(assembler, CINTC::INTC_LINE_TIMER0);
 		generateIntHandler(assembler, CINTC::INTC_LINE_TIMER1);

diff --git a/Source/ee/Vpu.cpp b/Source/ee/Vpu.cpp
@@ -51,11 +51,21 @@ void CVpu::Execute(int32 quota)
 #endif
 
 	m_ctx->m_executor->Execute(quota);
-	if(m_ctx->m_State.nHasException)
+	switch(m_ctx->m_State.nHasException)
 	{
+	case 1:
 		//E bit encountered
 		m_vuState = VU_STATE_READY;
 		VuStateChanged(m_vuState);
+		break;
+	case 2:
+		//T bit encountered
+		m_vuState = VU_STATE_STOPPED;
+		VuStateChanged(m_vuState);
+		VuInterruptTriggered();
+		break;
+	default:
+		break;
 	}
 }
 

diff --git a/Source/ee/Vpu.h b/Source/ee/Vpu.h
@@ -48,6 +48,7 @@ class CVpu
 	};
 
 	typedef Framework::CSignal<void(VU_STATE)> VuStateChangedEvent;
+	typedef Framework::CSignal<void()> VuInterruptTriggeredEvent;
 
 	CVpu(unsigned int, const VPUINIT&, CGIF&, CINTC&, uint8*, uint8*);
 	virtual ~CVpu();
@@ -96,6 +97,7 @@ class CVpu
 #endif
 
 	VuStateChangedEvent VuStateChanged;
+	VuInterruptTriggeredEvent VuInterruptTriggered;
 
 protected:
 	typedef std::unique_ptr<CVif> VifPtr;

diff --git a/Source/ee/VuBasicBlock.cpp b/Source/ee/VuBasicBlock.cpp
@@ -439,12 +439,15 @@ CVuBasicBlock::INTEGER_BRANCH_DELAY_INFO CVuBasicBlock::ComputeTrailingIntegerBr
 	auto endLoOps = arch->GetAffectedOperands(&m_context, endOpcodeLoAddr, endOpcodeLo);
 
 	// assume this is same as for the case if there was a conditional branch at the end.
-	uint32 fmacDelayOnBranch = fmacStallDelays[fmacStallDelays.size() - 2];
-	if((endLoOps.writeI != 0) && !endLoOps.branchValue && (fmacDelayOnBranch == 0))
+	if(fmacStallDelays.size() > 1)
 	{
-		// we need to save the value of the integer register before the instruction is executed
-		result.regIndex = endLoOps.writeI;
-		result.saveRegAddress = adjustedEnd;
+		uint32 fmacDelayOnBranch = fmacStallDelays[fmacStallDelays.size() - 2];
+		if((endLoOps.writeI != 0) && !endLoOps.branchValue && (fmacDelayOnBranch == 0))
+		{
+			// we need to save the value of the integer register before the instruction is executed
+			result.regIndex = endLoOps.writeI;
+			result.saveRegAddress = adjustedEnd;
+		}
 	}
 	return result;
 }