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Merge pull request #41 from mabrains/prim_naming
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Updating primitive names
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mithro authored Aug 2, 2022
2 parents a134ccb + df0f549 commit 3cd88ef
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2 changes: 1 addition & 1 deletion docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__1.rst
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ This document serves as the data sheet for **GlobalFoundries 0.18µm Green (5.0V
1.2 Device List
---------------

nmos_6p0, pmos_6p0, pn_6p0, np_6p0, ppolyf_u, nmoscap_6p0, nmos_6p0_sab, pmos_6p0_sab.
nfet_06v0, pfet_06v0, diode_pd2nw_06v0, diode_nd2ps_06v0, ppolyf_u, cap_nmos_06v0, nfet_06v0_dss, pfet_06v0_dss.

1.3 Design Manual
-----------------
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4 changes: 2 additions & 2 deletions docs/analog/model_parameters/HV/HV_4_1.rst
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,7 @@ The following plots show an example of the results when fet_mc_skew is set to di

The value of the fet_mc_skew parameter can be any real number greater than 0. When simulating MC parallel device, in order to get consistent mismatch results, both “m” and “par” multiplicity factors parameters are needed. It must instantiated as follows:

- Xm11 2 0 0nmos_10p0_asymw=10u l=10u m=10
- Xm11 2 0 0nfet_10v0_asymw=10u l=10u m=10

- Xm21 2 0 0pmos_10p0_asymw=10u l=10u m=10
- Xm21 2 0 0pfet_10v0_asymw=10u l=10u m=10

4 changes: 2 additions & 2 deletions docs/analog/model_parameters/HV/tables_clear/1_MOSFETs.csv
Original file line number Diff line number Diff line change
Expand Up @@ -3,5 +3,5 @@ Model Name,Device Description,BSIM Version,Scalable,"Corner Model
Available","Global

Statistical",NF scaling
nmos_10p0_asym,Asymmetrical LDNMOS (10V),4.6,Y,Y,Y,N
pmos_10p0_asym,Asymmetrical LDPMOS (10V),4.6,Y,Y,Y,N
nfet_10v0_asym,Asymmetrical LDNMOS (10V),4.6,Y,Y,Y,N
pfet_10v0_asym,Asymmetrical LDPMOS (10V),4.6,Y,Y,Y,N
Original file line number Diff line number Diff line change
Expand Up @@ -3,12 +3,12 @@
(BSIM Version)","Parameter

Value",W (um),L (um),M,as (m^2),ad (m^2),ps(m),pd (m)
"nmos_10p0_asym
"nfet_10v0_asym

(BSIM 4.6)",Min,4,0.6,1,-,-,-,-
,Max,50,20,100,-,-,-,-
,Default,25,0.6,1,1.2E-11,3.7E-11,5.10E-05,5.30E-05
"pmos_10p0_asym
"pfet_10v0_asym

(BSIM 4.6)",Min,4,0.6,1,-,-,-,-
,Max,50,20,100,-,-,-,-
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4 changes: 2 additions & 2 deletions docs/analog/model_parameters/HV/tables_clear/5_Nominal1.csv
Original file line number Diff line number Diff line change
@@ -1,11 +1,11 @@
EP Specification,,,,Measurement,
Device (W/L), Model,Idsat (uA/um),Vtlin,Idsat (uA/um),Vtlin (V)
"nmos_10p0_asym
"nfet_10v0_asym

(25/0.6),nf=1",slow,444,0.97,\-,\-
,typical ,535,0.84,543,0.83
, fast ,626,0.71,\-,\-
"pmos_10p0_asym
"pfet_10v0_asym

(25/0.6),nf=1",slow ,-200,-0.88,\-,\-
,typical ,-260,-1.02,-268,-1.02
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
MOSFET Model,"Both Local

and Global",Description
nmos_10p0_asym,global only,Statistical BSIM4 model for Asym 10 V LDNMOS
pmos_10p0_asym,global only,Statistical BSIM4 model for Asym 10V LDPMOS
nfet_10v0_asym,global only,Statistical BSIM4 model for Asym 10 V LDNMOS
pfet_10v0_asym,global only,Statistical BSIM4 model for Asym 10V LDPMOS
24 changes: 12 additions & 12 deletions docs/analog/model_parameters/LV/LV_2_5.rst
Original file line number Diff line number Diff line change
Expand Up @@ -7,20 +7,20 @@ The measured and simulated results are obtained using the following bias conditi

where

- Vdd = 3.3V for nmos_3p3
- Vdd = 3.3V for nfet_03v3

- Vdd =-3.3V for pmos_3p3
- Vdd =-3.3V for pfet_03v3

- Vdd = 6V for nmos_6p0
- Vdd = 6V for nfet_06v0

- Vdd =-6V for pmos_6p0
- Vdd =-6V for pfet_06v0

- Vdd = 6V for nmos_6p0_nat
- Vdd = 6V for nfet_06v0_nvt

.. note::
Vth0 is the measured or simulated threshold voltage obtained using the max Gm method at Vd = 0.05V. For 6.0V native NMOS, Vth0 is measured and simulated at Vd=0.1V. Vth1 is the simulated threshold voltage obtained using the BSIM equation. These two values may have a difference.

2.5.1 nmos_3p3 and pmos_3p3 (3.3V)
2.5.1 nfet_03v3 and pfet_03v3 (3.3V)
..................................

.. csv-table::
Expand All @@ -35,23 +35,23 @@ where

.. note::

- nmos_3p3_sab SAB Length on Drain side SAB DOP: 1.78um , Source Side SAB SOP: 0.48um
- nfet_03v3_dss SAB Length on Drain side SAB DOP: 1.78um , Source Side SAB SOP: 0.48um

- pmos_3p3_sab SAB Length on Drain side SAB DOP: 1.78um, Source Side SAB SOP: 0.48um
- pfet_03v3_dss SAB Length on Drain side SAB DOP: 1.78um, Source Side SAB SOP: 0.48um

2.5.3 nmos_6p0 and pmos_6p0 (6V)
2.5.3 nfet_06v0 and pfet_06v0 (6V)
................................

.. csv-table::
:file: tables_clear/21_mos_6p0.csv

.. note::

- nmos_6p0_sab Length of SAB on Drain side : 3.78um, Length of SAB on Source side: 0.28um
- nfet_06v0_dss Length of SAB on Drain side : 3.78um, Length of SAB on Source side: 0.28um

- pmos_6p0_sab Length of SAB on Drain side : 2.78um, Length of SAB on Source side: 0.28um
- pfet_06v0_dss Length of SAB on Drain side : 2.78um, Length of SAB on Source side: 0.28um

2.5.4 nmos_6p0 and pmos_6p0 (5V)
2.5.4 nfet_06v0 and pfet_06v0 (5V)
................................

.. csv-table::
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2 changes: 1 addition & 1 deletion docs/analog/model_parameters/LV/LV_6.rst
Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,7 @@ Xxx node_1 node_2 moscap_model_name w = l=

**Examples:**

Xc1 1 2 nmoscap_3p3 w=50u l=50u
Xc1 1 2 cap_nmos_03v3 w=50u l=50u

6.2 How to use the Models
-------------------------
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10 changes: 5 additions & 5 deletions docs/analog/model_parameters/LV/LV_8_1.rst
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@@ -1,7 +1,7 @@
8.1 MOSFETs
===========

8.1.1 nmos_3p3 (3.3V)
8.1.1 nfet_03v3 (3.3V)
.....................

8.1.1.1 CV - Characteristics
Expand Down Expand Up @@ -88,7 +88,7 @@
:align: center
:alt: I/f Noise - Characteristics

8.1.2 pmos_3p3 (3.3V)
8.1.2 pfet_03v3 (3.3V)
.....................

8.1.2.1 CV - Characteristics
Expand Down Expand Up @@ -175,7 +175,7 @@
:align: center
:alt: I/f Noise - Characteristics

8.1.3 nmos_6p0 (6.0V)
8.1.3 nfet_06v0 (6.0V)
.....................

8.1.3.1 CV - Characteristics
Expand Down Expand Up @@ -216,7 +216,7 @@
:align: center
:alt: I/f Noise - Characteristics

8.1.4 pmos_6p0 (6.0V)
8.1.4 pfet_06v0 (6.0V)
.....................

8.1.4.1 CV - Characteristics
Expand Down Expand Up @@ -263,7 +263,7 @@
:align: center
:alt: I/f Noise - Characteristics

8.1.5 nmos_6p0_nat (6.0V)
8.1.5 nfet_06v0_nvt (6.0V)
.........................

8.1.5.1 IV - Characteristics
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10 changes: 5 additions & 5 deletions docs/analog/model_parameters/LV/tables_clear/00_rev.csv
Original file line number Diff line number Diff line change
Expand Up @@ -124,9 +124,9 @@ capacitance to correlate with the diode update

1. Updated leakage current for 6V PMOS

2. Added paper model SAB devices nmos_3p3_sab, pmos_3p3_sab, nmos_6p0_sab,
2. Added paper model SAB devices nfet_03v3_dss, pfet_03v3_dss, nfet_06v0_dss,

pmos_6p0_sab for 3.3V NMOS/PMOS and 6V NMOS/PMOS
pfet_06v0_dss for 3.3V NMOS/PMOS and 6V NMOS/PMOS

3. Added instance parameter ""s"" to allow defining resistors in series connection
"
Expand Down Expand Up @@ -173,11 +173,11 @@ ppolyf_u_2k_6p0

4. Added mismatch model for pplus_u/npolyf_u/ppolyf_u/nplus_u

5. Added global statistical model for mim_1p0fF/mim_1p5fF/mim_2p0fF
5. Added global statistical model for cap_mim_1p0fF/cap_mim_1p5fF/cap_mim_2p0fF

6. Added global & mismatch model for vpnp_5x5/ vpnp_0p42x10/ vpnp_0p42x5/
6. Added global & mismatch model for pnp_05p00x05p00/ pnp_10p00x00p42/ pnp_05p00x00p42/

vpnp_10x10
pnp_10p00x10p00

7. Added global statistical model for VNPN
"
18 changes: 9 additions & 9 deletions docs/analog/model_parameters/LV/tables_clear/03_MOSFETs.csv
Original file line number Diff line number Diff line change
Expand Up @@ -5,12 +5,12 @@ Model","Global
Statistical","Local

Statistical"
nmos_3p3,BSIM4 model for 0.18um 3.3V NMOS,Y,Y,Y,Y
pmos_3p3,BSIM4 model for 0.18um 3.3V PMOS,Y,Y,Y,Y
nmos_6p0,BSIM4 model for 0.18um 6V NMOS,Y,Y,Y,Y
pmos_6p0,BSIM4 model for 0.18um 6V PMOS,Y,Y,Y,Y
nmos_3p3_sab,Subcircuit model for 3.3V NMOS with SAB,Y,Y,Y,Y
pmos_3p3_sab,Subcircuit model for 3.3V PMOS with SAB,Y,Y,Y,Y
nmos_6p0_sab,Subcircuit model for 6.0V NMOS with SAB,Y,Y,Y,Y
pmos_6p0_sab,Subcircuit model for 6.0V PMOS with SAB,Y,Y,Y,Y
nmos_6p0_nat,BSIM4 model for 0.18um 6V native NMOS,Y,Y,Y,N
nfet_03v3,BSIM4 model for 0.18um 3.3V NMOS,Y,Y,Y,Y
pfet_03v3,BSIM4 model for 0.18um 3.3V PMOS,Y,Y,Y,Y
nfet_06v0,BSIM4 model for 0.18um 6V NMOS,Y,Y,Y,Y
pfet_06v0,BSIM4 model for 0.18um 6V PMOS,Y,Y,Y,Y
nfet_03v3_dss,Subcircuit model for 3.3V NMOS with SAB,Y,Y,Y,Y
pfet_03v3_dss,Subcircuit model for 3.3V PMOS with SAB,Y,Y,Y,Y
nfet_06v0_dss,Subcircuit model for 6.0V NMOS with SAB,Y,Y,Y,Y
pfet_06v0_dss,Subcircuit model for 6.0V PMOS with SAB,Y,Y,Y,Y
nfet_06v0_nvt,BSIM4 model for 0.18um 6V native NMOS,Y,Y,Y,N
16 changes: 8 additions & 8 deletions docs/analog/model_parameters/LV/tables_clear/04_Diodes.csv
Original file line number Diff line number Diff line change
Expand Up @@ -3,12 +3,12 @@ Model Name,Description,Scalable,"Corner
Model","Global

Statistical"
np_3p3,Model for thin gate N+/Psub diode,Y,Y,N
pn_3p3,Model for thin gate P+/Nwell diode,Y,Y,N
np_6p0,Model for thin gate N+/Psub diode,Y,Y,N
pn_6p0,Model for thin gate P+/Nwell diode,Y,Y,N
nwp_3p3,Model for 3.3V Nwell/Psub diode,Y,Y,N
nwp_6p0,Model for 6V Nwell/Psub diode,Y,Y,N
dnwpw,Model for PWELL/DNWELL diode,Y,Y,N
dnwps,Model for DNWELL/Psub diode,Y,Y,N
diode_nd2ps_03v3,Model for thin gate N+/Psub diode,Y,Y,N
diode_pd2nw_03v3,Model for thin gate P+/Nwell diode,Y,Y,N
diode_nd2ps_06v0,Model for thin gate N+/Psub diode,Y,Y,N
diode_pd2nw_06v0,Model for thin gate P+/Nwell diode,Y,Y,N
diode_nw2ps_03v3,Model for 3.3V Nwell/Psub diode,Y,Y,N
diode_nw2ps_06v0,Model for 6V Nwell/Psub diode,Y,Y,N
diode_pw2dw,Model for PWELL/DNWELL diode,Y,Y,N
diode_dw2ps,Model for DNWELL/Psub diode,Y,Y,N
sc_diode,Model for Schottky diode,Y,Y,N
16 changes: 8 additions & 8 deletions docs/analog/model_parameters/LV/tables_clear/05_BJTs.csv
Original file line number Diff line number Diff line change
Expand Up @@ -5,10 +5,10 @@ Model","Global
Statistical","Local

Statistical"
vpnp_10x10,"GP model for vertical PNP with
pnp_10p00x10p00,"GP model for vertical PNP with

emitter size of 10um x 10um",N,Y,Y,Y
vpnp_5x5,"GP model for vertical PNP with
pnp_05p00x05p00,"GP model for vertical PNP with

emitter size of 5um x 5um",N,Y,Y,Y
vpnp_0.42x10,"GP model for vertical PNP with
Expand All @@ -17,21 +17,21 @@ emitter size of 0.42um x 10um",N,Y,Y,Y
vpnp_0.42x5,"GP model for vertical PNP with

Emitter size of 0.42um x 5um",N,Y,Y,Y
vnpn_10x10,"GP model for vertical NPN with
npn_10p00x10p00,"GP model for vertical NPN with

emitter size of 10umx10um",N,Y,Y,N
vnpn_5x5,"GP model for vertical NPN with
npn_05p00x05p00,"GP model for vertical NPN with

emitter size of 5umx5um",N,Y,Y,N
vnpn_0p54x16,"GP model for VNPN with
npn_00p54x16p00,"GP model for VNPN with

emitter size of 0.54umx16um",N,Y,Y,N
vnpn_0p54x8,"GP model for VNPN with
npn_00p54x08p00,"GP model for VNPN with

emitter size of 0.54umx8um",N,Y,Y,N
vnpn_0p54x4,"GP model for VNPN with
npn_00p54x04p00,"GP model for VNPN with

emitter size of 0.54umx4um",N,Y,Y,N
vnpn_0p54x2,"GP model for VNPN with
npn_00p54x02p00,"GP model for VNPN with

emitter size of 0.54umx2um",N,Y,Y,N
16 changes: 8 additions & 8 deletions docs/analog/model_parameters/LV/tables_clear/07_MOSCAP.csv
Original file line number Diff line number Diff line change
Expand Up @@ -3,11 +3,11 @@ Model Name,Description,Scalable,"Corner
Model","Statistical

Model"
nmoscap_3p3,Model for nominal IO 3.3V inversion-mode NMOS capacitor,Y,Y,N
pmoscap_3p3,Model for nominal IO 3.3V inversion-mode PMOS capacitor,Y,Y,N
nmoscap_6p0,Model for nominal IO 6V inversion -mode NMOS capacitor,Y,Y,N
pmoscap_6p0,Model for nominal IO 6V inversion -mode PMOS capacitor,Y,Y,N
nmoscap_3p3_b,Model for nominal IO 3.3V NMOS in Nwell capacitor,Y,Y,N
pmoscap_3p3_b,Model for nominal IO 3.3V PMOS in Pwell capacitor,Y,Y,N
nmoscap_6p0_b,Model for nominal IO 6V NMOS in Nwell capacitor,Y,Y,N
pmoscap_6p0_b,Model for nominal IO 6V PMOS in Pwell capacitor,Y,Y,N
cap_nmos_03v3,Model for nominal IO 3.3V inversion-mode NMOS capacitor,Y,Y,N
cap_pmos_03v3,Model for nominal IO 3.3V inversion-mode PMOS capacitor,Y,Y,N
cap_nmos_06v0,Model for nominal IO 6V inversion -mode NMOS capacitor,Y,Y,N
cap_pmos_06v0,Model for nominal IO 6V inversion -mode PMOS capacitor,Y,Y,N
cap_nmos_03v3_b,Model for nominal IO 3.3V NMOS in Nwell capacitor,Y,Y,N
cap_pmos_03v3_b,Model for nominal IO 3.3V PMOS in Pwell capacitor,Y,Y,N
cap_nmos_06v0_b,Model for nominal IO 6V NMOS in Nwell capacitor,Y,Y,N
cap_pmos_06v0_b,Model for nominal IO 6V PMOS in Pwell capacitor,Y,Y,N
6 changes: 3 additions & 3 deletions docs/analog/model_parameters/LV/tables_clear/08_MIM.csv
Original file line number Diff line number Diff line change
Expand Up @@ -5,17 +5,17 @@ Model","Global
Statistical","Local

Statistical"
nmoscap_3p3,"Model for 1.5fF/um2 MIM
cap_nmos_03v3,"Model for 1.5fF/um2 MIM

(*)-usable for Volt <=6V

across capacitor",Y,Y,Y,N
pmoscap_3p3,"Model for 1.0fF/um2 MIM
cap_pmos_03v3,"Model for 1.0fF/um2 MIM

(*)-usable for Volt <=6V

across capacitor",Y,Y,Y,N
nmoscap_6p0,"Model for 2.0fF/um2 MIM
cap_nmos_06v0,"Model for 2.0fF/um2 MIM

(*)-usable for Volt <=6V

Expand Down
4 changes: 2 additions & 2 deletions docs/analog/model_parameters/LV/tables_clear/10_LV_NMOS.csv
Original file line number Diff line number Diff line change
Expand Up @@ -3,12 +3,12 @@
(BSIM Version)","Parameter

Value",W,L,nf,as,ad,ps,pd,nrs,nrd,dtemp
"nmos_3p3
"nfet_03v3

(BSIM 4.5)",Min,0.22,0.28,1,-,-,-,-,-,-,-
,Max,100,50,-,-,-,-,-,-,-,-
,Default,0,0,1,0,0,0,0,0,0,0
"pmos_3p3
"pfet_03v3

(BSIM 4.5)",Min,0.22,0.28,1,-,-,-,-,-,-,-
,Max,50,100,-,-,-,-,-,-,-,-
Expand Down
6 changes: 3 additions & 3 deletions docs/analog/model_parameters/LV/tables_clear/11_MV_NMOS.csv
Original file line number Diff line number Diff line change
Expand Up @@ -3,17 +3,17 @@
(BSIM Version)","Parameter

Value",W,L,nf,as,ad,ps,pd,nrs,nrd,dtemp
"nmos_6p0
"nfet_06v0

(BSIM 4.5)",Min,0.3,0.6,1,-,-,-,-,-,-,-
,Max,100,50,-,-,-,-,-,-,-,-
,Default,0,0,1,0,0,0,0,0,0,0
"pmos_6p0
"pfet_06v0

(BSIM 4.5)",Min,0.3,0.5,1,-,-,-,-,-,-,-
,Max,100,50,-,-,-,-,-,-,-,-
,Default,0,0,1,0,0,0,0,0,0,0
"nmos_6p0_nat
"nfet_06v0_nvt

(BSIM 4.6)",Min,0.8,1.8,1,-,-,-,-,-,-,-
,Max,100,50,-,-,-,-,-,-,-,-
Expand Down
10 changes: 5 additions & 5 deletions docs/analog/model_parameters/LV/tables_clear/17_Noise.csv
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
Device,Vds (V),Vgs (V),W x L (um x um)
nmos_3p3,"0.1, 1.8, 3.3","0.8, 1.8, 3.3",10x0.28
pmos_3p3,"-0.1, -1.8, -3.3","-0.8, -1.8, -3.3",10x0.28
nmos_6p0,"0.1, 3, 6","1, 3, 6",10x0.7
pmos_6p0,"-0.1, -3, -6","-1, -3, -6",10x0.55
nmos_6p0_nat,"0.1, 3, 6","0.3, 3, 6",10x1.8
nfet_03v3,"0.1, 1.8, 3.3","0.8, 1.8, 3.3",10x0.28
pfet_03v3,"-0.1, -1.8, -3.3","-0.8, -1.8, -3.3",10x0.28
nfet_06v0,"0.1, 3, 6","1, 3, 6",10x0.7
pfet_06v0,"-0.1, -3, -6","-1, -3, -6",10x0.55
nfet_06v0_nvt,"0.1, 3, 6","0.3, 3, 6",10x1.8
4 changes: 2 additions & 2 deletions docs/analog/model_parameters/LV/tables_clear/19_mos_3p3.csv
Original file line number Diff line number Diff line change
@@ -1,11 +1,11 @@
EP Specification,,,,Measurement,
Device (W/L) ,Model,Idsat (uA/um),Vth0 (V),Idsat (uA/um),Vth0 (V)
"nmos_3p3
"nfet_03v3

(10/0.28)",slow ,430,0.73,\-,\-
,typical,510,0.63,508,0.644
,fast ,590,0.53,\-,\-
"pmos_3p3
"pfet_03v3

(10/0.28)",slow,-210,-0.85,\-,\-
,typical,-250,-0.73,-254.1,-0.733
Expand Down
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