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Fix NBAs to unpacked arrays of unpacked structs
This happened to work before verilator#5516, by creating a whole shadow copy of the entire array. Revert back to that behaviour for now, it will be slow, but works still. Fixes verilator#5590
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#!/usr/bin/env python3 | ||
# DESCRIPTION: Verilator: Verilog Test driver/expect definition | ||
# | ||
# Copyright 2024 by Wilson Snyder. This program is free software; you | ||
# can redistribute it and/or modify it under the terms of either the GNU | ||
# Lesser General Public License Version 3 or the Perl Artistic License | ||
# Version 2.0. | ||
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 | ||
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import vltest_bootstrap | ||
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test.scenarios('simulator') | ||
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test.compile() | ||
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test.execute(check_finished=True) | ||
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test.passes() |
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// DESCRIPTION: Verilator: Verilog Test module | ||
// | ||
// This file ONLY is placed under the Creative Commons Public Domain, for | ||
// any use, without warranty, 2024 by Wilson Snyder. | ||
// SPDX-License-Identifier: CC0-1.0 | ||
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`define stop $stop | ||
`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0) | ||
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module t(clk); | ||
input clk; | ||
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logic [31:0] cyc = 0; | ||
always @(posedge clk) begin | ||
cyc <= cyc + 1; | ||
if (cyc == 99) begin | ||
$write("*-* All Finished *-*\n"); | ||
$finish; | ||
end | ||
end | ||
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`define at_posedge_clk_on_cycle(n) always @(posedge clk) if (cyc == n) | ||
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struct { | ||
int foo; | ||
int bar; | ||
} arr [2]; | ||
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initial begin | ||
arr[0].foo = 0; | ||
arr[0].bar = 100; | ||
arr[1].foo = 0; | ||
arr[1].bar = 100; | ||
end | ||
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`at_posedge_clk_on_cycle(0) begin | ||
for (int i = 0; i < 2; ++i) begin | ||
`checkh(arr[i].foo, 0); | ||
`checkh(arr[i].bar, 100); | ||
end | ||
end | ||
`at_posedge_clk_on_cycle(1) begin | ||
for (int i = 0; i < 2; ++i) begin | ||
`checkh(arr[i].foo, 0); | ||
`checkh(arr[i].bar, 100); | ||
end | ||
arr[0].foo <= 0; | ||
arr[0].bar <= -0; | ||
arr[1].foo <= 1; | ||
arr[1].bar <= -1; | ||
for (int i = 0; i < 2; ++i) begin | ||
`checkh(arr[i].foo, 0); | ||
`checkh(arr[i].bar, 100); | ||
end | ||
end | ||
`at_posedge_clk_on_cycle(2) begin | ||
for (int i = 0; i < 2; ++i) begin | ||
`checkh(arr[i].foo, i); | ||
`checkh(arr[i].bar, -i); | ||
end | ||
arr[0].foo <= ~0; | ||
arr[0].bar <= 0; | ||
arr[1].foo <= ~1; | ||
arr[1].bar <= 1; | ||
for (int i = 0; i < 2; ++i) begin | ||
`checkh(arr[i].foo, i); | ||
`checkh(arr[i].bar, -i); | ||
end | ||
end | ||
`at_posedge_clk_on_cycle(3) begin | ||
for (int i = 0; i < 2; ++i) begin | ||
`checkh(arr[i].foo, ~i); | ||
`checkh(arr[i].bar, i); | ||
end | ||
arr[0].foo <= -1; | ||
arr[0].bar <= -2; | ||
arr[1].foo <= -1; | ||
arr[1].bar <= -2; | ||
for (int i = 0; i < 2; ++i) begin | ||
`checkh(arr[i].foo, ~i); | ||
`checkh(arr[i].bar, i); | ||
end | ||
end | ||
`at_posedge_clk_on_cycle(4) begin | ||
for (int i = 0; i < 2; ++i) begin | ||
`checkh(arr[i].foo, -1); | ||
`checkh(arr[i].bar, -2); | ||
end | ||
end | ||
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endmodule |