Add peripheral signals for the USB external PHY (#1463)

These signal definitions appear to be missing, and it seems like these
are needed to use an external PHY.  I copied these values from the
gpio_sig_map.h headers in the ESP-IDF.

esp-hal/CHANGELOG.md

@@ -21,6 +21,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - Async uart now reports interrupt errors(overflow, glitch, frame error, parity) back to user of read/write. uart clock decimal part configured for c2,c3,s3 (#1168, #1445)
 - Add mechanism to configure UART source clock (#1416)
 - `GpioPin` got a function `set_state(bool)` (#1462)
+- Add definitions of external USB PHY peripheral I/O signals
 
 ### Fixed
 

esp-hal/src/soc/esp32s2/gpio.rs

@@ -291,6 +291,9 @@ pub enum InputSignal {
     PCNT3_SIG_CH1     = 52,
     PCNT3_CTRL_CH0    = 53,
     PCNT3_CTRL_CH1    = 54,
+    USB_EXTPHY_VP     = 61,
+    USB_EXTPHY_VM     = 62,
+    USB_EXTPHY_RCV    = 63,
     USB_OTG_IDDIG     = 64,
     USB_OTG_AVALID    = 65,
     USB_SRP_BVALID    = 66,
@@ -361,6 +364,9 @@ pub enum OutputSignal {
     I2CEXT0_SCL      = 29,
     I2CEXT0_SDA      = 30,
     SDIO_TOHOST_INT  = 31,
+    USB_EXTPHY_OEN   = 61,
+    USB_EXTPHY_VPO   = 63,
+    USB_EXTPHY_VMO   = 64,
     SPI3_CLK         = 72,
     SPI3_Q           = 73,
     SPI3_D           = 74,

esp-hal/src/soc/esp32s3/gpio.rs

@@ -126,6 +126,9 @@ pub enum InputSignal {
     I2S0I_SD1         = 51,
     I2S0I_SD2         = 52,
     I2S0I_SD3         = 53,
+    USB_EXTPHY_VP     = 55,
+    USB_EXTPHY_VM     = 56,
+    USB_EXTPHY_RCV    = 57,
     USB_OTG_IDDIG     = 58,
     USB_OTG_AVALID    = 59,
     USB_SRP_BVALID    = 60,
@@ -224,6 +227,9 @@ pub enum OutputSignal {
     I2S1O_SD        = 30,
     I2S1I_BCK       = 31,
     I2S1I_WS        = 32,
+    USB_EXTPHY_OEN  = 55,
+    USB_EXTPHY_VPO  = 57,
+    USB_EXTPHY_VMO  = 58,
     SPI3_CLK        = 66,
     SPI3_Q          = 67,
     SPI3_D          = 68,