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Fix potential double-update of a buffer in Verilog Projecdt #2091

Merged
merged 2 commits into from
Feb 1, 2024
Merged

Fix potential double-update of a buffer in Verilog Projecdt #2091

merged 2 commits into from
Feb 1, 2024

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hzeller
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@hzeller hzeller commented Feb 1, 2024

The VerilogProject is sensitive to adding the exact same file content twice, as it buildls a string index mapping back to the file.

The symbol table was ignnoring updates with files that might not be parseable, where the last_good() was essentially not changing, i.e. it was pushing the same last_good() content (with the exact same string view content) to the project which made it not happy. This problematic handling was probably highlighted by the recent fix of #2078 which made sure all registering and unregistering of files is accounted for.

The actual fix is small, so split into two commits

  • 75463ff is refactoring the current notification and moves from the language server to handled more locally in the symbol table.
  • fd195a5 fixes the issue at hand. Essentially passing the current() parse instead of last_good() to verilog project.

Instead of in the language server, define the callback that updates
the symbol table in the symbol table itself (CreateBufferTrackerListener()).

Use that in various places, including the unit tests that it
simplifies.
Explained in the unit test. TL;DR: if we only update with last_good()
content, we might update with the same good parse multiple times, which
the string range index will detect and CHECK()-complain.
@hzeller hzeller requested a review from fangism February 1, 2024 16:58
@hzeller hzeller merged commit 6c218e7 into chipsalliance:master Feb 1, 2024
29 of 31 checks passed
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2 participants