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fixe #2278
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Bhavin-umatiya committed Dec 24, 2024
1 parent 47836c4 commit 2799596
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Showing 3 changed files with 60 additions and 12 deletions.
39 changes: 39 additions & 0 deletions .vscode/launch.json
Original file line number Diff line number Diff line change
@@ -0,0 +1,39 @@
{
// Use IntelliSense to learn about possible attributes.
// Hover to view descriptions of existing attributes.
// For more information, visit: https://go.microsoft.com/fwlink/?linkid=830387
"version": "0.2.0",
"configurations": [
{
"name": "(gdb) Attach",
"type": "cppdbg",
"request": "attach",
"program": "enter program name, for example ${workspaceFolder}/a.exe",
"MIMode": "gdb",
"miDebuggerPath": "/path/to/gdb",
"setupCommands": [
{
"description": "Enable pretty-printing for gdb",
"text": "-enable-pretty-printing",
"ignoreFailures": true
},
{
"description": "Set Disassembly Flavor to Intel",
"text": "-gdb-set disassembly-flavor intel",
"ignoreFailures": true
}
]
},
{
"name": "(Windows) Launch",
"type": "cppvsdbg",
"request": "launch",
"program": "enter program name, for example ${workspaceFolder}/a.exe",
"args": [],
"stopAtEntry": false,
"cwd": "${fileDirname}",
"environment": [],
"console": "externalTerminal"
}
]
}
24 changes: 13 additions & 11 deletions verible/verilog/analysis/descriptions.h
Original file line number Diff line number Diff line change
Expand Up @@ -35,14 +35,16 @@ struct LintConfigParameterDescriptor {
std::string description;
};

struct LintRuleDescriptor {
LintRuleId name; // ID/name of the rule.
absl::string_view topic; // section in style-guide
std::string desc; // Detailed description.
std::vector<LintConfigParameterDescriptor> param;
};

} // namespace analysis
} // namespace verilog

#endif // VERIBLE_VERILOG_ANALYSIS_DESCRIPTIONS_H_
std::string format_long_description(const std::string& description) {
const size_t max_length = 80;
std::string formatted_desc;
size_t start = 0;

while (start < description.size()) {
size_t end = std::min(start + max_length, description.size());
formatted_desc += description.substr(start, end - start) + "\n ";
start = end;
}

return formatted_desc;
}
9 changes: 8 additions & 1 deletion verible/verilog/analysis/verilog-linter.cc
Original file line number Diff line number Diff line change
Expand Up @@ -360,7 +360,8 @@ absl::Status PrintRuleInfo(std::ostream *os,
}

void GetLintRuleDescriptionsHelpFlag(std::ostream *os,
absl::string_view flag_value) {
absl::string_view flag_value,
bool verbose) {
// Set up the map.
auto rule_map = analysis::GetAllRuleDescriptions();
for (const auto &rule_id : analysis::kDefaultRuleSet) {
Expand All @@ -380,9 +381,15 @@ void GetLintRuleDescriptionsHelpFlag(std::ostream *os,
*os << status.message();
return;
}

// If verbose flag is set, print example for the rule
if (verbose) {
*os << "\nExample: " << rule.second.GetExample() << "\n"; // Assuming rule.second has GetExample()
}
}
}


void GetLintRuleFile(std::ostream *os, const LinterConfiguration &config) {
// This rule bundle contains only a list of enabled rules. There
// are also no param's defined (an empty string), unless the user
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