stage -> module typo fix

Signed-off-by: Krzysztof Boronski <[email protected]>
chipsalliance · Jul 6, 2022 · c73e210 · c73e210
1 parent 7b7c559
commit c73e210
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/f4pga/module_runner.py b/f4pga/module_runner.py
@@ -146,4 +146,4 @@ def module_exec(module: Module, ctx: ModRunCtx):
     except Exception as e:
         raise ModuleFailException(module.name, 'exec', e)
 
-    sfprint(1, f'Module `{Style.BRIGHT + module.name + Style.RESET_ALL}` has finished its work!')
+    sfprint(1, f'Stage `{Style.BRIGHT + module.name + Style.RESET_ALL}` has finished its work!')