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Testers2+interprocesstester#798

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ucbjrl wants to merge 172 commits intotesters2chipsalliance/chisel:testers2from testers2+interprocesstesterchipsalliance/chisel:testers2+interprocesstesterCopy head branch name to clipboard

+4,211-294

Commits

Commits on May 2, 2016

• add cpp emulator header files to resources folder

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Commits on May 5, 2016

• refactor ClassicTester

  donggyukim

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Commits on Jun 6, 2016

• can access internal signals

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Commits on Jun 7, 2016

• vcs works

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Commits on Jun 20, 2016

• Rename chisel3 package.

  ucbjrl

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• Rename "package", "import", and explicit references to "chisel3".

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Commits on Jun 23, 2016

• Add Chisel compatibility module.

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Commits on Jun 28, 2016

• Merge branch 'ClassicTesterOpenSoCDev' into renamechisel3_ClassicTesterOpenSoCDev

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Commits on Jun 30, 2016

• Add "Chisel" compatibilty object.

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Commits on Jul 13, 2016

• fix verilator harness gen

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Commits on Jul 14, 2016

• can pass test commands as a tester argument

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Commits on Jul 15, 2016

• fix reset in verilator

  donggyukim

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• get seed from chiselMain

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Commits on Jul 28, 2016

• Support for new annotations.

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• Merge pull request #24 from ucb-bar/fix_harness

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Commits on Aug 3, 2016

• support expect with strings in Backend

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Commits on Aug 8, 2016

• send tokens with clock low

  donggyukim

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• send tokens with clock low

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• compile designs in memory

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• refactor drivers

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• refactor circuit graph

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Commits on Aug 9, 2016

• refactor driver again to hide backends from users

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• use class names for target dir

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• check vcs availability

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• set backends through enviroment variable TESTER_BACKENDS

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Commits on Aug 10, 2016

• Change firrtl file suffix to be ".ir"

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Commits on Aug 12, 2016

• fix chisel main args for tester backends

  donggyukim

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• add reset to signals for verilator

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• update signal map

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• rtl simulation outputs are all propagated

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• add gate-level simulation as a backend

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• rtl simulation outputs are all propagated

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• fix update for verilator

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• fix update for verilator

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Commits on Aug 15, 2016

• ir -> fir again

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Commits on Aug 16, 2016

• Use "official" getWidth interface now that "width" is private[core].

  ucbjrl

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• remove circuit graph from SimApiInterface

  donggyukim

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• remove circuit graph from backends

  donggyukim

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• remove circuit graph

  donggyukim

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Commits on Aug 18, 2016

• enable inferRW

  donggyukim

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Commits on Aug 22, 2016

• Support chisel3 gsdt branch.

  ucbjrl

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Commits on Aug 26, 2016

• signal -> instance

  donggyukim

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• fix verilator gen harness

  donggyukim

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Commits on Aug 27, 2016

• fix process killall

  donggyukim

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Commits on Aug 30, 2016

• Merge branch 'master' into gsdt

  ucbjrl

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Commits on Sep 3, 2016

• long_BANG -> bitWidth

  donggyukim

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Commits on Sep 10, 2016

• add implicit logger for better logging

  donggyukim

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• take Option[File] for logFile, waveform

  donggyukim

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• specify waveform file through ChiselMain or Driver, not through Tester

  donggyukim

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Commits on Sep 14, 2016

• fix logger instantiation

  donggyukim

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Commits on Sep 21, 2016

• Merge branch 'master' into gsdt

  ucbjrl

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• Add chisel3 required imports.

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Commits on Sep 22, 2016

• Add method to obtain main_time and define function sc_time_stamp() - Issue #34.

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  ucbjrl

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• Rename dut->clk to dut->clock (Issue #288).

  ucbjrl

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• Merge pull request #35 from ucb-bar/verilator_time_stamp_34

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• fix clock names for vcs

  donggyukim

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Commits on Sep 23, 2016

• print stack trace for exceptions

  donggyukim

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• flush vpd every cycle for debugging

  donggyukim

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• better excpetion handling in advtester

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• Merge branch 'master' into gsdt

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Commits on Sep 30, 2016

• Remove unnecessary import of out-of-date CompileOptions.

  ucbjrl

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• Put back direction tests using code borrowed from Chisel compatibility package.

  ucbjrl

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• create temp dir to prevent thread unsaftety

  donggyukim

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• make TesterProcess threadsafe

  donggyukim

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• catch compile errors

  donggyukim

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• change signal name for verilator 3.886

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• Merge pull request #39 from ucb-bar/vpdflush

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Commits on Oct 7, 2016

• Merge pull request #40 from ucb-bar/driver_tmp_dir

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• Merge pull request #42 from ucb-bar/verilator-3.886

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Commits on Oct 17, 2016

• Merge branch 'master' into renamechisel3_ClassicTesterOpenSoCDev

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Commits on Oct 18, 2016

• Execute harness plan 3 (#45)

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Commits on Oct 19, 2016

• trying to cleanup, execution stuff

  chick

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• provide command line support for isVerbose

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• removed seed from firrtlbackend constructor

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• Add support for peeking/poking bundles using a map.

  ucbjrl

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Commits on Oct 20, 2016

• Disable local signals until #331 is resolved.

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Commits on Oct 24, 2016

• Merge pull request #46 from ucb-bar/peekpokebundles

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• Merge branch 'master' into execution-cleanup-2

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• fix conflict in peekpoketester

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Commits on Oct 25, 2016

• Merge pull request #51 from ucb-bar/nopeekpokeinternal

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Commits on Oct 28, 2016

• make way to call repl with a chisel circuit (#53)

  chick

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Commits on Oct 31, 2016

• InferReadWriteAnnotation moved down into memlib.

  ucbjrl

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Commits on Nov 2, 2016

• Use TesterOptions verbose instead of the argument. (#55)

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Commits on Nov 8, 2016

• Adhere to new Firrtl Compiler API

  jackkoenig

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Commits on Nov 17, 2016

• Fix some typos. (#61)

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  grebe

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• Fixed problem with lack of reporting of failed tests (#62)

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Commits on Nov 18, 2016

• Update support for parameterized BlackBoxes.

  ucbjrl

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Commits on Nov 22, 2016

• Enable deprecation reporting and fix deprecations.

  ucbjrl

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• Remove extraneous parens on asUInt.

  ucbjrl

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Commits on Nov 23, 2016

• change default directory for tester to be test_run_dir/<sanitized-spec-classname><hashcode> (#57)

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Commits on Nov 26, 2016

• Fix poke expect neg ints (#66)

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• small syntactic changes for annotations

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Commits on Jan 3, 2017

• Poking large longs was converting longs to int and losing large values. (#76)

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Commits on Jan 17, 2017

• Fixes #82 Passes tester options down to tester (#83)

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Commits on Jan 19, 2017

• API change: Change peek and expect to get negatives when applied to SInt (#85)

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Commits on Jan 24, 2017

• Reflect the fact that FixedPoint is experimental. (#89)

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  ucbjrl

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• Prog bundle - fix #88 (#90)

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• make peek print bigint with correct sign (#86)

  

  shunshou

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• More ScalaTest-y specs (#74)

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Commits on Jan 31, 2017

• Fix spelling of ChiselExecutionSuccess.

  ucbjrl

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• Pass through annos, support for black box verilog implementations (#93)

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• Merge pull request #97 from ucb-bar/fixspellingofChiselExecutionSuccess

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• fixed sign out of verilator for when bitLength isn't as expected (#98)

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Commits on Feb 1, 2017

• --test-command was broken (#95)

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• Change expect error message to make it clear what was returned and what was expected (#79)

  chick

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• Fix argument list for verilogToCpp(). (#101)

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Commits on Feb 16, 2017

• Expose options in poke testers (#103)

  

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Commits on Feb 17, 2017

• Provide replacement for demise of flatten(). (#109)

  ucbjrl

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Commits on Feb 24, 2017

• fix verilator internal signal errors

  donggyukim

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• Account for movement of bitWidth from passes to firrtl. (#113)

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• Merge branch 'master' into fix_internal_signal_errors

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• Remove commented out lines.

  ucbjrl

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• more dead code elimination

  donggyukim

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• fix verilator compile error in ChiselMain

  donggyukim

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Commits on Feb 26, 2017

• fixed bug - verilator + vcs backends weren't propagating transforms correctly

  shunshou

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Commits on Mar 13, 2017

• Fix compiler errors due to firrtl emitter api changes (#125)

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• Fix deprecated code (#123)

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Commits on Mar 17, 2017

• Fix verilator custom transforms not being run (#127)

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Commits on Mar 22, 2017

• Rmove "V" prefix from circuit.name for VCS simulation. (#131)

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Commits on Mar 27, 2017

• Update deprecated usage (Reg(init=...), Reg(next=...), log2Up()).

  

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Commits on Mar 29, 2017

• finish even on test failure

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Commits on Apr 26, 2017

• Check for irrevocable IO in AdvTester sink; warn otherwise (#121)

  

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Commits on May 18, 2017

• Add firrtl PR 488 support for setting logging options (#129)

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Commits on Jun 8, 2017

• Update deprecated usage. (#149)

  ucbjrl

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• Fix double elaboration of DUT when using the interpreter (#154)

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Commits on Jun 17, 2017

• bump versions; replace PropertyCheckConfig with PropertyCheckConfiguration (#144)

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Commits on Jun 28, 2017

• Updating to keep up with Direction mega PR (#156)

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Commits on Jul 6, 2017

• Fix cycle test problem (#157)

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• Cycle test fix 2 (#158)

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Commits on Aug 1, 2017

• Augment vcs command (#161)

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Commits on Aug 16, 2017

• add ability to apply ad hoc edits to vcs command line (#163)

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• pass testerBackend argument, not hardcoded firrtl backend to function call (#146)

  

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Commits on Aug 18, 2017

• Don't add 0-width wires to verilated c++ (#162)

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Commits on Sep 11, 2017

• Simple fixed point support (#167)

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Commits on Sep 19, 2017

• Add support for peek and poking memories to the interpreter backend. (#169)

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Commits on Sep 27, 2017

• executeFirrtlRepl did not pass along args (#172)

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Commits on Sep 28, 2017

• Pass repl args (#173)

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Commits on Oct 27, 2017

• Running verilator broken if port name contains dutname as substring (#171)

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Commits on Dec 22, 2017

• Invalidateapifix (#182)

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Commits on Feb 22, 2018

• Replace deprecated usage: '!=' and 'Vec()'. (#187)

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Commits on Feb 27, 2018

• Use immutable getAnnotations in FirrtlTerpBackend (#189)

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Commits on Mar 1, 2018

• Update in light of annotations refactor. (#191)

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Commits on Mar 3, 2018

• Fix for 792 (#793)

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Commits on Mar 4, 2018

• Bump SNAPSHOT version (#794)

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Commits on Mar 7, 2018

• Fix SyncReadMem.read; add test (#796)

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Commits on Mar 8, 2018

• Move desired files.

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• Remove unwanted files.

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• Rename SimApiInterface.

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• fix broken merge

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Commits on Mar 9, 2018

• Still slightly broken - missing CommandEditor

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• Move desired files.

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• Cleanup

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• Merge remote-tracking branch 'chisel-testers/testers2' into testers2+interprocesstester

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• First working version (VCS untested)

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• Adding a style guide (#790)

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• Write the VCS harness file.

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Commits on Mar 20, 2018

• JNI (Verilator) support.

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Commits on Mar 21, 2018

• Success and failures work.

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Commits on Mar 22, 2018

• Remove impossible case in TesterThread.run() exception.

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• Avoid death on unexpected exceptions.

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Commits on Mar 23, 2018

• Fallback null insertion for autoclonetype (#801)

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Commits on Mar 24, 2018

• Remove unused import paths; don't hardcode shared library extension.

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Commits on Apr 3, 2018

• Use Windows memory map API.

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• Windows fixes.

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• Add GCD to testers2 tests.

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Commits on Apr 4, 2018

• Use ListMap instead of HashMap to ensure correct order of inputs/outputs.

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• Use peek/pokes - can't use wires since we aren't in a Module anymore.

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Commits on Apr 5, 2018

• Add a 'long' test and print durations for each test/backend.

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• Merge branch 'master' into testers2+interprocesstester

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• Merge branch 'testers2+JNI' into testers2+interprocesstester

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• Reflect getPosixCompatiblePath() name change.

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Commits on Apr 6, 2018

• Merge branch 'testers2' into testers2+interprocesstester

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