Add FST output for cider (#2299)

This adds an option to generate a wavedump when executing a Calyx
program with cider.
FST generation is based on the highly experimental `fst-writer` library.
Currently, the FSTs produced work on Surfer but crash GTKWave.

.gitignore

@@ -39,6 +39,8 @@ __pycache__
 !.vscode/launch.json
 !.vscode/tasks.json
 
+.idea/
+
 # cocotb artifacts
 tests/xilinx/cocotb/**/hdl
 sim_build/

interp/Cargo.toml

@@ -47,6 +47,7 @@ btor2i = { path = "../tools/btor2/btor2i" }
 
 ciborium = "0.2.2"
 baa = { version = "0.6.0", features = ["bigint", "serde1", "fraction1"] }
+fst-writer = "0.2.0"
 
 [dev-dependencies]
 proptest = "1.0.0"

interp/src/debugger/debugger_core.rs

@@ -93,7 +93,8 @@ impl OwnedDebugger {
             false,
         )?;
 
-        let debugger: Debugger<Rc<Context>> = Self::new(Rc::new(ctx), &None)?;
+        let debugger: Debugger<Rc<Context>> =
+            Self::new(Rc::new(ctx), &None, &None)?;
 
         Ok((debugger, map))
     }
@@ -104,9 +105,13 @@ impl<C: AsRef<Context> + Clone> Debugger<C> {
     pub fn new(
         program_context: C,
         data_file: &Option<std::path::PathBuf>,
+        wave_file: &Option<std::path::PathBuf>,
     ) -> InterpreterResult<Self> {
-        let mut interpreter =
-            Simulator::build_simulator(program_context.clone(), data_file)?;
+        let mut interpreter = Simulator::build_simulator(
+            program_context.clone(),
+            data_file,
+            wave_file,
+        )?;
         interpreter.converge()?;
 
         Ok(Self {

interp/src/flatten/flat_ir/component.rs

@@ -173,7 +173,7 @@ impl ComponentCore {
 #[derive(Debug, Clone)]
 /// Other information about a component definition. This is not on the hot path
 /// and is instead needed primarily during setup and error reporting.
-pub struct AuxillaryComponentInfo {
+pub struct AuxiliaryComponentInfo {
     /// Name of the component.
     pub name: Identifier,
     /// The input/output signature of this component. This could probably be
@@ -193,14 +193,14 @@ pub struct AuxillaryComponentInfo {
         SparseMap<LocalRefCellOffset, RefCellDefinitionIdx>,
 }
 
-impl Default for AuxillaryComponentInfo {
+impl Default for AuxiliaryComponentInfo {
     fn default() -> Self {
         Self::new_with_name(Identifier::get_default_id())
     }
 }
 
-impl AuxillaryComponentInfo {
-    /// Creates a new [`AuxillaryComponentInfo`] with the given name. And
+impl AuxiliaryComponentInfo {
+    /// Creates a new [`AuxiliaryComponentInfo`] with the given name. And
     /// default values elsewhere.
     pub fn new_with_name(id: Identifier) -> Self {
         Self {

interp/src/flatten/flat_ir/control/translator.rs

@@ -7,7 +7,7 @@ use crate::{
     flatten::{
         flat_ir::{
             cell_prototype::{CellPrototype, ConstantType},
-            component::{AuxillaryComponentInfo, ComponentCore},
+            component::{AuxiliaryComponentInfo, ComponentCore},
             flatten_trait::{flatten_tree, FlattenTree, SingleHandle},
             prelude::{
                 Assignment, AssignmentIdx, CellRef, CombGroup, CombGroupIdx,
@@ -125,7 +125,7 @@ fn translate_component(
     ctx: &mut Context,
     component_id_map: &mut ComponentMapper,
 ) -> ComponentIdx {
-    let mut auxillary_component_info = AuxillaryComponentInfo::new_with_name(
+    let mut auxillary_component_info = AuxiliaryComponentInfo::new_with_name(
         ctx.secondary.string_table.insert(comp.name),
     );
 
@@ -275,7 +275,7 @@ fn translate_component(
 
 fn insert_port(
     secondary_ctx: &mut SecondaryContext,
-    aux: &mut AuxillaryComponentInfo,
+    aux: &mut AuxiliaryComponentInfo,
     port: &RRC<cir::Port>,
     port_type: ContainmentType,
 ) -> PortRef {
@@ -297,7 +297,7 @@ fn insert_port(
 
 fn insert_cell(
     secondary_ctx: &mut SecondaryContext,
-    aux: &mut AuxillaryComponentInfo,
+    aux: &mut AuxiliaryComponentInfo,
     cell: &RRC<cir::Cell>,
     layout: &mut Layout,
     comp_id: ComponentIdx,
@@ -357,7 +357,7 @@ pub struct Layout {
 fn compute_local_layout(
     comp: &cir::Component,
     ctx: &mut Context,
-    aux: &mut AuxillaryComponentInfo,
+    aux: &mut AuxiliaryComponentInfo,
     component_id_map: &ComponentMapper,
 ) -> Layout {
     let comp_id = ctx.primary.components.peek_next_idx();
@@ -541,7 +541,7 @@ impl FlattenTree for cir::Control {
 
     type IdxType = ControlIdx;
 
-    type AuxillaryData = (GroupMapper, Layout, Context, AuxillaryComponentInfo);
+    type AuxillaryData = (GroupMapper, Layout, Context, AuxiliaryComponentInfo);
 
     fn process_element<'data>(
         &'data self,

interp/src/flatten/structures/context.rs

@@ -3,7 +3,7 @@ use std::ops::Index;
 use crate::flatten::flat_ir::{
     cell_prototype::CellPrototype,
     component::{
-        AssignmentDefinitionLocation, AuxillaryComponentInfo, ComponentCore,
+        AssignmentDefinitionLocation, AuxiliaryComponentInfo, ComponentCore,
         ComponentMap,
     },
     identifier::IdMap,
@@ -23,7 +23,7 @@ use crate::flatten::flat_ir::{
 
 use super::{
     index_trait::{IndexRange, IndexRef},
-    indexed_map::{AuxillaryMap, IndexedMap},
+    indexed_map::{AuxiliaryMap, IndexedMap},
     printer::Printer,
 };
 
@@ -116,8 +116,8 @@ pub struct SecondaryContext {
     pub local_cell_defs: IndexedMap<CellDefinitionIdx, CellInfo>,
     /// ref-cell definitions
     pub ref_cell_defs: IndexedMap<RefCellDefinitionIdx, RefCellInfo>,
-    /// auxillary information for components
-    pub comp_aux_info: AuxillaryMap<ComponentIdx, AuxillaryComponentInfo>,
+    /// auxiliary information for components
+    pub comp_aux_info: AuxiliaryMap<ComponentIdx, AuxiliaryComponentInfo>,
 }
 
 impl Index<Identifier> for SecondaryContext {
@@ -161,7 +161,7 @@ impl Index<RefCellDefinitionIdx> for SecondaryContext {
 }
 
 impl Index<ComponentIdx> for SecondaryContext {
-    type Output = AuxillaryComponentInfo;
+    type Output = AuxiliaryComponentInfo;
 
     fn index(&self, index: ComponentIdx) -> &Self::Output {
         &self.comp_aux_info[index]