Reduce Register Usage for Separate Static Islands (#1632)

* first draft of single fsm compilation

* it works

* fixed nested repeat bug

* added documentation

* added test cases

* removed unnecessary doc

* bug fix (needed more conflicts)

* small documentation changes

* fixed test and removed debug stmt

* modified test case to catch bug

* removed unnecessary files

* code cleaning

* renamed function

calyx-ir/src/component.rs

@@ -207,6 +207,19 @@ impl Component {
         self.cells.find(name)
     }
 
+    /// Return a reference to the cell with `name` if present.
+    pub fn find_guaranteed_cell<S>(&self, name: S) -> RRC<Cell>
+    where
+        S: Into<Id> + std::fmt::Debug + Copy,
+    {
+        self.cells.find(name).unwrap_or_else(|| {
+            unreachable!(
+                "called find_certain_cell on {:?} but it wasn't found",
+                name
+            )
+        })
+    }
+
     /// Construct a non-conflicting name using the Component's namegenerator.
     pub fn generate_name<S>(&mut self, prefix: S) -> Id
     where

calyx-opt/src/analysis/graph_coloring.rs

@@ -74,7 +74,13 @@ where
 
     /// Given an `ordering` of `T`s, find a mapping from nodes to `T`s such
     /// that no node has a neighbor with the same `T`.
-    pub fn color_greedy(&mut self, bound: Option<i64>) -> HashMap<T, T> {
+    /// `keep_self_color` indicates whether to keep the mapping of the node to
+    /// itself in the returned HashMap (since nodes are "colors")
+    pub fn color_greedy(
+        &mut self,
+        bound: Option<i64>,
+        keep_self_color: bool,
+    ) -> HashMap<T, T> {
         let mut all_colors: BTreeMap<Idx, i64> = BTreeMap::new();
         let mut coloring: HashMap<Idx, Idx> = HashMap::new();
         let always_share = bound.is_none();
@@ -159,7 +165,7 @@ where
         coloring
             .into_iter()
             .map(|(n1, n2)| (rev_map[&n1].clone(), rev_map[&n2].clone()))
-            .filter(|(a, b)| a != b)
+            .filter(|(a, b)| (a != b) || keep_self_color)
             .collect()
     }
 

calyx-opt/src/default_passes.rs

@@ -106,6 +106,7 @@ impl PassManager {
             [
                 StaticInliner,
                 MergeAssign, // Static inliner generates lots of assigns
+                DeadGroupRemoval, // Static inliner generates lots of dead groups
                 SimplifyStaticGuards,
                 CompileStatic,
                 TopDownStaticTiming,

calyx-opt/src/passes/cell_share.rs

@@ -442,9 +442,9 @@ impl Visitor for CellShare {
                                 let parent_b =
                                     par_thread_map.get(live_b).unwrap();
                                 if live_a != live_b && parent_a == parent_b {
-                                    // we have to check par_timing_map
-                                    // to see whether liveness overlaps
-                                    // for dynamic pars, liveness_overlaps() returns
+                                    // We have to check par_timing_map
+                                    // to see whether liveness overlaps.
+                                    // For dynamic pars, liveness_overlaps() returns
                                     // true no matter what.
                                     if self.par_timing_map.liveness_overlaps(
                                         parent_a, live_a, live_b, a, b,
@@ -497,7 +497,7 @@ impl Visitor for CellShare {
             if graph.has_nodes() {
                 coloring.extend(
                     graph
-                        .color_greedy(*bound)
+                        .color_greedy(*bound, false)
                         .iter()
                         .map(|(a, b)| (*a, comp.find_cell(*b).unwrap())),
                 );