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Add FPGA pin assignment
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rgraf committed Apr 14, 2020
1 parent c1dc229 commit 2613a72
Showing 1 changed file with 23 additions and 23 deletions.
46 changes: 23 additions & 23 deletions testcircuit/README.md
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Expand Up @@ -23,26 +23,26 @@ it will cause damage to connect some other signal source to these outputs.

| FPGA pin | Signal generator | VIC adapter | Signal |
| -------- | ---------------- | ------------ | ----------- |
| | GPIO1 1 | Pin 1 | DB6 |
| | GPIO1 3 | Pin 2 | DB5 |
| | GPIO1 5 | Pin 3 | DB4 |
| | GPIO1 7 | Pin 4 | DB3 |
| | GPIO1 9 | Pin 5 | DB2 |
| | GPIO1 11 | Pin 6 | DB1 |
| | GPIO1 13 | Pin 7 | DB0 |
| | GPIO1 15 | Pin 10 | CS |
| | GPIO1 17 | Pin 11 | RW |
| | GND | Pin 12 | BA (unused) |
| | GPIO1 19 | Pin 16 | AEC |
| | GPIO1 20 | Pin 17 | PHI0 |
| | GPIO1 18 | Pin 24 | A0 |
| | GPIO1 16 | Pin 25 | A1 |
| | GPIO1 14 | Pin 26 | A2 |
| | GPIO1 12 | Pin 27 | A3 |
| | GPIO1 10 | Pin 28 | A4 |
| | GPIO1 8 | Pin 29 | A5 |
| | GPIO1 6 | Pin 35 | DB11 |
| | GPIO1 4 | Pin 36 | DB10 |
| | GPIO1 2 | Pin 37 | DB9 |
| | SW1 1 | Pin 38 | DB8 |
| | SW1 2 | Pin 39 | DB7 |
| 74 | GPIO1 1 | Pin 1 | DB6 |
| 76 | GPIO1 3 | Pin 2 | DB5 |
| 78 | GPIO1 5 | Pin 3 | DB4 |
| 80 | GPIO1 7 | Pin 4 | DB3 |
| 87 | GPIO1 9 | Pin 5 | DB2 |
| 91 | GPIO1 11 | Pin 6 | DB1 |
| 97 | GPIO1 13 | Pin 7 | DB0 |
| 99 | GPIO1 15 | Pin 10 | CS |
| 101 | GPIO1 17 | Pin 11 | RW |
| - | GND | Pin 12 | BA (unused) |
| 105 | GPIO1 19 | Pin 16 | AEC |
| 106 | GPIO1 20 | Pin 17 | PHI0 |
| 103 | GPIO1 18 | Pin 24 | A0 |
| 100 | GPIO1 16 | Pin 25 | A1 |
| 98 | GPIO1 14 | Pin 26 | A2 |
| 92 | GPIO1 12 | Pin 27 | A3 |
| 88 | GPIO1 10 | Pin 28 | A4 |
| 81 | GPIO1 8 | Pin 29 | A5 |
| 79 | GPIO1 6 | Pin 35 | DB11 |
| 77 | GPIO1 4 | Pin 36 | DB10 |
| 75 | GPIO1 2 | Pin 37 | DB9 |
| 39 | SW1 1 | Pin 38 | DB8 |
| 40 | SW1 2 | Pin 39 | DB7 |

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