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Fix suppression of WIDTH* warnings when immediately under a size cast (
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wsnyder committed Sep 20, 2024
1 parent 87eef36 commit 02e88e3
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1 change: 1 addition & 0 deletions Changes
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Expand Up @@ -32,6 +32,7 @@ Verilator 5.029 devel
* Improve Verilation thread pool (#5161). [Bartłomiej Chmiel, Antmicro Ltd.]
* Improve performance of V3VariableOrder with parallelism (#5406). [Bartłomiej Chmiel, Antmicro Ltd.]
* Improve parser error handling. [Arkadiusz Kozdra, Antmicro Ltd.]
* Fix suppression of WIDTH* warnings when immediately under a size cast (#3417).
* Fix `$fatal` to not be affected by `+verilator+error+limit` (#5135). [Gökçe Aydos]
* Fix display with multiple string formats (#5311). [Luiza de Melo]
* Fix performance of V3Trace when many activity blocks (#5372). [Deniz Güzel]
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3 changes: 3 additions & 0 deletions src/V3Width.cpp
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Expand Up @@ -7229,6 +7229,9 @@ class WidthVisitor final : public VNVisitor {
underp = nullptr; // Changes underp
return;
}
// If user has a sizing cast, assume they know what they are doing
// (for better or worse)
if (VN_IS(nodep->backp(), CastSize)) warnOn = false;
if (VN_IS(underp, Const) && VN_AS(underp, Const)->num().isFromString()
&& expWidth > underp->width()
&& (((expWidth - underp->width()) % 8) == 0)) { // At least it's character sized
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18 changes: 18 additions & 0 deletions test_regress/t/t_lint_width_cast.py
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@@ -0,0 +1,18 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

import vltest_bootstrap

test.scenarios('simulator')

test.compile()

test.execute()

test.passes()
30 changes: 30 additions & 0 deletions test_regress/t/t_lint_width_cast.v
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// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2024 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0

`define stop $stop
`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);

module t(/*AUTOARG*/);

wire [5:0] b1 = 6'b101101;
wire [5:0] b2 = 6'b011110;
logic [5:0] a6;
logic [9:0] a10;

initial begin
// issue #3417
a6 = b2 - b1;
`checkh(a6, 6'h31);
a10 = 10'(b2 - b1);
`checkh(a10, 10'h3f1); // This being not 31 indicates operator expands
`checkh($bits(10'(b1)), 10);
`checkh($bits(10'(b2 - b1)), 10);
`checkh($bits(b2 - b1), 6);
$write("*-* All Finished *-*\n");
$finish;
end

endmodule

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