Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Malloc regions #584

Open
wants to merge 4 commits into
base: master
Choose a base branch
from
Open
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
12 changes: 2 additions & 10 deletions FreeRTOS/Source/portable/esp8266/port.c
Original file line number Diff line number Diff line change
Expand Up @@ -172,9 +172,8 @@ portBASE_TYPE xPortStartScheduler( void )
return pdTRUE;
}

/* Determine free heap size via libc sbrk function & mallinfo
/* Determine free heap size via mallinfo

sbrk gives total size in totally unallocated memory,
mallinfo.fordblks gives free space inside area dedicated to heap.

mallinfo is possibly non-portable, although glibc & newlib both support
Expand All @@ -183,14 +182,7 @@ portBASE_TYPE xPortStartScheduler( void )
size_t xPortGetFreeHeapSize( void )
{
struct mallinfo mi = mallinfo();
uint32_t brk_val = (uint32_t) sbrk(0);

intptr_t sp = (intptr_t)xPortSupervisorStackPointer;
if (sp == 0) {
/* scheduler not started */
SP(sp);
}
return sp - brk_val + mi.fordblks;
return mi.fordblks;
}

void vPortEndScheduler( void )
Expand Down
18 changes: 17 additions & 1 deletion FreeRTOS/Source/tasks.c
Original file line number Diff line number Diff line change
Expand Up @@ -754,7 +754,11 @@ static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB ) PRIVILEGED_FUNCTION;
/* Allocate space for the stack used by the task being created.
The base of the stack memory stored in the TCB so the task can
be deleted later if required. */

/* Allocate the stack in dram, not iram. */
uint32_t malloc_mask = set_malloc_regions(MALLOC_MASK_DRAM);
pxNewTCB->pxStack = ( StackType_t * ) pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
set_malloc_regions(malloc_mask);

if( pxNewTCB->pxStack == NULL )
{
Expand All @@ -769,7 +773,10 @@ static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB ) PRIVILEGED_FUNCTION;
StackType_t *pxStack;

/* Allocate space for the stack used by the task being created. */
/* Allocate the stack in dram, not iram. */
uint32_t malloc_mask = set_malloc_regions(MALLOC_MASK_DRAM);
pxStack = ( StackType_t * ) pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
set_malloc_regions(malloc_mask);

if( pxStack != NULL )
{
Expand Down Expand Up @@ -990,7 +997,16 @@ UBaseType_t x;
{
/* Initialise this task's Newlib reent structure. */
_REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) );
}

if (strcmp(pcName, "ppTask") == 0 ||
strcmp(pcName, "rtc_timer_task") == 0 ||
strcmp(pcName, "Tmr Svc") == 0) {
pxNewTCB->xNewLib_reent.malloc_region_mask = MALLOC_MASK_DRAM;
} else {
pxNewTCB->xNewLib_reent.malloc_region_mask = MALLOC_MASK_PREFER_DRAM;
//pxNewTCB->xNewLib_reent.malloc_region_mask = MALLOC_MASK_PREFER_IRAM;
}
}
#endif

#if( INCLUDE_xTaskAbortDelay == 1 )
Expand Down
29 changes: 29 additions & 0 deletions core/app_main.c
Original file line number Diff line number Diff line change
Expand Up @@ -137,6 +137,9 @@ static void IRAM default_putc(char c) {
void init_newlib_locks(void);
extern uint8_t sdk_wDevCtrl[];
void nano_malloc_insert_chunk(void *start, size_t size);
extern uint8_t _heap_start[];
extern uint8_t _text_end[];
extern uint8_t enable_low_icache;

// .text+0x258
void IRAM sdk_user_start(void) {
Expand Down Expand Up @@ -209,8 +212,13 @@ void IRAM sdk_user_start(void) {
cksum_value = buf32[5 + boot_slot];
ic_flash_addr = (flash_sectors - 3 + boot_slot) * sdk_flashchip.sector_size;
sdk_SPIRead(ic_flash_addr, buf32, sizeof(struct sdk_g_ic_saved_st));

#ifdef ESP8266_ENABLE_LOW_ICACHE
enable_low_icache = ESP8266_ENABLE_LOW_ICACHE;
#endif
Cache_Read_Enable(0, 0, 1);
zero_bss();

sdk_os_install_putc1(default_putc);

/* HACK Reclaim a region of unused bss from wdev.o. This would not be
Expand All @@ -219,6 +227,26 @@ void IRAM sdk_user_start(void) {
* it is in very useful dram. */
nano_malloc_insert_chunk((void *)(sdk_wDevCtrl + 0x2190), 8000);

/* Use all the used DRAM is for the dynamic heap. */
nano_malloc_insert_chunk(_heap_start, 0x3FFFC000 - (uintptr_t)_heap_start);

/* Add unused IRAM to the malloc free list. */
if (enable_low_icache) {
/* The memory region 0x40108000 to 0x4010C000 is used for icache so can
* not be used, but there might still be some unused IRAM */
nano_malloc_insert_chunk(_text_end, 0x40108000 - (uintptr_t)_text_end);
} else {
/* The memory region 0x40108000 to 0x4010C000 is not used as part of the
* instruction cache and is usable as extra IRAM. */
nano_malloc_insert_chunk(_text_end, 0x4010C000 - (uintptr_t)_text_end);
}

/* The preferred memory region to start allocate the early data. If the app
* has ample memory the use the DRAM, other if the app is running low on
* DRAM then it might help the allocated to the IRAM when possible. */
set_malloc_regions(MALLOC_MASK_PREFER_DRAM);
//set_malloc_regions(MALLOC_MASK_PREFER_IRAM);

init_newlib_locks();

if (cksum_magic == 0xffffffff) {
Expand Down Expand Up @@ -368,6 +396,7 @@ void sdk_user_init_task(void *params) {
/* The start up stack is not used after scheduling has started, so all of
* the top area of RAM which was stack can be used for the dynamic heap. */
xPortSupervisorStackPointer = (void *)0x40000000;
nano_malloc_insert_chunk((void *)0x3FFFC000, 0x4000);

sdk_ets_timer_init();
printf("\nESP-Open-SDK ver: %s compiled @ %s %s\n", OS_VERSION_STR, __DATE__, __TIME__);
Expand Down
Loading