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fix bin_bit assignment
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junyu0312 committed Jul 15, 2024
1 parent 3088b64 commit 1e30b89
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Showing 2 changed files with 24 additions and 21 deletions.
4 changes: 4 additions & 0 deletions crates/specs/src/itable.rs
Original file line number Diff line number Diff line change
Expand Up @@ -223,6 +223,10 @@ pub enum UniArg {
}

impl UniArg {
pub fn is_pop(&self) -> bool {
matches!(self, UniArg::Pop)
}

pub fn get_const_value(&self) -> u64 {
match self {
UniArg::Pop => 0,
Expand Down
41 changes: 20 additions & 21 deletions crates/zkwasm/src/circuits/etable/op_configure/op_bin_bit.rs
Original file line number Diff line number Diff line change
Expand Up @@ -48,18 +48,17 @@ impl<F: FieldExt> EventTableOpcodeConfigBuilder<F> for BinBitConfigBuilder {
let sp = common_config.sp_cell;
let bit_table_lookup = common_config.bit_table_lookup_cells;

let rhs = common_config.uniarg_configs[0];
let lhs = common_config.uniarg_configs[1];
let is_i32 = common_config.uniarg_configs[0].is_i32_cell;
let rhs = common_config.uniarg_configs[0].clone();
let lhs = common_config.uniarg_configs[1].clone();

let memory_table_lookup_stack_write = allocator
.alloc_memory_table_lookup_write_cell_with_value(
"op_bin stack write",
constraint_builder,
eid,
move |____| constant_from!(LocationType::Stack as u64),
move |meta| sp.expr(meta) + todo!(),
move |meta| is_i32.expr(meta),
move |meta| sp.expr(meta) + rhs.is_pop_cell.expr(meta) + lhs.is_pop_cell.expr(meta),
move |meta| rhs.is_i32_cell.expr(meta),
move |____| constant_from!(1),
);
let res = memory_table_lookup_stack_write.value_cell;
Expand Down Expand Up @@ -163,19 +162,19 @@ impl<F: FieldExt> EventTableOpcodeConfig<F> for BinBitConfig<F> {
entry.memory_rw_entires[0].start_eid,
step.current.eid,
entry.memory_rw_entires[0].end_eid,
todo!(),
step.current.sp + 1,
vtype == VarType::I32,
right,
)?;
}
UniArg::Stack(_) => {
UniArg::Stack(delta) => {
self.rhs.assign_stack(
ctx,
uniargs[0],
entry.memory_rw_entires[0].start_eid,
step.current.eid,
entry.memory_rw_entires[0].end_eid,
todo!(),
step.current.sp + delta as u32,
vtype == VarType::I32,
right,
)?;
Expand All @@ -193,19 +192,19 @@ impl<F: FieldExt> EventTableOpcodeConfig<F> for BinBitConfig<F> {
entry.memory_rw_entires[1].start_eid,
step.current.eid,
entry.memory_rw_entires[1].end_eid,
todo!(),
step.current.sp + 1 + uniargs[0].is_pop() as u32,
vtype == VarType::I32,
left,
)?;
}
UniArg::Stack(_) => {
UniArg::Stack(delta) => {
self.lhs.assign_stack(
ctx,
uniargs[1],
entry.memory_rw_entires[1].start_eid,
step.current.eid,
entry.memory_rw_entires[1].end_eid,
todo!(),
step.current.sp + delta as u32,
vtype == VarType::I32,
left,
)?;
Expand All @@ -214,20 +213,20 @@ impl<F: FieldExt> EventTableOpcodeConfig<F> for BinBitConfig<F> {
self.lhs.assign_const(ctx, uniargs[1])?;
}
}

self.memory_table_lookup_stack_write.assign(
ctx,
step.current.eid,
entry.memory_rw_entires[2].end_eid,
step.current.sp + uniargs[0].is_pop() as u32 + uniargs[1].is_pop() as u32,
LocationType::Stack,
vtype == VarType::I32,
value,
)?;
} else {
unreachable!();
}

self.memory_table_lookup_stack_write.assign(
ctx,
step.current.eid,
entry.memory_rw_entires[2].end_eid,
step.current.sp + 2,
LocationType::Stack,
vtype == VarType::I32,
value,
)?;

Ok(())
}

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