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G0B1 support#68

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adamt55 wants to merge 15 commits intoDavid-OConnor:mainDavid-OConnor/stm32-hal:mainfrom adamt55:mainadamt55/stm32-hal:mainCopy head branch name to clipboard

+200-72

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Commits on Nov 19, 2022

• Added differentiation for g0b1 + g0c1

  

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• Merge branch 'main' of github.com:David-OConnor/stm32-hal

  

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• rising and falling trigger for ESXI are named correctly on g0b1 and g0c1 PACs

  

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• reverted DMA changes since the issues lies somewhere else

  

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• Added parenthesis for the registers

  

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• g0 contains those registers

  

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• misunderstood the line... reverting previous commit

  

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Commits on Nov 20, 2022

• Added featuregate for g0b1 and g0c1 on GPIO clock registers, since those are named differently

  

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• reverted parenthesis again, this is an issue with the DMA i think somehow

  

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• Added featuregate for FIFO usart for G0B1 and G0C1

  

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• Merge branch 'David-OConnor:main' into main

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• Merge branch 'David-OConnor:main' into main

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Commits on Nov 22, 2022

• Added featuregate for G0B1 and G0C1 for the DMA since the PAC is different for them compared to G0

  

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• removed txfeie and rxfneie since I disabled FIFO for now on the PAC. Seems like FIFO for USART still needs some attention

  

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Commits on Nov 25, 2022

• Since much of this only works for DMA1, excluded the DMA2 from G0B1 and G0C1 for now.

  

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