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ARM_MPU_REGION_MIN_ALIGN_AND_SIZE has invalid value when FPU_SHARING && MPU_STACK_GUARD #83714
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With our builds for Arm M7 we are selecting FPU_SHARING and MPU_STACK_GUARD. For that setup, we have ARM_MPU_REGION_MIN_ALIGN_AND_SIZE=64 and MPU_STACK_GUARD_MIN_SIZE_FLOAT=128. So worst case scenario, we are going to have stack that is 64-byte aligned and 128-byte guard at the bottom of the buffer. Fixes: zephyrproject-rtos#83714 Signed-off-by: Maciej Kusio <[email protected]>
Hi @rysiof ,
Z_MPU_GUARD_ALIGN is max of MPU_GUARD_ALIGN_AND_SIZE and MPU_GUARD_ALIGN_AND_SIZE_FLOAT while, Thanks! |
Hi @wearyzen When we switch to stack1, zephyr will try to program MPU guard to So top part of data won't be accessible, when executing thread on stack1, causing MPU fault exception. |
Tyty! I really appreciate that! |
With our builds for Arm M7 we are selecting FPU_SHARING and MPU_STACK_GUARD. For that setup, we have ARM_MPU_REGION_MIN_ALIGN_AND_SIZE=64 and MPU_STACK_GUARD_MIN_SIZE_FLOAT=128. So worst case scenario, we are going to have stack that is 64-byte aligned and 128-byte guard at the bottom of the buffer. Fixes: zephyrproject-rtos#83714 Signed-off-by: Maciej Kusio <[email protected]>
Describe the bug
With our builds for Arm M7 we are selecting
FPU_SHARING
andMPU_STACK_GUARD
. For that setup, we haveARM_MPU_REGION_MIN_ALIGN_AND_SIZE=64
andMPU_STACK_GUARD_MIN_SIZE_FLOAT=128
. So worst case scenario, we are going to have stack that is 64-byte aligned and 128-byte guard at the bottom of the buffer.https://developer.arm.com/documentation/101407/0541/Debugging/Debug-Windows-and-Dialogs/Core-Peripherals/Armv7-M-cores/Armv7-M--Memory-Protection-Unit tells us that
The base address is aligned to the size of the region
.Therefore
ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
must be 128 whenFPU_SHARING && MPU_STACK_GUARD
To Reproduce
Expected behavior
Impact
security and debugability
Logs and console output
Environment (please complete the following information):
All
Additional context
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