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speed improvement using SSE4 crc32 cpu instruction? #15

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ThomasWaldmann opened this issue May 21, 2016 · 2 comments
Open

speed improvement using SSE4 crc32 cpu instruction? #15

ThomasWaldmann opened this issue May 21, 2016 · 2 comments

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@ThomasWaldmann
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ThomasWaldmann commented May 21, 2016

There is special support for crc computation in intel/AMD CPUs since quite some years:

http://www.drdobbs.com/parallel/fast-parallelized-crc-computation-using/229401411

https://en.wikipedia.org/wiki/SSE4#Supporting_CPUs

The drdobbs article says that this yields performance of about 1.17 cycles per 64bits word (for a measurement done with a loop, repeatedly computing over a small amount of data, so I guess one can assume they sit in L1 or L2 cache of cpu).

At 2.4GHz, this could mean up to 16GB/s (or whatever your RAM bandwidth is limiting this value to).

@ThomasWaldmann ThomasWaldmann changed the title speed improvement using intel crc32 cpu instruction? speed improvement using SSE4 crc32 cpu instruction? May 21, 2016
@tpircher-zz
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Hmm, this is architecture specific and only works for one specific polynomial (0x1EDC6F41). I think it's unlikely to implemented in pycrc any time soon.

@ThomasWaldmann
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Pity.

Considering that less-than-5y-old intel/amd cpus are quite common and many people just need some crc (not a specific crc), I can imagine a lot of people could use this.

I ran test/performance.sh and the maximum I got from that was 0.806 GB/s (crc32, table-driven sb4) on a Core i5-4200u.

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