From 4214b13ee8ff51400ac9138f47f95ab6e4aa061c Mon Sep 17 00:00:00 2001 From: stnolting Date: Sat, 18 Apr 2020 16:38:33 +0200 Subject: [PATCH] fixed error in signal conversion --- rtl/top_templates/neo430_top_avm.vhd | 2 +- rtl/top_templates/neo430_top_axi4lite.vhd | 2 +- rtl/top_templates/neo430_top_std_logic.vhd | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/rtl/top_templates/neo430_top_avm.vhd b/rtl/top_templates/neo430_top_avm.vhd index 566bc1e..910bfb0 100644 --- a/rtl/top_templates/neo430_top_avm.vhd +++ b/rtl/top_templates/neo430_top_avm.vhd @@ -231,7 +231,7 @@ begin spi_mosi_o <= std_logic(spi_mosi_o_int); spi_cs_o <= std_logic_vector(spi_cs_o_int); ext_ack_o <= std_logic_vector(irq_ack_o_int); - freq_gen_o <= std_logic(freq_gen_o_int); + freq_gen_o <= std_logic_vector(freq_gen_o_int); -- Wishbone-to-Avalon Bridge ------------------------------------------------ diff --git a/rtl/top_templates/neo430_top_axi4lite.vhd b/rtl/top_templates/neo430_top_axi4lite.vhd index feef42e..c091664 100644 --- a/rtl/top_templates/neo430_top_axi4lite.vhd +++ b/rtl/top_templates/neo430_top_axi4lite.vhd @@ -236,7 +236,7 @@ begin spi_mosi_o <= std_logic(spi_mosi_o_int); spi_cs_o <= std_logic_vector(spi_cs_o_int); ext_ack_o <= std_logic_vector(irq_ack_o_int); - freq_gen_o <= std_logic(freq_gen_o_int); + freq_gen_o <= std_logic_vector(freq_gen_o_int); -- Wishbone-to-AXI4-Lite-compatible Bridge ---------------------------------- diff --git a/rtl/top_templates/neo430_top_std_logic.vhd b/rtl/top_templates/neo430_top_std_logic.vhd index 98866f9..bc85f81 100644 --- a/rtl/top_templates/neo430_top_std_logic.vhd +++ b/rtl/top_templates/neo430_top_std_logic.vhd @@ -218,7 +218,7 @@ begin wb_stb_o <= std_logic(wb_stb_o_int); wb_cyc_o <= std_logic(wb_cyc_o_int); ext_ack_o <= std_logic_vector(irq_ack_o_int); - freq_gen_o <= std_logic(freq_gen_o_int); + freq_gen_o <= std_logic_vector(freq_gen_o_int); end neo430_top_std_logic_rtl;