From ccdc2ff149c079157237e24d7d74d4c59b4b4b8e Mon Sep 17 00:00:00 2001
From: 7mile <i@7li.moe>
Date: Wed, 2 Oct 2024 06:38:54 +0800
Subject: [PATCH] [CIR][CodeGen][NFC] Break the missing feature flag for OpenCL
 into smaller pieces (#902)

The missing feature flag for OpenCL has very few occurrences now. This
PR rearranges them into proper pieces to better track them.
---
 clang/include/clang/CIR/MissingFeatures.h | 2 +-
 clang/lib/CIR/CodeGen/CIRGenCXX.cpp       | 2 +-
 clang/lib/CIR/CodeGen/CIRGenDecl.cpp      | 1 -
 3 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/clang/include/clang/CIR/MissingFeatures.h b/clang/include/clang/CIR/MissingFeatures.h
index 3540300d622c..5f92e4e60cba 100644
--- a/clang/include/clang/CIR/MissingFeatures.h
+++ b/clang/include/clang/CIR/MissingFeatures.h
@@ -154,7 +154,7 @@ struct MissingFeatures {
   static bool CGFPOptionsRAII() { return false; }
   static bool getFPFeaturesInEffect() { return false; }
   static bool cxxABI() { return false; }
-  static bool openCL() { return false; }
+  static bool openCLCXX() { return false; }
   static bool openCLBuiltinTypes() { return false; }
   static bool CUDA() { return false; }
   static bool openMP() { return false; }
diff --git a/clang/lib/CIR/CodeGen/CIRGenCXX.cpp b/clang/lib/CIR/CodeGen/CIRGenCXX.cpp
index 179e128ac2f8..e81ff16fd659 100644
--- a/clang/lib/CIR/CodeGen/CIRGenCXX.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenCXX.cpp
@@ -253,7 +253,7 @@ static void buildDeclDestroy(CIRGenFunction &CGF, const VarDecl *D) {
   if (Record && (CanRegisterDestructor || UsingExternalHelper)) {
     assert(!D->getTLSKind() && "TLS NYI");
     assert(!Record->hasTrivialDestructor());
-    assert(!MissingFeatures::openCL());
+    assert(!MissingFeatures::openCLCXX());
     CXXDestructorDecl *Dtor = Record->getDestructor();
     // In LLVM OG codegen this is done in registerGlobalDtor, but CIRGen
     // relies on LoweringPrepare for further decoupling, so build the
diff --git a/clang/lib/CIR/CodeGen/CIRGenDecl.cpp b/clang/lib/CIR/CodeGen/CIRGenDecl.cpp
index 30e4019a24d0..a52ef462552b 100644
--- a/clang/lib/CIR/CodeGen/CIRGenDecl.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenDecl.cpp
@@ -36,7 +36,6 @@ CIRGenFunction::AutoVarEmission
 CIRGenFunction::buildAutoVarAlloca(const VarDecl &D,
                                    mlir::OpBuilder::InsertPoint ip) {
   QualType Ty = D.getType();
-  assert(!MissingFeatures::openCL());
   assert(
       Ty.getAddressSpace() == LangAS::Default ||
       (Ty.getAddressSpace() == LangAS::opencl_private && getLangOpts().OpenCL));