From 8622d6593875aec2f0c232eba5e0d1017bfac07e Mon Sep 17 00:00:00 2001 From: Tariq Kurd Date: Tue, 10 Dec 2024 18:18:41 +0100 Subject: [PATCH 1/4] fix descriptions --- src/csv/CHERI_CSR.csv | 2 +- src/csv/CHERI_ISA.csv | 64 +++++++++++++++++++++---------------------- 2 files changed, 33 insertions(+), 33 deletions(-) diff --git a/src/csv/CHERI_CSR.csv b/src/csv/CHERI_CSR.csv index 40e6e0c8..758d8fbe 100644 --- a/src/csv/CHERI_CSR.csv +++ b/src/csv/CHERI_CSR.csv @@ -46,5 +46,5 @@ direct write if address didn't change","","✔","","","{cheri_default_ext_name}" "dinfc","0x7bd","","D","DRW","<>","Ignore","Ignore","","","","✔","Sdext","Source of <> capability in debug mode, writes are ignored","","","","","","","","","","","","","","","","","","","","","" "utidc","0x480","utid","U","Read: U, Write: U, <>","tag=0, otherwise undefined","Update the CSR using <>.","direct write","","","","✔","Zstid","User thread ID","","","","","","","","","","","","","","","","","","","","","" "stidc","0x580","stid","S","Read: S, Write: S, <>","tag=0, otherwise undefined","Update the CSR using <>.","direct write","","","","✔","Zstid","Supervisor thread ID","","","","","","","","","","","","","","","","","","","","","" -"vstidc","0xA80","vstid","H","Read: VS, Write: VS, <>","tag=0, otherwise undefined","Update the CSR using <>.","direct write","","","","✔","Zstid","Virtual supervisor thread ID","","","","","","","","","","","","","","","","","","","","","" +"vstidc","0xA80","vstid","VS","Read: H, Write: H, <>","tag=0, otherwise undefined","Update the CSR using <>.","direct write","","","","✔","Zstid","Virtual supervisor thread ID","","","","","","","","","","","","","","","","","","","","","" "mtidc","0x780","mtid","M","Read: M, Write: M, <>","tag=0, otherwise undefined","Update the CSR using <>.","direct write","","","","✔","Zstid","Machine thread ID","","","","","","","","","","","","","","","","","","","","","" diff --git a/src/csv/CHERI_ISA.csv b/src/csv/CHERI_ISA.csv index eef8d0de..8961e101 100644 --- a/src/csv/CHERI_ISA.csv +++ b/src/csv/CHERI_ISA.csv @@ -1,18 +1,18 @@ "Mnemonic","RV32","RV64","Base ISA (I/E)","Zish4add","Zabhlrsc","{cheri_default_ext_name}","{cheri_base_ext_name}","Valid Modes","A","Zicbo[mpz]","Zba","C or Zca","Zcb","Zcf","Zcd","Zcmp","Zcmt","Zfh","F","D","V","H","XLEN dependent encoding","funct3","major opcode","Format","{cheri_int_mode_name} mnemonic RV32","{cheri_int_mode_name} mnemonic RV64","Function","illegal insn if (1)","OR illegal insn if (2)","OR illegal insn if (3)","illegal insn if (4)","illegal insn if (5)","illegal insn if (6)","illegal insn if (7)","illegal insn if (8)" -"LC","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","3","MISC_MEM","I-type","","","Load cap via int pointer","","","","","","","","" -"SC","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","","STORE","S-type","","","Store cap via int pointer","","","","","","","","" -"C.LCSP","✔","✔","","","","","✔","{cheri_cap_mode_name}","","","","✔","","","","","","","","","","","✔","","C2","","C.FLWSP","C.FLDSP","Load cap capability, SP relative ","","","","","","","","" -"C.SCSP","✔","✔","","","","","✔","{cheri_cap_mode_name}","","","","✔","","","","","","","","","","","✔","","C2","","C.FSWSP","C.FSDSP","Store cap capability, SP relative ","","","","","","","","" -"C.LC","✔","✔","","","","","✔","{cheri_cap_mode_name}","","","","✔","","","","","","","","","","","✔","","C0","","C.FLW","C.FLD","Load cap capability","","","","","","","","" -"C.SC","✔","✔","","","","","✔","{cheri_cap_mode_name}","","","","✔","","","","","","","","","","","✔","","C0","","C.FSW","C.FSD","Store cap capability ","","","","","","","","" -"C.LWSP","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Load word capability, SP relative","","","","","","","","" -"C.SWSP","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Store word capability, SP relative","","","","","","","","" -"C.LW","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C0","","","","Load word capability","","","","","","","","" -"C.SW","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C0","","","","Store word capability ","","","","","","","","" -"C.LD","","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C0","","","","Load word capability","","","","","","","","" -"C.SD","","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C0","","","","Store word capability ","","","","","","","","" -"C.LDSP","","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C0","","","","Load word capability","","","","","","","","" -"C.SDSP","","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C0","","","","Store word capability ","","","","","","","","" +"LC","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","3","MISC_MEM","I-type","","","Load capability","","","","","","","","" +"SC","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","","STORE","S-type","","","Store capability","","","","","","","","" +"Indirect jump and link, bounds check minimum size target instruction, unseal target cap. In {cheri_cap_mode_name} set PCC to cs1 and seal link cap","✔","✔","","","","","✔","{cheri_cap_mode_name}","","","","✔","","","","","","","","","","","✔","","C2","","C.FLWSP","C.FLDSP","Load capability, SP relative ","","","","","","","","" +"C.SCSP","✔","✔","","","","","✔","{cheri_cap_mode_name}","","","","✔","","","","","","","","","","","✔","","C2","","C.FSWSP","C.FSDSP","Store capability, SP relative ","","","","","","","","" +"C.LC","✔","✔","","","","","✔","{cheri_cap_mode_name}","","","","✔","","","","","","","","","","","✔","","C0","","C.FLW","C.FLD","Load capability","","","","","","","","" +"C.SC","✔","✔","","","","","✔","{cheri_cap_mode_name}","","","","✔","","","","","","","","","","","✔","","C0","","C.FSW","C.FSD","Store capability ","","","","","","","","" +"C.LWSP","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Load word, SP relative","","","","","","","","" +"C.SWSP","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Store word, SP relative","","","","","","","","" +"C.LW","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C0","","","","Load word","","","","","","","","" +"C.SW","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C0","","","","Store word","","","","","","","","" +"C.LD","","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C0","","","","Load double","","","","","","","","" +"C.SD","","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C0","","","","Store double","","","","","","","","" +"C.LDSP","","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C0","","","","Load double, SP relative","","","","","","","","" +"C.SDSP","","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C0","","","","Store double, SP relative","","","","","","","","" "LB","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","0","LOAD","","","","Load signed byte ","","","","","","","","" "LH","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","1","LOAD","","","","Load signed half ","","","","","","","","" "C.LH","✔","✔","","","","✔","✔","Both","","","","","✔","","","","","","","","","","","","C0","","","","Load signed half ","","","","","","","","" @@ -30,8 +30,8 @@ "SW","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","","STORE","","","","Store word ","","","","","","","","" "SD","","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","","STORE","","","","Store double ","","","","","","","","" "AUIPC","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","","AUIPC","","","","Add immediate to PCC address","","","","","","","","" -"CADD","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","","OP","R-type","","","Increment cap address by register, representability check","","","","","","","","" -"CADDI","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","","OP","I-type","","","Increment cap address by immediate, representability check","","","","","","","","" +"CADD","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","","OP","R-type","","","Increment capability address by register, representability check","","","","","","","","" +"CADDI","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","","OP","I-type","","","Increment capability address by immediate, representability check","","","","","","","","" "SCADDR","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","","OP","R-type","","","Replace capability address, representability check","","","","","","","","" "GCTAG","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","","OP","1-src 1-dst","","","Get tag field","","","","","","","","" "GCPERM","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","","OP","1-src 1-dst","","","Get hperm and uperm fields as 1-bit per permission, packed together","","","","","","","","" @@ -54,15 +54,15 @@ "GCMODE","✔","✔","","","","✔","","Both","","","","","","","","","","","","","","","","","OP","1-src 1-dst","","","Get the mode bit of a capability, no permissions required","","","","","","","","" "MODESW.CAP","✔","✔","","","","✔","","Both","","","","","","","","","","","","","","","","","OP","no operands","","","Directly switch mode into {cheri_cap_mode_name}","","","","","","","","" "MODESW.INT","✔","✔","","","","✔","","Both","","","","","","","","","","","","","","","","","OP","no operands","","","Directly switch mode into {cheri_int_mode_name}","","","","","","","","" -"C.ADDI16SP","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C0","","","","ADD immediate to stack pointer, CADD in Capability Mode","","","","","","","","" -"C.ADDI4SPN","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C0","","","","ADD immediate to stack pointer, CADDI in Capability Mode","","","","","","","","" -"C.MV","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Register Move, cap reg move in Capability Mode","","","","","","","","" +"C.ADDI16SP","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C0","","","","ADD immediate to stack pointer in {cheri_int_mode_name}, CADD in {cheri_cap_mode_name}","","","","","","","","" +"C.ADDI4SPN","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C0","","","","ADD immediate to stack pointer in {cheri_int_mode_name}, CADD in {cheri_cap_mode_name}","","","","","","","","" +"C.MV","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Integer register move in {cheri_int_mode_name}, capability register move in {cheri_cap_mode_name}","","","","","","","","" "C.J","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Jump to PC+offset, bounds check minimum size target instruction","mode==D (optional)","","","","","","","" "C.JAL","✔","","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Jump to PC+offset, bounds check minimum size target instruction, link to cd","mode==D (optional)","","","","","","","" "JAL","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","JAL","","","","Jump to PC+offset, bounds check minimum size target instruction, link to cd","mode==D (optional)","","","","","","","" -"JALR","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","","JALR","","","","Indirect cap jump and link, bounds check minimum size target instruction, unseal target cap, seal link cap","mode==D (optional)","","","","","","","" -"C.JALR","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Indirect cap jump and link, bounds check minimum size target instruction, unseal target cap, seal link cap","mode==D (optional)","","","","","","","" -"C.JR","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Indirect cap jump, bounds check minimum size target instruction, unseal target cap","mode==D (optional)","","","","","","","" +"JALR","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","","JALR","","","","Indirect jump and link, bounds check minimum size target instruction. In {cheri_cap_mode_name} set PCC=unseal(cs1),cd=seal(nextPCC)","mode==D (optional)","","","","","","","" +"C.JALR","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Indirect jump and link, bounds check minimum size target instruction. In {cheri_cap_mode_name} set PCC=unseal(cs1),cd=seal(nextPCC)","mode==D (optional)","","","","","","","" +"C.JR","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Indirect jump, bounds check minimum size target instruction. In {cheri_cap_mode_name} set PCC=unseal(cs1)","mode==D (optional)","","","","","","","" "DRET","✔","✔","✔","","","✔","✔","Both","","","","","","","","","","","","","","","","","SYSTEM","","","","Return from debug mode, sets <> from <> and <> from <>","MODE> from <> , needs <>","MODE> from <>, needs <>","MODE Date: Tue, 10 Dec 2024 18:23:05 +0100 Subject: [PATCH 2/4] revert ISA csv --- src/csv/CHERI_CSR.csv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/csv/CHERI_CSR.csv b/src/csv/CHERI_CSR.csv index 758d8fbe..07b0dc64 100644 --- a/src/csv/CHERI_CSR.csv +++ b/src/csv/CHERI_CSR.csv @@ -46,5 +46,5 @@ direct write if address didn't change","","✔","","","{cheri_default_ext_name}" "dinfc","0x7bd","","D","DRW","<>","Ignore","Ignore","","","","✔","Sdext","Source of <> capability in debug mode, writes are ignored","","","","","","","","","","","","","","","","","","","","","" "utidc","0x480","utid","U","Read: U, Write: U, <>","tag=0, otherwise undefined","Update the CSR using <>.","direct write","","","","✔","Zstid","User thread ID","","","","","","","","","","","","","","","","","","","","","" "stidc","0x580","stid","S","Read: S, Write: S, <>","tag=0, otherwise undefined","Update the CSR using <>.","direct write","","","","✔","Zstid","Supervisor thread ID","","","","","","","","","","","","","","","","","","","","","" -"vstidc","0xA80","vstid","VS","Read: H, Write: H, <>","tag=0, otherwise undefined","Update the CSR using <>.","direct write","","","","✔","Zstid","Virtual supervisor thread ID","","","","","","","","","","","","","","","","","","","","","" +"vstidc","0xA80","vstid","H","Read: VS, Write: VS, <>","tag=0, otherwise undefined","Update the CSR using <>.","direct write","","","","✔","Zstid","Virtual supervisor thread ID","","","","","","","","","","","","","","","","","","","","", "mtidc","0x780","mtid","M","Read: M, Write: M, <>","tag=0, otherwise undefined","Update the CSR using <>.","direct write","","","","✔","Zstid","Machine thread ID","","","","","","","","","","","","","","","","","","","","","" From d08ec6867ebf9b8e318735ec7c67879bc494e95c Mon Sep 17 00:00:00 2001 From: Tariq Kurd Date: Tue, 10 Dec 2024 17:26:51 +0000 Subject: [PATCH 3/4] Update src/csv/CHERI_CSR.csv Signed-off-by: Tariq Kurd --- src/csv/CHERI_CSR.csv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/csv/CHERI_CSR.csv b/src/csv/CHERI_CSR.csv index 07b0dc64..40e6e0c8 100644 --- a/src/csv/CHERI_CSR.csv +++ b/src/csv/CHERI_CSR.csv @@ -46,5 +46,5 @@ direct write if address didn't change","","✔","","","{cheri_default_ext_name}" "dinfc","0x7bd","","D","DRW","<>","Ignore","Ignore","","","","✔","Sdext","Source of <> capability in debug mode, writes are ignored","","","","","","","","","","","","","","","","","","","","","" "utidc","0x480","utid","U","Read: U, Write: U, <>","tag=0, otherwise undefined","Update the CSR using <>.","direct write","","","","✔","Zstid","User thread ID","","","","","","","","","","","","","","","","","","","","","" "stidc","0x580","stid","S","Read: S, Write: S, <>","tag=0, otherwise undefined","Update the CSR using <>.","direct write","","","","✔","Zstid","Supervisor thread ID","","","","","","","","","","","","","","","","","","","","","" -"vstidc","0xA80","vstid","H","Read: VS, Write: VS, <>","tag=0, otherwise undefined","Update the CSR using <>.","direct write","","","","✔","Zstid","Virtual supervisor thread ID","","","","","","","","","","","","","","","","","","","","", +"vstidc","0xA80","vstid","H","Read: VS, Write: VS, <>","tag=0, otherwise undefined","Update the CSR using <>.","direct write","","","","✔","Zstid","Virtual supervisor thread ID","","","","","","","","","","","","","","","","","","","","","" "mtidc","0x780","mtid","M","Read: M, Write: M, <>","tag=0, otherwise undefined","Update the CSR using <>.","direct write","","","","✔","Zstid","Machine thread ID","","","","","","","","","","","","","","","","","","","","","" From bfd17c2426b1d71f6392039fcf3e3a340dba0c01 Mon Sep 17 00:00:00 2001 From: Tariq Kurd Date: Wed, 11 Dec 2024 10:08:44 +0100 Subject: [PATCH 4/4] fix copy-paste error --- src/csv/CHERI_ISA.csv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/csv/CHERI_ISA.csv b/src/csv/CHERI_ISA.csv index 8961e101..e45641a7 100644 --- a/src/csv/CHERI_ISA.csv +++ b/src/csv/CHERI_ISA.csv @@ -1,7 +1,7 @@ "Mnemonic","RV32","RV64","Base ISA (I/E)","Zish4add","Zabhlrsc","{cheri_default_ext_name}","{cheri_base_ext_name}","Valid Modes","A","Zicbo[mpz]","Zba","C or Zca","Zcb","Zcf","Zcd","Zcmp","Zcmt","Zfh","F","D","V","H","XLEN dependent encoding","funct3","major opcode","Format","{cheri_int_mode_name} mnemonic RV32","{cheri_int_mode_name} mnemonic RV64","Function","illegal insn if (1)","OR illegal insn if (2)","OR illegal insn if (3)","illegal insn if (4)","illegal insn if (5)","illegal insn if (6)","illegal insn if (7)","illegal insn if (8)" "LC","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","3","MISC_MEM","I-type","","","Load capability","","","","","","","","" "SC","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","","STORE","S-type","","","Store capability","","","","","","","","" -"Indirect jump and link, bounds check minimum size target instruction, unseal target cap. In {cheri_cap_mode_name} set PCC to cs1 and seal link cap","✔","✔","","","","","✔","{cheri_cap_mode_name}","","","","✔","","","","","","","","","","","✔","","C2","","C.FLWSP","C.FLDSP","Load capability, SP relative ","","","","","","","","" +"C.LCSP","✔","✔","","","","","✔","{cheri_cap_mode_name}","","","","✔","","","","","","","","","","","✔","","C2","","C.FLWSP","C.FLDSP","Load capability, SP relative ","","","","","","","","" "C.SCSP","✔","✔","","","","","✔","{cheri_cap_mode_name}","","","","✔","","","","","","","","","","","✔","","C2","","C.FSWSP","C.FSDSP","Store capability, SP relative ","","","","","","","","" "C.LC","✔","✔","","","","","✔","{cheri_cap_mode_name}","","","","✔","","","","","","","","","","","✔","","C0","","C.FLW","C.FLD","Load capability","","","","","","","","" "C.SC","✔","✔","","","","","✔","{cheri_cap_mode_name}","","","","✔","","","","","","","","","","","✔","","C0","","C.FSW","C.FSD","Store capability ","","","","","","","",""