From cd01404409ec0d8080b7a4340b81a01eb4a00a8a Mon Sep 17 00:00:00 2001 From: Tariq Kurd Date: Tue, 29 Oct 2024 19:11:59 +0100 Subject: [PATCH] Add CL rules for CBLD and SCSS (#437) Fixes https://github.com/riscv/riscv-cheri/issues/434 --- src/insns/cbld_32bit.adoc | 2 ++ src/insns/scss_32bit.adoc | 18 +++++++++++------- 2 files changed, 13 insertions(+), 7 deletions(-) diff --git a/src/insns/cbld_32bit.adoc b/src/insns/cbld_32bit.adoc index 2ea25f51..c382bec4 100644 --- a/src/insns/cbld_32bit.adoc +++ b/src/insns/cbld_32bit.adoc @@ -28,6 +28,8 @@ Copy `cs2` to `cd` and set `cd.tag` to 1 if . `cs1` 's permissions could have been legally produced by <>, and . `cs1` is not sealed, and . `cs2` 's permissions and bounds are equal to or a subset of `cs1` 's, and +. `cs2` 's <> is equal to or lower than `cs1` 's, and +.. _This is only relevant if {cheri_levels_ext_name} is implemented._ . `cs2` 's bounds are not <>, and all reserved fields are zero, and . `cs2` 's permissions could have been legally produced by <>, and . All reserved bits in `cs2` 's metadata are 0; diff --git a/src/insns/scss_32bit.adoc b/src/insns/scss_32bit.adoc index 3af0ec51..c9db1951 100644 --- a/src/insns/scss_32bit.adoc +++ b/src/insns/scss_32bit.adoc @@ -14,7 +14,7 @@ endif::[] include::new_encoding_note.adoc[] Synopsis:: -Capability test subset +Set Capability Subset Mnemonic:: `scss rd, cs1, cs2` @@ -23,12 +23,16 @@ Encoding:: include::wavedrom/scss.adoc[] Description:: -`rd` is set to 1 if the tag of capabilities `cs1` and `cs2` are equal and the -bounds and permissions of `cs2` are a subset of those of `cs1`. Output 0 to -`rd` if either `cs1` or `cs2`: -. Have bounds which are <>, or -. Have any bits set in reserved fields, or -. Have permissions that could not have been legally produced by <> +`rd` is set to 1 if: +. the tag of capabilities `cs1` and `cs2` are equal, and +. the bounds and permissions of `cs2` are a subset of those of `cs1`, and +. `cs2` 's <> is equal to or lower than `cs1` 's +.. _This is only relevant if {cheri_levels_ext_name} is implemented._ +. neither `cs1` or `cs2` have bounds which are <>, and +. neither `cs1` or `cs2` have any bits set in reserved fields, and +. neither `cs1` or `cs2` have permissions that could not have been legally produced by <> + +Otherwise set `rd` to 0. NOTE: The implementation of this instruction is similar to <>, although <> does not include the sealed bit in the check.