From a7ab1b241d8d67f60b14da178ca961d28712e986 Mon Sep 17 00:00:00 2001
From: Jessica Clarke <jrtc27@jrtc27.com>
Date: Tue, 17 Dec 2024 11:56:29 +0000
Subject: [PATCH] Use stval/stval2 for HS-mode exceptions, not htval/htval2
 (#483)

htval exists solely to communiate extra information to HS-mode about
VS-mode faults to HS-mode, currently just the guest physical address for
G-stage page faults. CHERI exceptions can and must (to align with other
kinds of faults, including HS-mode's own faults) use stval/stval2 when
trapping from HS-mode.

Fixes #482
---
 src/hypervisor-integration.adoc | 30 ------------------------------
 src/img/htval2reg.edn           | 20 --------------------
 src/img/htvalreg.edn            | 14 --------------
 3 files changed, 64 deletions(-)
 delete mode 100644 src/img/htval2reg.edn
 delete mode 100644 src/img/htvalreg.edn

diff --git a/src/hypervisor-integration.adoc b/src/hypervisor-integration.adoc
index 9e84649d..d3540d01 100644
--- a/src/hypervisor-integration.adoc
+++ b/src/hypervisor-integration.adoc
@@ -56,36 +56,6 @@ The reset value is 0.
 Bit 28 of <<hedeleg>> now refers to a valid exception and so can be used to
 delegate CHERI exceptions to virtual supervisor mode.
 
-[#htval,reftext="htval"]
-=== Hypervisor Trap Value Register (htval)
-
-The <<htval>> register operates as described in cite:[riscv-priv-spec].
-
-<<htval>> is updated following the same rules as <<mtval>> for CHERI exceptions
-which are taken in HS-mode.
-
-.Hypervisor trap value register
-include::img/htvalreg.edn[]
-
-[#htval2,reftext="htval2"]
-=== Hypervisor Trap Value Register 2 (htval2)
-
-The <<htval2>> register is an HSXLEN-bit read-write register, which is added as
-part of {cheri_base_ext_name} when the hypervisor extension is supported. Its
-CSR address is 0x64b.
-
-<<htval2>> is updated following the same rules as <<mtval2>> for CHERI exceptions,
-load page fault and store page fault exceptions which are taken in HS-mode.
-
-The fields are identical to <<mtval2>> for CHERI exceptions.
-
-NOTE: <<htval2>> is not a standard RISC-V CSR, but <<mtval2>>
-is.
-
-.Hypervisor trap value register 2
-[#hstval2-format]
-include::img/htval2reg.edn[]
-
 [#vsstatus,reftext="vsstatus"]
 === Virtual Supervisor Status Register (vsstatus)
 
diff --git a/src/img/htval2reg.edn b/src/img/htval2reg.edn
deleted file mode 100644
index f7ec9e17..00000000
--- a/src/img/htval2reg.edn
+++ /dev/null
@@ -1,20 +0,0 @@
-[bytefield]
-----
-(defattrs :plain [:plain {:font-family "M+ 1p Fallback" :font-size 24}])
-(def row-height 40)
-(def row-header-fn nil)
-(def left-margin 100)
-(def right-margin 100)
-(def boxes-per-row 32)
-(draw-column-headers {:height 20 :font-size 18 :labels (reverse ["0" "" "" "3" "4" "" "" "" "" "" "" "" "" "" "" "15" "16" "" "" "19" "20" "" "" "" "" "" "" "" "" "" "" "HSXLEN-1"])})
-
-(draw-box "WPRI"       {:span 12})
-(draw-box "TYPE"       {:span 4})
-(draw-box "WPRI"       {:span 12})
-(draw-box "CAUSE"      {:span 4})
-
-(draw-box "HSXLEN-20" {:span 12 :borders {}})
-(draw-box "4"        {:span 4 :borders {}})
-(draw-box "12"       {:span 12 :borders {}})
-(draw-box "4"        {:span 4 :borders {}})
-----
diff --git a/src/img/htvalreg.edn b/src/img/htvalreg.edn
deleted file mode 100644
index 04cdc80d..00000000
--- a/src/img/htvalreg.edn
+++ /dev/null
@@ -1,14 +0,0 @@
-[bytefield]
-----
-(defattrs :plain [:plain {:font-family "M+ 1p Fallback" :font-size 24}])
-(def row-height 40)
-(def row-header-fn nil)
-(def left-margin 100)
-(def right-margin 100)
-(def boxes-per-row 32)
-(draw-column-headers {:height 20 :font-size 18 :labels (reverse ["0" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "HSXLEN-1"])})
-
-(draw-box "htval"   {:span 32})
-
-(draw-box "HSXLEN" {:span 32 :borders {}})
-----