From a6bb33f5ee9d4d9051ab622d1cfe2339d87c8e3e Mon Sep 17 00:00:00 2001 From: Franz Fuchs Date: Sat, 7 Dec 2024 17:13:54 +0000 Subject: [PATCH] Extended text to reflect that access is not allowed to CHERI instructions --- src/riscv-hybrid-integration.adoc | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/src/riscv-hybrid-integration.adoc b/src/riscv-hybrid-integration.adoc index 73e8129c..c0907165 100644 --- a/src/riscv-hybrid-integration.adoc +++ b/src/riscv-hybrid-integration.adoc @@ -324,7 +324,7 @@ it is not possible to disable CHERI checks completely. endif::[] {cheri_default_ext_name} includes functions to disable explicit access to CHERI -registers. The following occurs when executing code in a privilege mode that +registers and instructions. The following occurs when executing code in a privilege mode that has CHERI register access disabled: * The CHERI instructions in xref:section_cap_instructions[xrefstyle=short] and @@ -462,8 +462,9 @@ xref:menvcfgmodereg[xrefstyle=short]. include::img/menvcfgmodereg.edn[] The CHERI Register Enable (CRE) bit controls whether less privileged levels can -perform explicit accesses to CHERI registers. When <>.CRE=1 and <>.CRE=1, -CHERI registers can be read and written by less privileged levels. When <>.CRE=0, +perform explicit accesses to CHERI registers and execute CHERI instructions. +When <>.CRE=1 and <>.CRE=1, CHERI registers can be read and +written by less privileged levels. When <>.CRE=0, CHERI registers are disabled in less privileged levels as described in xref:section_cheri_disable[xrefstyle=short]. @@ -495,8 +496,9 @@ xref:senvcfgreg[xrefstyle=short]. include::img/senvcfgreg.edn[] The CHERI Register Enable (CRE) bit controls whether U-mode can perform -explicit accesses to CHERI registers. When <>.CRE=1 and <>.CRE=1 and -<>.CRE=1 CHERI registers can be read and written by U-mode. When <>.CRE=0, +explicit accesses to CHERI registers and execute CHERI instructions. When +<>.CRE=1 and <>.CRE=1 and <>.CRE=1 CHERI registers +can be read and written by U-mode. When <>.CRE=0, CHERI registers are disabled in U-mode as described in xref:section_cheri_disable[xrefstyle=short].