Assembler failure for "W" variant of Bitmanip instructions

[eflaner]

GNU Tool-chain

Tool-chain built using the commands from here (Line 19 is also used)
After building the toolchain output of riscv64-unknown-elf-gcc -v

Target: riscv64-unknown-elf
Configured with: /scratch/riscv-tools/riscv-gnu-toolchain/riscv-gcc/configure --target=riscv64-unknown-elf --prefix=/scratch/toolchain/B --disable-shared --disable-threads --enable-languages=c,c++ --with-system-zlib --enable-tls --with-newlib --with-sysroot=/scratch/toolchain/B/riscv64-unknown-elf --with-native-system-header-dir=/include --disable-libmudflap --disable-libssp --disable-libquadmath --disable-libgomp --disable-nls --disable-tm-clone-registry --src=.././riscv-gcc --disable-multilib --with-abi=lp64 --with-arch=rv64imac_zba_zbb_zbc_zbe_zbf_zbp_zbr_zbs_zbt_zbm --with-tune=rocket 'CFLAGS_FOR_TARGET=-Os -mcmodel=medany' 'CXXFLAGS_FOR_TARGET=-Os -mcmodel=medany'
Thread model: single
Supported LTO compression algorithms: zlib
gcc version 10.2.0 (GCC) ​

Compilation Issues and Observations :

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Issue 1 :

The syntax for w variant is grevw rd,rs1,rs2

While trying to generate the above instruction using in-line assembly as

asm volatile ("\t grevw %0, %1, %2 " : "=r"(lv_test) :"r"(rs1), "r"(rs2))

it throws error.

Assembler messages: Error: instruction 'grevw' requires absolute expression

List of instructions that exhibit this error are:

grevw, gorcw, shflw, unshflw, xperm.w, packw, packuw, bfpw, fslw, fsrw, fsriw

Observation :

The same instruction compiles without error when using

asm volatile ("\t grevw %0, %1, 0x1f ": "=r"(lv_test) : "r"(rs1))

where in the second operand is immediate in nature.

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Issue 2 :

Instructions in bitmanip draft 0.94 not recognized

Assembler messages:Error: unrecognized opcode `becompress'

List of instructions exhibiting the error:

becompress,becompressw,bdecompress,bdecompressw

Observation :

These Instructions exists as bdep and bext in the earlier draft versions. But bext conflicts with the ZBS instruction in ratified version.

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Minimum working example test.txt

command to reproduce the error

riscv64-unknown-elf-gcc -mcmodel=medany -static -std=gnu99 -ffast-math -fno-common -Wall -Werror -Os -ffunction-sections -fdata-sections -w -static -nostartfiles -lm -lgcc -march=rv64im_zbc_zbs_zbb_zbe_zbp_zbf_zba_zbm_zbt_zbr -c ./test.c -o ./test.o

[pz9115]

For issue 1, that is a type checking error for opreand, I had a quick fix on this, thanks for your review and point it out.
pz9115/riscv-binutils-gdb@2d4c22f

For issue 2, since draft 0.94 is not a stable version, We just had a develop branch and follow Claire's suggestion to change the name into BMEXT/BMDEP, https://github.com/pz9115/riscv-binutils-gdb/tree/b-dev you can try it, we will follow the spec changes and if you need more help, please contact us.

[eflaner]

For Issue 2, I agree that v0.94 isn't a stable version, yet,
for instance in riscv-opc.c BEXT of ZBS (Frozen Spec) is missing.

The chaos is due to the fact that,
BEXT of v0.93 has different functionality than BEXT of v0.94 / Frozen Spec.