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diff --git a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_1.rst b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_1.rst
index 1101adf3..714f168f 100644
--- a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_1.rst
+++ b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__addf_1
 
 **gf180mcu_fd_sc_mcu9t5v0__addf_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__addf_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__addf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__addf_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__addf_1 layout**
@@ -67,7 +67,9 @@ CO             ((A&B)|(A&CI)|(B&CI))
 
 |
 | FUNCTIONAL SCHEMATIC
-| |Schematic Not Available|
+
+.. image:: gf180mcu_fd_sc_mcu9t5v0__addf_1.png
+
 | PIN CAPACITANCE (pf)
 
 ======= ======== ====================
diff --git a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_1.schematic.png b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_1.schematic.png
deleted file mode 100644
index d27f5c7e..00000000
Binary files a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_1.schematic.png and /dev/null differ
diff --git a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_2.rst b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_2.rst
index 23d99bf9..50415712 100644
--- a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_2.rst
+++ b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__addf_2
 
 **gf180mcu_fd_sc_mcu9t5v0__addf_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__addf_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__addf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__addf_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__addf_2 layout**
diff --git a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_2.schematic.png b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_2.schematic.png
deleted file mode 100644
index d27f5c7e..00000000
Binary files a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_2.schematic.png and /dev/null differ
diff --git a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_4.rst b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_4.rst
index c26cae38..09cd38b2 100644
--- a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_4.rst
+++ b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__addf_4
 
 **gf180mcu_fd_sc_mcu9t5v0__addf_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__addf_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__addf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__addf_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__addf_4 layout**
diff --git a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_4.schematic.png b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_4.schematic.png
deleted file mode 100644
index d27f5c7e..00000000
Binary files a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_4.schematic.png and /dev/null differ
diff --git a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh.schematic.svg b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh.schematic.svg
new file mode 100644
index 00000000..cdfc11e0
--- /dev/null
+++ b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="315" height="188.5"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(208,19.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__addh.v:22$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__addh.v:22$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(143,60.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__addh.v:30$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__addh.v:30$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(143,146.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__addh.v:38$3"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__addh.v:38$3"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,50.5)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__addh.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__addh.v:0$5"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__addh.v:0$5"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,91.5)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__addh.v:0$6"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 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s:type="inputExt" transform="translate(12,91.5)" s:width="30" s:height="20" id="cell_A"><text x="15" y="-4" class="nodelabel cell_A" s:attribute="ref">A</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,156.5)" s:width="30" s:height="20" id="cell_B"><text x="15" y="-4" class="nodelabel cell_B" s:attribute="ref">B</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_B"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(273,141.5)" s:width="30" s:height="20" id="cell_S"><text x="15" y="-4" class="nodelabel cell_S" s:attribute="ref">S</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_S"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="52" y1="101.5" y2="101.5" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="52" y1="101.5" y2="28.5" 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\ No newline at end of file
diff --git a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_1.rst b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_1.rst
index 68e78c12..39e0475c 100644
--- a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_1.rst
+++ b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__addh_1
 
 **gf180mcu_fd_sc_mcu9t5v0__addh_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__addh_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__addh.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__addh_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__addh_1 layout**
diff --git a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_1.schematic.png b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_1.schematic.png
deleted file mode 100644
index e9884072..00000000
Binary files a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_1.schematic.png and /dev/null differ
diff --git a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_2.rst b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_2.rst
index 4fc81e48..34ffb116 100644
--- a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_2.rst
+++ b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__addh_2
 
 **gf180mcu_fd_sc_mcu9t5v0__addh_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__addh_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__addh.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__addh_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__addh_2 layout**
diff --git a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_2.schematic.png b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_2.schematic.png
deleted file mode 100644
index e9884072..00000000
Binary files a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_2.schematic.png and /dev/null differ
diff --git a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_4.rst b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_4.rst
index a38e976f..0662cef0 100644
--- a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_4.rst
+++ b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__addh_4
 
 **gf180mcu_fd_sc_mcu9t5v0__addh_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__addh_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__addh.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__addh_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__addh_4 layout**
diff --git a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_4.schematic.png b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_4.schematic.png
deleted file mode 100644
index e9884072..00000000
Binary files a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_4.schematic.png and /dev/null differ
diff --git a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2.schematic.svg b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2.schematic.svg
new file mode 100644
index 00000000..7d8e8f9c
--- /dev/null
+++ b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="184" height="119"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(77,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and2.v:22$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and2.v:22$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(142,29.5)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="52" y1="97" y2="97" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="52" y1="97" y2="47" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="77" y1="47" y2="47" class="net_3 width_1" style="stroke-width: 1"/><line x1="107" x2="142" y1="39.5" y2="39.5" class="net_4 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_1.rst b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_1.rst
index 82e84cfc..dab2c998 100644
--- a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_1.rst
+++ b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__and2_1
 
 **gf180mcu_fd_sc_mcu9t5v0__and2_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__and2_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__and2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__and2_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__and2_1 layout**
diff --git a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_1.schematic.png b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_1.schematic.png
deleted file mode 100644
index ac709871..00000000
Binary files a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_1.schematic.png and /dev/null differ
diff --git a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_2.rst b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_2.rst
index b731f045..fd6a76af 100644
--- a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_2.rst
+++ b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__and2_2
 
 **gf180mcu_fd_sc_mcu9t5v0__and2_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__and2_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__and2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__and2_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__and2_2 layout**
diff --git a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_2.schematic.png b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_2.schematic.png
deleted file mode 100644
index ac709871..00000000
Binary files a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_2.schematic.png and /dev/null differ
diff --git a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_4.rst b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_4.rst
index efd18ed8..62dcf47d 100644
--- a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_4.rst
+++ b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__and2_4
 
 **gf180mcu_fd_sc_mcu9t5v0__and2_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__and2_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__and2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__and2_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__and2_4 layout**
diff --git a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_4.schematic.png b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_4.schematic.png
deleted file mode 100644
index ac709871..00000000
Binary files a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_4.schematic.png and /dev/null differ
diff --git a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3.schematic.svg b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3.schematic.svg
new file mode 100644
index 00000000..41a248ed
--- /dev/null
+++ b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="249" height="129"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(77,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and3.v:22$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and3.v:22$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(142,34.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and3.v:22$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and3.v:22$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(77,97)" s:width="30" s:height="20" id="cell_A3"><text x="15" y="-4" class="nodelabel cell_A3" s:attribute="ref">A3</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A3"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(207,37)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="52" y1="97" y2="97" class="net_4 width_1" style="stroke-width: 1"/><line x1="52" x2="52" y1="97" y2="47" class="net_4 width_1" style="stroke-width: 1"/><line x1="52" x2="77" y1="47" y2="47" class="net_4 width_1" style="stroke-width: 1"/><line x1="107" x2="142" y1="39.5" y2="39.5" class="net_6 width_1" style="stroke-width: 1"/><line x1="107" x2="117" y1="107" y2="107" class="net_3 width_1" style="stroke-width: 1"/><line x1="117" x2="117" y1="107" y2="54.5" class="net_3 width_1" style="stroke-width: 1"/><line x1="117" x2="142" y1="54.5" y2="54.5" class="net_3 width_1" style="stroke-width: 1"/><line x1="172" x2="207" y1="47" y2="47" class="net_5 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_1.rst b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_1.rst
index 71a2062a..c242da23 100644
--- a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_1.rst
+++ b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__and3_1
 
 **gf180mcu_fd_sc_mcu9t5v0__and3_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__and3_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__and3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__and3_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__and3_1 layout**
diff --git a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_1.schematic.png b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_1.schematic.png
deleted file mode 100644
index 53b37c66..00000000
Binary files a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_1.schematic.png and /dev/null differ
diff --git a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_2.rst b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_2.rst
index f47fd565..7ac1ffb6 100644
--- a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_2.rst
+++ b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__and3_2
 
 **gf180mcu_fd_sc_mcu9t5v0__and3_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__and3_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__and3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__and3_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__and3_2 layout**
diff --git a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_2.schematic.png b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_2.schematic.png
deleted file mode 100644
index 53b37c66..00000000
Binary files a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_2.schematic.png and /dev/null differ
diff --git a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_4.rst b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_4.rst
index 2d840b97..c36721ec 100644
--- a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_4.rst
+++ b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__and3_4
 
 **gf180mcu_fd_sc_mcu9t5v0__and3_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__and3_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__and3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__and3_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__and3_4 layout**
diff --git a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_4.schematic.png b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_4.schematic.png
deleted file mode 100644
index 53b37c66..00000000
Binary files a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_4.schematic.png and /dev/null differ
diff --git a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4.schematic.svg b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4.schematic.svg
new file mode 100644
index 00000000..4ea7f58e
--- /dev/null
+++ b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="314" height="136.5"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(77,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and4.v:22$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and4.v:22$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(142,34.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and4.v:22$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and4.v:22$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(207,42)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and4.v:22$3"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and4.v:22$3"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(77,97)" s:width="30" s:height="20" id="cell_A3"><text x="15" y="-4" class="nodelabel cell_A3" s:attribute="ref">A3</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A3"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(142,104.5)" s:width="30" s:height="20" id="cell_A4"><text x="15" y="-4" class="nodelabel cell_A4" s:attribute="ref">A4</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A4"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(272,44.5)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="52" y1="97" y2="97" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="52" y1="97" y2="47" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="77" y1="47" y2="47" class="net_3 width_1" style="stroke-width: 1"/><line x1="107" x2="142" y1="39.5" y2="39.5" class="net_7 width_1" style="stroke-width: 1"/><line x1="107" x2="117" y1="107" y2="107" class="net_4 width_1" style="stroke-width: 1"/><line x1="117" x2="117" y1="107" y2="54.5" class="net_4 width_1" style="stroke-width: 1"/><line x1="117" x2="142" y1="54.5" y2="54.5" class="net_4 width_1" style="stroke-width: 1"/><line x1="172" x2="207" y1="47" y2="47" class="net_8 width_1" style="stroke-width: 1"/><line x1="172" x2="182" y1="114.5" y2="114.5" class="net_5 width_1" style="stroke-width: 1"/><line x1="182" x2="182" y1="114.5" y2="62" class="net_5 width_1" style="stroke-width: 1"/><line x1="182" x2="207" y1="62" y2="62" class="net_5 width_1" style="stroke-width: 1"/><line x1="237" x2="272" y1="54.5" y2="54.5" class="net_6 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_1.rst b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_1.rst
index e81e574b..00d62ca7 100644
--- a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_1.rst
+++ b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__and4_1
 
 **gf180mcu_fd_sc_mcu9t5v0__and4_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__and4_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__and4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__and4_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__and4_1 layout**
diff --git a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_1.schematic.png b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_1.schematic.png
deleted file mode 100644
index d29a8b18..00000000
Binary files a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_1.schematic.png and /dev/null differ
diff --git a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_2.rst b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_2.rst
index 4138a366..c6170fbc 100644
--- a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_2.rst
+++ b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__and4_2
 
 **gf180mcu_fd_sc_mcu9t5v0__and4_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__and4_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__and4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__and4_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__and4_2 layout**
diff --git a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_2.schematic.png b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_2.schematic.png
deleted file mode 100644
index d29a8b18..00000000
Binary files a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_2.schematic.png and /dev/null differ
diff --git a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_4.rst b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_4.rst
index 37326a3f..de66d708 100644
--- a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_4.rst
+++ b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__and4_4
 
 **gf180mcu_fd_sc_mcu9t5v0__and4_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__and4_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__and4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__and4_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__and4_4 layout**
diff --git a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_4.schematic.png b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_4.schematic.png
deleted file mode 100644
index d29a8b18..00000000
Binary files a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_4.schematic.png and /dev/null differ
diff --git a/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.rst b/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.rst
index 633fe4b9..164db0f1 100644
--- a/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.rst
+++ b/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__antenna
 
 **gf180mcu_fd_sc_mcu9t5v0__antenna schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__antenna.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__antenna.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__antenna schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__antenna layout**
diff --git a/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.schematic.png b/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.schematic.png
deleted file mode 100644
index 9a5f56cc..00000000
Binary files a/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.schematic.png and /dev/null differ
diff --git a/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.schematic.svg b/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.schematic.svg
new file mode 100644
index 00000000..4bb6a24e
--- /dev/null
+++ b/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="54" height="54"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g></svg>
\ No newline at end of file
diff --git a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21.schematic.svg b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21.schematic.svg
new file mode 100644
index 00000000..f8d28365
--- /dev/null
+++ b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="315" height="194"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:32$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:32$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(143,87)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:40$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:40$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,97)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:0$5"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:0$5"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,162)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:0$6"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path 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\ No newline at end of file
diff --git a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_1.rst b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_1.rst
index 954ae279..10727db5 100644
--- a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_1.rst
+++ b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__aoi21_1
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi21_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi21_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi21.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi21_1 layout**
diff --git a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_1.schematic.png b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_1.schematic.png
deleted file mode 100644
index da351dfd..00000000
Binary files a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_1.schematic.png and /dev/null differ
diff --git a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_2.rst b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_2.rst
index 0f7a61fb..5f63d1b0 100644
--- a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_2.rst
+++ b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__aoi21_2
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi21_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi21_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi21.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi21_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi21_2 layout**
diff --git a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_2.schematic.png b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_2.schematic.png
deleted file mode 100644
index da351dfd..00000000
Binary files a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_2.schematic.png and /dev/null differ
diff --git a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_4.rst b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_4.rst
index 551a84c8..86f77382 100644
--- a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_4.rst
+++ b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__aoi21_4
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi21_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi21_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi21.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi21_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi21_4 layout**
diff --git a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_4.schematic.png b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_4.schematic.png
deleted file mode 100644
index da351dfd..00000000
Binary files a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_4.schematic.png and /dev/null differ
diff --git a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211.schematic.svg b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211.schematic.svg
new file mode 100644
index 00000000..8984fd4e
--- /dev/null
+++ b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="381" height="249"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143.66666666666666,77)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi211.v:36$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi211.v:36$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(209,84.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi211.v:36$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi211.v:36$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(143.66666666666666,157)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi211.v:44$3"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi211.v:44$3"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(209,207)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi211.v:44$4"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi211.v:44$4"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi211.v:0$6"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path 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\ No newline at end of file
diff --git a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_1.rst b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_1.rst
index 38255685..552a9741 100644
--- a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_1.rst
+++ b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__aoi211_1
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi211_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi211_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi211.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi211_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi211_1 layout**
diff --git a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_1.schematic.png b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_1.schematic.png
deleted file mode 100644
index e14de5c2..00000000
Binary files a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_1.schematic.png and /dev/null differ
diff --git a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_2.rst b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_2.rst
index d79ceb97..7be518f4 100644
--- a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_2.rst
+++ b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__aoi211_2
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi211_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi211_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi211.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi211_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi211_2 layout**
diff --git a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_2.schematic.png b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_2.schematic.png
deleted file mode 100644
index e14de5c2..00000000
Binary files a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_2.schematic.png and /dev/null differ
diff --git a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_4.rst b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_4.rst
index 4435a5de..306b1bb0 100644
--- a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_4.rst
+++ b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__aoi211_4
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi211_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi211_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi211.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi211_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi211_4 layout**
diff --git a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_4.schematic.png b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_4.schematic.png
deleted file mode 100644
index e14de5c2..00000000
Binary files a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_4.schematic.png and /dev/null differ
diff --git a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22.schematic.svg b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22.schematic.svg
new file mode 100644
index 00000000..48316a5a
--- /dev/null
+++ b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="451" height="260"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(148.66666666666666,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi22.v:32$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi22.v:32$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(148.66666666666666,142)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi22.v:40$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi22.v:40$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(214,157)" s:width="30" s:height="25" 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diff --git a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_1.rst b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_1.rst
index f25c82a2..7b340484 100644
--- a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_1.rst
+++ b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__aoi22_1
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi22_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi22_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi22.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi22_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi22_1 layout**
diff --git a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_1.schematic.png b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_1.schematic.png
deleted file mode 100644
index 29a9b3b8..00000000
Binary files a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_1.schematic.png and /dev/null differ
diff --git a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_2.rst b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_2.rst
index 4adceccf..8f96522e 100644
--- a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_2.rst
+++ b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__aoi22_2
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi22_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi22_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi22.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi22_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi22_2 layout**
diff --git a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_2.schematic.png b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_2.schematic.png
deleted file mode 100644
index 29a9b3b8..00000000
Binary files a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_2.schematic.png and /dev/null differ
diff --git a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_4.rst b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_4.rst
index 59e4cf6a..4c47dcf1 100644
--- a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_4.rst
+++ b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__aoi22_4
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi22_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi22_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi22.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi22_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi22_4 layout**
diff --git a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_4.schematic.png b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_4.schematic.png
deleted file mode 100644
index 29a9b3b8..00000000
Binary files a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_4.schematic.png and /dev/null differ
diff --git a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221.schematic.svg b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221.schematic.svg
new file mode 100644
index 00000000..82fb1f51
--- /dev/null
+++ b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221.schematic.svg
@@ -0,0 +1,23 @@
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+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
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+  fill:#000;
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id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi221.v:0$15"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi221.v:0$15"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi221.v:0$15"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(159,269.5)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi221.v:0$16"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi221.v:0$16"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi221.v:0$16"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="or" transform="translate(354,197)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__aoi221.v:58$10"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__aoi221.v:58$10"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="or" transform="translate(419,312)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__aoi221.v:58$11"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__aoi221.v:58$11"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="or" transform="translate(289,72)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__aoi221.v:58$9"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__aoi221.v:58$9"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,289.5)" s:width="30" s:height="20" id="cell_B2"><text x="15" y="-4" class="nodelabel cell_B2" s:attribute="ref">B2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_B2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,149.5)" s:width="30" s:height="20" id="cell_B1"><text x="15" y="-4" class="nodelabel cell_B1" s:attribute="ref">B1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_B1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(78,214.5)" s:width="30" s:height="20" id="cell_C"><text x="15" y="-4" class="nodelabel cell_C" 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diff --git a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_1.rst b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_1.rst
index aac9c129..f9cea4e4 100644
--- a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_1.rst
+++ b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__aoi221_1
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi221_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi221_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi221.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi221_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi221_1 layout**
diff --git a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_1.schematic.png b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_1.schematic.png
deleted file mode 100644
index c1e6eaa9..00000000
Binary files a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_1.schematic.png and /dev/null differ
diff --git a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_2.rst b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_2.rst
index 5382c47b..4997469e 100644
--- a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_2.rst
+++ b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__aoi221_2
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi221_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi221_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi221.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi221_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi221_2 layout**
diff --git a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_2.schematic.png b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_2.schematic.png
deleted file mode 100644
index c1e6eaa9..00000000
Binary files a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_2.schematic.png and /dev/null differ
diff --git a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_4.rst b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_4.rst
index 4a7080e8..e4c22d38 100644
--- a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_4.rst
+++ b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__aoi221_4
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi221_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi221_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi221.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi221_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi221_4 layout**
diff --git a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_4.schematic.png b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_4.schematic.png
deleted file mode 100644
index c1e6eaa9..00000000
Binary files a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_4.schematic.png and /dev/null differ
diff --git a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222.schematic.svg b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222.schematic.svg
new file mode 100644
index 00000000..0120f838
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diff --git a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_1.rst b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_1.rst
index 75082a3f..574ee21c 100644
--- a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_1.rst
+++ b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__aoi222_1
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi222_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi222_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi222.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi222_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi222_1 layout**
diff --git a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_1.schematic.png b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_1.schematic.png
deleted file mode 100644
index 5c3c1e16..00000000
Binary files a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_1.schematic.png and /dev/null differ
diff --git a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_2.rst b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_2.rst
index a9a3cd25..e5b66bea 100644
--- a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_2.rst
+++ b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__aoi222_2
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi222_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi222_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi222.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi222_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi222_2 layout**
diff --git a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_2.schematic.png b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_2.schematic.png
deleted file mode 100644
index 5c3c1e16..00000000
Binary files a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_2.schematic.png and /dev/null differ
diff --git a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_4.rst b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_4.rst
index 77302f6e..b2cbe805 100644
--- a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_4.rst
+++ b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__aoi222_4
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi222_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi222_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi222.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi222_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi222_4 layout**
diff --git a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_4.schematic.png b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_4.schematic.png
deleted file mode 100644
index 5c3c1e16..00000000
Binary files a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_4.schematic.png and /dev/null differ
diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
new file mode 100644
index 00000000..72e18add
--- /dev/null
+++ b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
@@ -0,0 +1,23 @@
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+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(77,22)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_1.rst b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_1.rst
index 2e0fd1b9..fd695a6f 100644
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_1.rst
+++ b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__buf_1
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__buf_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__buf_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_1 layout**
diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_1.schematic.png b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_1.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_1.schematic.png and /dev/null differ
diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_12.rst b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_12.rst
index 2818d9c3..54ee5894 100644
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_12.rst
+++ b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_12.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__buf_x12
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_x12 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__buf_12.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__buf_x12 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_x12 layout**
diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_12.schematic.png b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_12.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_12.schematic.png and /dev/null differ
diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_16.rst b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_16.rst
index 1a6fd550..102bda50 100644
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_16.rst
+++ b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_16.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__buf_x16
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_x16 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__buf_16.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__buf_x16 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_x16 layout**
diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_16.schematic.png b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_16.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_16.schematic.png and /dev/null differ
diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_2.rst b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_2.rst
index c2ed5087..46578515 100644
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_2.rst
+++ b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__buf_2
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__buf_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__buf_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_2 layout**
diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_2.schematic.png b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_2.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_2.schematic.png and /dev/null differ
diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_20.rst b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_20.rst
index b5596e67..49acc772 100644
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_20.rst
+++ b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_20.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__buf_x20
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_x20 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__buf_20.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__buf_x20 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_x20 layout**
diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_20.schematic.png b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_20.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_20.schematic.png and /dev/null differ
diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_3.rst b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_3.rst
index 024b296a..aab2365b 100644
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_3.rst
+++ b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_3.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__buf_3
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_3 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__buf_3.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__buf_3 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_3 layout**
diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_3.schematic.png b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_3.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_3.schematic.png and /dev/null differ
diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_4.rst b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_4.rst
index af8b3ee4..4b7b30ad 100644
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_4.rst
+++ b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__buf_4
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__buf_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__buf_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_4 layout**
diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_4.schematic.png b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_4.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_4.schematic.png and /dev/null differ
diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_8.rst b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_8.rst
index 034996b3..75edb455 100644
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_8.rst
+++ b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_8.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__buf_8
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_8 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__buf_8.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__buf_8 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_8 layout**
diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_8.schematic.png b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_8.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_8.schematic.png and /dev/null differ
diff --git a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg
new file mode 100644
index 00000000..98abdd89
--- /dev/null
+++ b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="239" height="121.5"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(77,29.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__bufz.v:26$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__bufz.v:26$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="mux" transform="translate(142,12)" s:width="20" s:height="40" id="cell_$ternary$gf180mcu_fd_sc_mcu9t5v0__bufz.v:0$2"><s:alias val="$pmux"/><s:alias val="$mux"/><s:alias val="$_MUX_"/><path d="M0,0 L20,10 L20,30 L0,40 Z" class="cell_$ternary$gf180mcu_fd_sc_mcu9t5v0__bufz.v:0$2"/><text x="5" y="32" class="nodelabel cell_$ternary$gf180mcu_fd_sc_mcu9t5v0__bufz.v:0$2" s:attribute="">1</text><text x="5" y="13" class="nodelabel cell_$ternary$gf180mcu_fd_sc_mcu9t5v0__bufz.v:0$2" s:attribute="">0</text><g s:x="0" s:y="10" s:pid="A"/><g s:x="0" s:y="30" s:pid="B"/><g s:x="10" s:y="35" s:pid="S"/><g s:x="20" s:y="20" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,24.5)" s:width="30" s:height="20" id="cell_EN"><text x="15" y="-4" class="nodelabel cell_EN" s:attribute="ref">EN</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_EN"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,89.5)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(197,22)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="34.5" y2="34.5" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="62" y1="34.5" y2="34.5" class="net_2 width_1" style="stroke-width: 1"/><line x1="62" x2="62" y1="34.5" y2="64.5" class="net_2 width_1" style="stroke-width: 1"/><line x1="62" x2="152" y1="64.5" y2="64.5" class="net_2 width_1" style="stroke-width: 1"/><circle cx="62" cy="34.5" r="2" style="fill:#000" class="net_2 width_1"/><line x1="152" x2="152" y1="64.5" y2="47" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="52" y1="99.5" y2="99.5" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="52" y1="99.5" y2="49.5" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="77" y1="49.5" y2="49.5" class="net_3 width_1" style="stroke-width: 1"/><line x1="107" x2="142" y1="42" y2="42" class="net_5 width_1" style="stroke-width: 1"/><line x1="162" x2="197" y1="32" y2="32" class="net_4 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_1.rst b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_1.rst
index d1db40b0..10d824ad 100644
--- a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_1.rst
+++ b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__bufz_1
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__bufz_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_1 layout**
diff --git a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_12.rst b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_12.rst
index 6fd61b19..07893e13 100644
--- a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_12.rst
+++ b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_12.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__bufz_x12
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_x12 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz_12.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__bufz_x12 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_x12 layout**
diff --git a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_16.rst b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_16.rst
index 60d442c3..1a3d67eb 100644
--- a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_16.rst
+++ b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_16.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__bufz_x16
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_x16 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz_16.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__bufz_x16 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_x16 layout**
diff --git a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_2.rst b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_2.rst
index ad09ef7a..3678492a 100644
--- a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_2.rst
+++ b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__bufz_2
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__bufz_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_2 layout**
diff --git a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_3.rst b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_3.rst
index 32a92788..62bc79bb 100644
--- a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_3.rst
+++ b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_3.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__bufz_3
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_3 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz_3.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__bufz_3 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_3 layout**
diff --git a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_4.rst b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_4.rst
index 501da608..1b419dcb 100644
--- a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_4.rst
+++ b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__bufz_4
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__bufz_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_4 layout**
diff --git a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_8.rst b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_8.rst
index 137297c1..af32f4bb 100644
--- a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_8.rst
+++ b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_8.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__bufz_8
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_8 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz_8.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__bufz_8 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_8 layout**
diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
new file mode 100644
index 00000000..72e18add
--- /dev/null
+++ b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="119" height="54"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(77,22)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_1.rst b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_1.rst
index 8e5c9a4d..8b1de5ed 100644
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_1.rst
+++ b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__clkbuf_1
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkbuf_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_1 layout**
diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_1.schematic.png b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_1.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_1.schematic.png and /dev/null differ
diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_12.rst b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_12.rst
index 578d2318..cefc2dca 100644
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_12.rst
+++ b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_12.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__clkbuf_x12
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_x12 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf_12.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkbuf_x12 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_x12 layout**
diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_12.schematic.png b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_12.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_12.schematic.png and /dev/null differ
diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.rst b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.rst
index f288c2b5..bc597be4 100644
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.rst
+++ b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__clkbuf_x16
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_x16 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkbuf_x16 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_x16 layout**
diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.schematic.png b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.schematic.png and /dev/null differ
diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_2.rst b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_2.rst
index 1c30a860..230660bd 100644
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_2.rst
+++ b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__clkbuf_2
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkbuf_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_2 layout**
diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_2.schematic.png b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_2.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_2.schematic.png and /dev/null differ
diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_20.rst b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_20.rst
index 529bbc88..03cdbf3c 100644
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_20.rst
+++ b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_20.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__clkbuf_x20
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_x20 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf_20.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkbuf_x20 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_x20 layout**
diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_20.schematic.png b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_20.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_20.schematic.png and /dev/null differ
diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.rst b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.rst
index 86f6eedf..2a78b78d 100644
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.rst
+++ b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__clkbuf_3
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_3 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkbuf_3 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_3 layout**
diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.schematic.png b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.schematic.png and /dev/null differ
diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.rst b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.rst
index 7a9ddd50..2bf71173 100644
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.rst
+++ b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__clkbuf_4
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkbuf_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_4 layout**
diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.schematic.png b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.schematic.png and /dev/null differ
diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.rst b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.rst
index 29aebe33..a0c7233a 100644
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.rst
+++ b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__clkbuf_8
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_8 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkbuf_8 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_8 layout**
diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.schematic.png b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.schematic.png and /dev/null differ
diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
new file mode 100644
index 00000000..0a992b71
--- /dev/null
+++ b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="185" height="54"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__clkinv.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__clkinv.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__clkinv.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(143,22)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="105" x2="143" y1="32" y2="32" class="net_3 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_1.rst b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_1.rst
index 70c5e0ab..71387cb2 100644
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_1.rst
+++ b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__clkinv_1
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkinv_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_1 layout**
diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_1.schematic.png b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_1.schematic.png
deleted file mode 100644
index 68f2c8b5..00000000
Binary files a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_1.schematic.png and /dev/null differ
diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_12.rst b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_12.rst
index 3cb8e602..20bb70d6 100644
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_12.rst
+++ b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_12.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__clkinv_x12
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_x12 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv_12.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkinv_x12 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_x12 layout**
diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_12.schematic.png b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_12.schematic.png
deleted file mode 100644
index 68f2c8b5..00000000
Binary files a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_12.schematic.png and /dev/null differ
diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_16.rst b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_16.rst
index 8d96eed9..b179cfa3 100644
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_16.rst
+++ b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_16.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__clkinv_x16
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_x16 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv_16.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkinv_x16 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_x16 layout**
diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_16.schematic.png b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_16.schematic.png
deleted file mode 100644
index 68f2c8b5..00000000
Binary files a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_16.schematic.png and /dev/null differ
diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_2.rst b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_2.rst
index 3122165c..b8ee6d34 100644
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_2.rst
+++ b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__clkinv_2
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkinv_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_2 layout**
diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_2.schematic.png b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_2.schematic.png
deleted file mode 100644
index 68f2c8b5..00000000
Binary files a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_2.schematic.png and /dev/null differ
diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_20.rst b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_20.rst
index 6501e6a3..9d0485fb 100644
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_20.rst
+++ b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_20.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__clkinv_x20
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_x20 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv_20.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkinv_x20 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_x20 layout**
diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_20.schematic.png b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_20.schematic.png
deleted file mode 100644
index 68f2c8b5..00000000
Binary files a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_20.schematic.png and /dev/null differ
diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_3.rst b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_3.rst
index 12504393..1e6d3216 100644
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_3.rst
+++ b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_3.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__clkinv_3
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_3 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv_3.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkinv_3 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_3 layout**
diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_3.schematic.png b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_3.schematic.png
deleted file mode 100644
index 68f2c8b5..00000000
Binary files a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_3.schematic.png and /dev/null differ
diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_4.rst b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_4.rst
index a4e73b6c..21711767 100644
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_4.rst
+++ b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__clkinv_4
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkinv_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_4 layout**
diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_4.schematic.png b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_4.schematic.png
deleted file mode 100644
index 68f2c8b5..00000000
Binary files a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_4.schematic.png and /dev/null differ
diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_8.rst b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_8.rst
index cd04831e..a7b831dc 100644
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_8.rst
+++ b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_8.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__clkinv_8
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_8 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv_8.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkinv_8 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_8 layout**
diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_8.schematic.png b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_8.schematic.png
deleted file mode 100644
index 68f2c8b5..00000000
Binary files a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_8.schematic.png and /dev/null differ
diff --git a/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq.schematic.svg b/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq.schematic.svg
new file mode 100644
index 00000000..5a10979e
--- /dev/null
+++ b/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="359" height="239"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
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\ No newline at end of file
diff --git a/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_1.rst b/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_1.rst
index ba5c8a0e..b3b10b45 100644
--- a/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_1.rst
+++ b/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffnq_1
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnq_1 layout**
diff --git a/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_2.rst b/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_2.rst
index f7595f13..df89f6b6 100644
--- a/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_2.rst
+++ b/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffnq_2
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnq_2 layout**
diff --git a/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_4.rst b/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_4.rst
index 4049b0b8..957db2be 100644
--- a/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_4.rst
+++ b/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffnq_4
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnq_4 layout**
diff --git a/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq.schematic.svg b/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq.schematic.svg
new file mode 100644
index 00000000..a7741756
--- /dev/null
+++ b/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq.schematic.svg
@@ -0,0 +1,23 @@
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+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
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+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
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\ No newline at end of file
diff --git a/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1.rst b/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1.rst
index 98d25f88..376be505 100644
--- a/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1.rst
+++ b/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1 layout**
diff --git a/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2.rst b/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2.rst
index ed4907c7..bf68228a 100644
--- a/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2.rst
+++ b/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2 layout**
diff --git a/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4.rst b/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4.rst
index c943121c..7ec119c9 100644
--- a/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4.rst
+++ b/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4 layout**
diff --git a/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.schematic.svg b/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.schematic.svg
new file mode 100644
index 00000000..3cc56b11
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diff --git a/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1.rst b/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1.rst
index 8ba68d33..06a3d86b 100644
--- a/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1.rst
+++ b/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1 layout**
diff --git a/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2.rst b/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2.rst
index 0ca3d990..6c99f972 100644
--- a/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2.rst
+++ b/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2 layout**
diff --git a/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4.rst b/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4.rst
index 7606ecfc..79719292 100644
--- a/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4.rst
+++ b/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4 layout**
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new file mode 100644
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diff --git a/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1.rst b/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1.rst
index 4d47b452..eab3856c 100644
--- a/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1.rst
+++ b/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1 layout**
diff --git a/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2.rst b/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2.rst
index 80e59977..02ab3901 100644
--- a/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2.rst
+++ b/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2 layout**
diff --git a/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4.rst b/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4.rst
index fd732c07..a832ebb9 100644
--- a/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4.rst
+++ b/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4 layout**
diff --git a/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq.schematic.svg b/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq.schematic.svg
new file mode 100644
index 00000000..61a853fa
--- /dev/null
+++ b/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="354" height="239"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(86,142)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffq.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffq.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffq.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(247,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffq.v:0$2"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffq.v:0$2"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffq.v:0$2"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="generic" transform="translate(173,86.5)" s:width="30" s:height="40" id="cell_x0"><text x="15" y="-4" class="nodelabel cell_x0" s:attribute="ref">udp_gf180mcu_fd_sc_mcu9t5v0_tt_25c_1v80_verilog_mgm_n_iq_ff_udp</text><rect width="30" height="100" s:generic="body" class="cell_x0"/><g transform="translate(0,10)" s:x="0" s:y="10" s:pid="in0" id="port_x0~C"><text x="-3" y="-4" class="inputPortLabel cell_x0">C</text></g><g transform="translate(0,30)" s:x="0" s:y="10" s:pid="in0" id="port_x0~CK"><text x="-3" y="-4" class="inputPortLabel cell_x0">CK</text></g><g transform="translate(0,50)" s:x="0" s:y="10" s:pid="in0" id="port_x0~D"><text x="-3" y="-4" class="inputPortLabel cell_x0">D</text></g><g transform="translate(0,70)" s:x="0" s:y="10" s:pid="in0" id="port_x0~N"><text x="-3" y="-4" class="inputPortLabel cell_x0">N</text></g><g transform="translate(0,90)" s:x="0" s:y="10" s:pid="in0" id="port_x0~P"><text x="-3" y="-4" class="inputPortLabel cell_x0">P</text></g><g transform="translate(30,10)" s:x="30" s:y="10" s:pid="out0" id="port_x0~Q"><text x="5" y="-4" style="fill:#000; stroke:none" class="cell_x0">Q</text></g></g><g s:type="inputExt" transform="translate(77,22)" s:width="30" s:height="20" id="cell_CLK"><text x="15" y="-4" class="nodelabel cell_CLK" s:attribute="ref">CLK</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_CLK"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,142)" s:width="30" s:height="20" id="cell_D"><text x="15" y="-4" class="nodelabel cell_D" s:attribute="ref">D</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_D"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(312,87)" s:width="30" s:height="20" id="cell_Q"><text x="15" y="-4" class="nodelabel cell_Q" s:attribute="ref">Q</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Q"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(77,207)" s:width="30" s:height="20" id="cell_notifier"><text x="15" y="-4" class="nodelabel cell_notifier" s:attribute="ref">notifier</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_notifier"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="constant" transform="translate(77,87)" s:width="30" s:height="20" id="cell_0"><text x="15" y="-4" class="nodelabel cell_0" s:attribute="ref">0</text><s:alias val="$_constant_"/><rect width="30" height="20" class="cell_0"/><g s:x="31" s:y="10" s:pid="Y"/></g><line x1="42" x2="85" y1="152" y2="152" class="net_3 width_1" style="stroke-width: 1"/><line x1="204" x2="246" y1="97" y2="97" class="net_7 width_1" style="stroke-width: 1"/><line x1="108" x2="173" y1="97" y2="97" class="net_8 width_1" style="stroke-width: 1"/><line x1="108" x2="135" y1="97" y2="97" class="net_8 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="97" y2="177" class="net_8 width_1" style="stroke-width: 1"/><circle cx="135" cy="97" r="2" style="fill:#000" class="net_8 width_1"/><line x1="135" x2="173" y1="177" y2="177" class="net_8 width_1" style="stroke-width: 1"/><line x1="107" x2="145" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="32" y2="117" class="net_2 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="117" y2="117" class="net_2 width_1" style="stroke-width: 1"/><line x1="113" x2="145" y1="152" y2="152" class="net_6 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="152" y2="137" class="net_6 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="137" y2="137" class="net_6 width_1" style="stroke-width: 1"/><line x1="107" x2="145" y1="217" y2="217" class="net_5 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="217" y2="157" class="net_5 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="157" y2="157" class="net_5 width_1" style="stroke-width: 1"/><line x1="274" x2="312" y1="97" y2="97" class="net_4 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_1.rst b/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_1.rst
index 49f3ed1a..a266b822 100644
--- a/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_1.rst
+++ b/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffq_1
 
 **gf180mcu_fd_sc_mcu9t5v0__dffq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffq_1 layout**
diff --git a/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_2.rst b/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_2.rst
index a09e429e..d9f30b5c 100644
--- a/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_2.rst
+++ b/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffq_2
 
 **gf180mcu_fd_sc_mcu9t5v0__dffq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffq_2 layout**
diff --git a/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_4.rst b/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_4.rst
index d7ea726d..6cccd678 100644
--- a/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_4.rst
+++ b/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffq_4
 
 **gf180mcu_fd_sc_mcu9t5v0__dffq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffq_4 layout**
diff --git a/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq.schematic.svg b/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq.schematic.svg
new file mode 100644
index 00000000..3c4ee07c
--- /dev/null
+++ b/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="354" height="294"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(86,262)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrnq.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrnq.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrnq.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(86,142)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrnq.v:0$2"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrnq.v:0$2"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrnq.v:0$2"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(247,102)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrnq.v:0$3"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrnq.v:0$3"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrnq.v:0$3"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="generic" transform="translate(173,101.5)" s:width="30" s:height="40" id="cell_x0"><text x="15" y="-4" class="nodelabel cell_x0" s:attribute="ref">udp_gf180mcu_fd_sc_mcu9t5v0_tt_25c_1v80_verilog_mgm_n_iq_ff_udp</text><rect width="30" height="100" s:generic="body" class="cell_x0"/><g transform="translate(0,10)" s:x="0" s:y="10" s:pid="in0" id="port_x0~C"><text x="-3" y="-4" class="inputPortLabel cell_x0">C</text></g><g transform="translate(0,30)" s:x="0" s:y="10" s:pid="in0" id="port_x0~CK"><text x="-3" y="-4" class="inputPortLabel cell_x0">CK</text></g><g transform="translate(0,50)" s:x="0" s:y="10" s:pid="in0" id="port_x0~D"><text x="-3" y="-4" class="inputPortLabel cell_x0">D</text></g><g transform="translate(0,70)" s:x="0" s:y="10" s:pid="in0" id="port_x0~N"><text x="-3" y="-4" class="inputPortLabel cell_x0">N</text></g><g transform="translate(0,90)" s:x="0" s:y="10" s:pid="in0" id="port_x0~P"><text x="-3" y="-4" class="inputPortLabel cell_x0">P</text></g><g transform="translate(30,10)" s:x="30" s:y="10" s:pid="out0" id="port_x0~Q"><text x="5" y="-4" style="fill:#000; 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\ No newline at end of file
diff --git a/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_1.rst b/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_1.rst
index 5bd67ac7..25ba1f81 100644
--- a/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_1.rst
+++ b/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffrnq_1
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffrnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrnq_1 layout**
diff --git a/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_2.rst b/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_2.rst
index 2a92bff0..d446f286 100644
--- a/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_2.rst
+++ b/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffrnq_2
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffrnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrnq_2 layout**
diff --git a/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_4.rst b/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_4.rst
index 50d70845..bd7b3eac 100644
--- a/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_4.rst
+++ b/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffrnq_4
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffrnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrnq_4 layout**
diff --git a/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq.schematic.svg b/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq.schematic.svg
new file mode 100644
index 00000000..99819292
--- /dev/null
+++ b/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="354" height="294"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
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+  text-anchor: end;
+}
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\ No newline at end of file
diff --git a/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1.rst b/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1.rst
index 975102a5..56f96330 100644
--- a/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1.rst
+++ b/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1 layout**
diff --git a/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2.rst b/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2.rst
index d0b44e99..dccf9fa7 100644
--- a/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2.rst
+++ b/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2 layout**
diff --git a/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4.rst b/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4.rst
index f1492683..50783ef8 100644
--- a/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4.rst
+++ b/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4 layout**
diff --git a/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq.schematic.svg b/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq.schematic.svg
new file mode 100644
index 00000000..4387dde6
--- /dev/null
+++ b/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq.schematic.svg
@@ -0,0 +1,23 @@
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+  fill:none;
+}
+text {
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+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
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+    stroke-linecap: round;
+}
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\ No newline at end of file
diff --git a/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_1.rst b/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_1.rst
index 1ffe69cd..c991c7a8 100644
--- a/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_1.rst
+++ b/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffsnq_1
 
 **gf180mcu_fd_sc_mcu9t5v0__dffsnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffsnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffsnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffsnq_1 layout**
diff --git a/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_2.rst b/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_2.rst
index 8f5ab306..ba5371d3 100644
--- a/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_2.rst
+++ b/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffsnq_2
 
 **gf180mcu_fd_sc_mcu9t5v0__dffsnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffsnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffsnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffsnq_2 layout**
diff --git a/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_4.rst b/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_4.rst
index 3fcb003a..4f9fdd5e 100644
--- a/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_4.rst
+++ b/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dffsnq_4
 
 **gf180mcu_fd_sc_mcu9t5v0__dffsnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffsnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffsnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffsnq_4 layout**
diff --git a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya.schematic.svg b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya.schematic.svg
new file mode 100644
index 00000000..72e18add
--- /dev/null
+++ b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="119" height="54"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(77,22)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_1.rst b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_1.rst
index 389f5b1e..6c524442 100644
--- a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_1.rst
+++ b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dlya_1
 
 **gf180mcu_fd_sc_mcu9t5v0__dlya_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlya_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlya.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlya_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlya_1 layout**
diff --git a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_1.schematic.png b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_1.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_1.schematic.png and /dev/null differ
diff --git a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_2.rst b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_2.rst
index b688f819..a6ea4048 100644
--- a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_2.rst
+++ b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dlya_2
 
 **gf180mcu_fd_sc_mcu9t5v0__dlya_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlya_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlya.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlya_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlya_2 layout**
diff --git a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_2.schematic.png b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_2.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_2.schematic.png and /dev/null differ
diff --git a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_4.rst b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_4.rst
index 31f69cfb..3f8dff1f 100644
--- a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_4.rst
+++ b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dlya_4
 
 **gf180mcu_fd_sc_mcu9t5v0__dlya_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlya_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlya.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlya_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlya_4 layout**
diff --git a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_4.schematic.png b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_4.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_4.schematic.png and /dev/null differ
diff --git a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb.schematic.svg b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb.schematic.svg
new file mode 100644
index 00000000..72e18add
--- /dev/null
+++ b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="119" height="54"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(77,22)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_1.rst b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_1.rst
index c4c12f3d..41352d54 100644
--- a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_1.rst
+++ b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dlyb_1
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyb_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyb_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyb.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlyb_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyb_1 layout**
diff --git a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_1.schematic.png b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_1.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_1.schematic.png and /dev/null differ
diff --git a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_2.rst b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_2.rst
index 5675b383..fbddf090 100644
--- a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_2.rst
+++ b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dlyb_2
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyb_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyb_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyb.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlyb_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyb_2 layout**
diff --git a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_2.schematic.png b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_2.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_2.schematic.png and /dev/null differ
diff --git a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_4.rst b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_4.rst
index 66416dd2..24a2d199 100644
--- a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_4.rst
+++ b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dlyb_4
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyb_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyb_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyb.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlyb_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyb_4 layout**
diff --git a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_4.schematic.png b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_4.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_4.schematic.png and /dev/null differ
diff --git a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc.schematic.svg b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc.schematic.svg
new file mode 100644
index 00000000..72e18add
--- /dev/null
+++ b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="119" height="54"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(77,22)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_1.rst b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_1.rst
index 8d57d726..0cdca5b2 100644
--- a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_1.rst
+++ b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dlyc_1
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyc_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyc_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyc.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlyc_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyc_1 layout**
diff --git a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_1.schematic.png b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_1.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_1.schematic.png and /dev/null differ
diff --git a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_2.rst b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_2.rst
index 3ef30d49..3d6f2a3e 100644
--- a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_2.rst
+++ b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dlyc_2
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyc_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyc_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyc.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlyc_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyc_2 layout**
diff --git a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_2.schematic.png b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_2.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_2.schematic.png and /dev/null differ
diff --git a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_4.rst b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_4.rst
index e5253db2..0e1a6049 100644
--- a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_4.rst
+++ b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dlyc_4
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyc_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyc_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyc.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlyc_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyc_4 layout**
diff --git a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_4.schematic.png b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_4.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_4.schematic.png and /dev/null differ
diff --git a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd.schematic.svg b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd.schematic.svg
new file mode 100644
index 00000000..72e18add
--- /dev/null
+++ b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="119" height="54"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(77,22)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_1.rst b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_1.rst
index 64792c53..3ce4dce5 100644
--- a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_1.rst
+++ b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dlyd_1
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyd_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyd_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyd.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlyd_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyd_1 layout**
diff --git a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_1.schematic.png b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_1.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_1.schematic.png and /dev/null differ
diff --git a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_2.rst b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_2.rst
index 035352c2..6be7edbb 100644
--- a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_2.rst
+++ b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dlyd_2
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyd_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyd_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyd.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlyd_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyd_2 layout**
diff --git a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_2.schematic.png b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_2.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_2.schematic.png and /dev/null differ
diff --git a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_4.rst b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_4.rst
index 3fde56d2..1b0808b2 100644
--- a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_4.rst
+++ b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__dlyd_4
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyd_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyd_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyd.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlyd_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyd_4 layout**
diff --git a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_4.schematic.png b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_4.schematic.png
deleted file mode 100644
index fb243ea7..00000000
Binary files a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_4.schematic.png and /dev/null differ
diff --git a/cells/endcap/gf180mcu_fd_sc_mcu9t5v0__endcap.rst b/cells/endcap/gf180mcu_fd_sc_mcu9t5v0__endcap.rst
index c56c911d..ffaa0509 100644
--- a/cells/endcap/gf180mcu_fd_sc_mcu9t5v0__endcap.rst
+++ b/cells/endcap/gf180mcu_fd_sc_mcu9t5v0__endcap.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__endcap
 
 **gf180mcu_fd_sc_mcu9t5v0__endcap schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__endcap.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__endcap.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__endcap schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__endcap layout**
diff --git a/cells/endcap/gf180mcu_fd_sc_mcu9t5v0__endcap.schematic.svg b/cells/endcap/gf180mcu_fd_sc_mcu9t5v0__endcap.schematic.svg
new file mode 100644
index 00000000..f8b5edc2
--- /dev/null
+++ b/cells/endcap/gf180mcu_fd_sc_mcu9t5v0__endcap.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="0" height="0"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style></svg>
\ No newline at end of file
diff --git a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg
new file mode 100644
index 00000000..f8b5edc2
--- /dev/null
+++ b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="0" height="0"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style></svg>
\ No newline at end of file
diff --git a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_1.rst b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_1.rst
index a9ea8130..a051306d 100644
--- a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_1.rst
+++ b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__fill_1
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fill_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fill_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_1 layout**
diff --git a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_16.rst b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_16.rst
index 719213e9..1095da51 100644
--- a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_16.rst
+++ b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_16.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__fill_x16
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_x16 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fill_16.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fill_x16 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_x16 layout**
diff --git a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_2.rst b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_2.rst
index bbefec3d..20841ce9 100644
--- a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_2.rst
+++ b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__fill_2
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fill_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fill_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_2 layout**
diff --git a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_32.rst b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_32.rst
index 0434c30e..59078797 100644
--- a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_32.rst
+++ b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_32.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__fill_x32
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_x32 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fill_32.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fill_x32 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_x32 layout**
diff --git a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_4.rst b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_4.rst
index 6f79d4ad..f26564c1 100644
--- a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_4.rst
+++ b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__fill_4
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fill_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fill_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_4 layout**
diff --git a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_64.rst b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_64.rst
index 501e4f5b..0da891e6 100644
--- a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_64.rst
+++ b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_64.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__fill_x64
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_x64 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fill_64.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fill_x64 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_x64 layout**
diff --git a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_8.rst b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_8.rst
index 063103a7..570977c0 100644
--- a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_8.rst
+++ b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_8.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__fill_8
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_8 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fill_8.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fill_8 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_8 layout**
diff --git a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap.schematic.svg b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap.schematic.svg
new file mode 100644
index 00000000..f8b5edc2
--- /dev/null
+++ b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="0" height="0"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style></svg>
\ No newline at end of file
diff --git a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_16.rst b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_16.rst
index 14819cd2..e327e787 100644
--- a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_16.rst
+++ b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_16.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__fillcap_x16
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_x16 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap_16.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fillcap_x16 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_x16 layout**
diff --git a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_32.rst b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_32.rst
index 964d2a06..9289b31c 100644
--- a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_32.rst
+++ b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_32.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__fillcap_x32
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_x32 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap_32.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fillcap_x32 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_x32 layout**
diff --git a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_4.rst b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_4.rst
index e373f9fc..6f465545 100644
--- a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_4.rst
+++ b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__fillcap_4
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fillcap_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_4 layout**
diff --git a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_64.rst b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_64.rst
index d530e679..2145b25d 100644
--- a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_64.rst
+++ b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_64.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__fillcap_x64
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_x64 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap_64.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fillcap_x64 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_x64 layout**
diff --git a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_8.rst b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_8.rst
index cc92f027..03092d37 100644
--- a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_8.rst
+++ b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_8.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__fillcap_8
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_8 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap_8.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fillcap_8 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_8 layout**
diff --git a/cells/filltie/gf180mcu_fd_sc_mcu9t5v0__filltie.rst b/cells/filltie/gf180mcu_fd_sc_mcu9t5v0__filltie.rst
index 1974b603..89b114f4 100644
--- a/cells/filltie/gf180mcu_fd_sc_mcu9t5v0__filltie.rst
+++ b/cells/filltie/gf180mcu_fd_sc_mcu9t5v0__filltie.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__filltie
 
 **gf180mcu_fd_sc_mcu9t5v0__filltie schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__filltie.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__filltie.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__filltie schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__filltie layout**
diff --git a/cells/filltie/gf180mcu_fd_sc_mcu9t5v0__filltie.schematic.svg b/cells/filltie/gf180mcu_fd_sc_mcu9t5v0__filltie.schematic.svg
new file mode 100644
index 00000000..f8b5edc2
--- /dev/null
+++ b/cells/filltie/gf180mcu_fd_sc_mcu9t5v0__filltie.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="0" height="0"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style></svg>
\ No newline at end of file
diff --git a/cells/hold/gf180mcu_fd_sc_mcu9t5v0__hold.rst b/cells/hold/gf180mcu_fd_sc_mcu9t5v0__hold.rst
index c21cab41..3d5ea896 100644
--- a/cells/hold/gf180mcu_fd_sc_mcu9t5v0__hold.rst
+++ b/cells/hold/gf180mcu_fd_sc_mcu9t5v0__hold.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__hold
 
 **gf180mcu_fd_sc_mcu9t5v0__hold schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__hold.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__hold.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__hold schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__hold layout**
diff --git a/cells/hold/gf180mcu_fd_sc_mcu9t5v0__hold.schematic.svg b/cells/hold/gf180mcu_fd_sc_mcu9t5v0__hold.schematic.svg
new file mode 100644
index 00000000..f8b5edc2
--- /dev/null
+++ b/cells/hold/gf180mcu_fd_sc_mcu9t5v0__hold.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="0" height="0"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style></svg>
\ No newline at end of file
diff --git a/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn.schematic.svg b/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn.schematic.svg
new file mode 100644
index 00000000..ddfb6d77
--- /dev/null
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diff --git a/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_1.rst b/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_1.rst
index 2b9ba199..da680309 100644
--- a/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_1.rst
+++ b/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__icgtn_1
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtn_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtn_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtn.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__icgtn_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtn_1 layout**
diff --git a/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_2.rst b/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_2.rst
index 8bf4e815..5bb0994b 100644
--- a/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_2.rst
+++ b/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__icgtn_2
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtn_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtn_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtn.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__icgtn_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtn_2 layout**
diff --git a/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_4.rst b/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_4.rst
index 50453eba..f11d423e 100644
--- a/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_4.rst
+++ b/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__icgtn_4
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtn_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtn_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtn.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__icgtn_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtn_4 layout**
diff --git a/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp.schematic.svg b/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp.schematic.svg
new file mode 100644
index 00000000..f9891d6a
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\ No newline at end of file
diff --git a/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_1.rst b/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_1.rst
index bc6095dd..3838063e 100644
--- a/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_1.rst
+++ b/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__icgtp_1
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtp_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtp_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtp.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__icgtp_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtp_1 layout**
diff --git a/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_2.rst b/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_2.rst
index ce218c32..00635d64 100644
--- a/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_2.rst
+++ b/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__icgtp_2
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtp_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtp_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtp.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__icgtp_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtp_2 layout**
diff --git a/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_4.rst b/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_4.rst
index 8bc68eda..f6e9ae7d 100644
--- a/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_4.rst
+++ b/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__icgtp_4
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtp_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtp_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtp.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__icgtp_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtp_4 layout**
diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
new file mode 100644
index 00000000..70bdadb2
--- /dev/null
+++ b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="185" height="54"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__inv.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__inv.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__inv.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(143,22)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="105" x2="143" y1="32" y2="32" class="net_3 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_1.rst b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_1.rst
index 16a606ff..f4a9a7d0 100644
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_1.rst
+++ b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__inv_1
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__inv_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__inv_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_1 layout**
diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_1.schematic.png b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_1.schematic.png
deleted file mode 100644
index 68f2c8b5..00000000
Binary files a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_1.schematic.png and /dev/null differ
diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_12.rst b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_12.rst
index a02f34d5..c03f6942 100644
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_12.rst
+++ b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_12.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__inv_x12
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_x12 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__inv_12.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__inv_x12 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_x12 layout**
diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_12.schematic.png b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_12.schematic.png
deleted file mode 100644
index 68f2c8b5..00000000
Binary files a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_12.schematic.png and /dev/null differ
diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_16.rst b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_16.rst
index 955c20f1..2c0b3387 100644
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_16.rst
+++ b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_16.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__inv_x16
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_x16 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__inv_16.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__inv_x16 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_x16 layout**
diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_16.schematic.png b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_16.schematic.png
deleted file mode 100644
index 68f2c8b5..00000000
Binary files a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_16.schematic.png and /dev/null differ
diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_2.rst b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_2.rst
index e0c7b77e..a6fb1464 100644
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_2.rst
+++ b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__inv_2
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__inv_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__inv_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_2 layout**
diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_2.schematic.png b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_2.schematic.png
deleted file mode 100644
index 68f2c8b5..00000000
Binary files a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_2.schematic.png and /dev/null differ
diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_20.rst b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_20.rst
index 423a1b49..86a7fc6d 100644
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_20.rst
+++ b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_20.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__inv_x20
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_x20 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__inv_20.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__inv_x20 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_x20 layout**
diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_20.schematic.png b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_20.schematic.png
deleted file mode 100644
index 68f2c8b5..00000000
Binary files a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_20.schematic.png and /dev/null differ
diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_3.rst b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_3.rst
index 86efd7c8..5be5f073 100644
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_3.rst
+++ b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_3.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__inv_3
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_3 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__inv_3.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__inv_3 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_3 layout**
diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_3.schematic.png b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_3.schematic.png
deleted file mode 100644
index 68f2c8b5..00000000
Binary files a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_3.schematic.png and /dev/null differ
diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_4.rst b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_4.rst
index 806bba1f..b47cddbe 100644
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_4.rst
+++ b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__inv_4
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__inv_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__inv_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_4 layout**
diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_4.schematic.png b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_4.schematic.png
deleted file mode 100644
index 68f2c8b5..00000000
Binary files a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_4.schematic.png and /dev/null differ
diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_8.rst b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_8.rst
index 4b4c93a7..e355acff 100644
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_8.rst
+++ b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_8.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__inv_8
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_8 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__inv_8.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__inv_8 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_8 layout**
diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_8.schematic.png b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_8.schematic.png
deleted file mode 100644
index 68f2c8b5..00000000
Binary files a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_8.schematic.png and /dev/null differ
diff --git a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg
new file mode 100644
index 00000000..5f71f495
--- /dev/null
+++ b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="305" height="121.5"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143,29.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__invz.v:30$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__invz.v:30$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,24.5)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__invz.v:0$3"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__invz.v:0$3"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__invz.v:0$3"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="mux" transform="translate(208,12)" s:width="20" s:height="40" id="cell_$ternary$gf180mcu_fd_sc_mcu9t5v0__invz.v:0$2"><s:alias val="$pmux"/><s:alias val="$mux"/><s:alias val="$_MUX_"/><path d="M0,0 L20,10 L20,30 L0,40 Z" class="cell_$ternary$gf180mcu_fd_sc_mcu9t5v0__invz.v:0$2"/><text x="5" y="32" class="nodelabel cell_$ternary$gf180mcu_fd_sc_mcu9t5v0__invz.v:0$2" s:attribute="">1</text><text x="5" y="13" class="nodelabel cell_$ternary$gf180mcu_fd_sc_mcu9t5v0__invz.v:0$2" s:attribute="">0</text><g s:x="0" s:y="10" s:pid="A"/><g s:x="0" s:y="30" s:pid="B"/><g s:x="10" s:y="35" s:pid="S"/><g s:x="20" s:y="20" s:pid="Y"/></g><g s:type="inputExt" transform="translate(78,89.5)" s:width="30" s:height="20" id="cell_EN"><text x="15" y="-4" class="nodelabel cell_EN" s:attribute="ref">EN</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_EN"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(263,22)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(12,24.5)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><line x1="105" x2="143" y1="34.5" y2="34.5" class="net_5 width_1" style="stroke-width: 1"/><line x1="108" x2="118" y1="99.5" y2="99.5" class="net_2 width_1" style="stroke-width: 1"/><line x1="118" x2="118" y1="99.5" y2="49.5" class="net_2 width_1" style="stroke-width: 1"/><circle cx="118" cy="99.5" r="2" style="fill:#000" class="net_2 width_1"/><line x1="118" x2="143" y1="49.5" y2="49.5" class="net_2 width_1" style="stroke-width: 1"/><line x1="108" x2="218" y1="99.5" y2="99.5" class="net_2 width_1" style="stroke-width: 1"/><line x1="218" x2="218" y1="99.5" y2="47" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="34.5" y2="34.5" class="net_4 width_1" style="stroke-width: 1"/><line x1="173" x2="208" y1="42" y2="42" class="net_6 width_1" style="stroke-width: 1"/><line x1="228" x2="263" y1="32" y2="32" class="net_3 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_1.rst b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_1.rst
index 89905693..fcc75dcc 100644
--- a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_1.rst
+++ b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__invz_1
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__invz_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__invz_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_1 layout**
diff --git a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_12.rst b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_12.rst
index 3ea82360..45eda443 100644
--- a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_12.rst
+++ b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_12.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__invz_x12
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_x12 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__invz_12.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__invz_x12 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_x12 layout**
diff --git a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_16.rst b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_16.rst
index 14894c68..bee1d3c3 100644
--- a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_16.rst
+++ b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_16.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__invz_x16
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_x16 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__invz_16.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__invz_x16 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_x16 layout**
diff --git a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_2.rst b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_2.rst
index 2d2ee021..7d457988 100644
--- a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_2.rst
+++ b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__invz_2
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__invz_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__invz_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_2 layout**
diff --git a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_3.rst b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_3.rst
index a3da0c04..ea672dfb 100644
--- a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_3.rst
+++ b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_3.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__invz_3
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_3 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__invz_3.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__invz_3 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_3 layout**
diff --git a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_4.rst b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_4.rst
index 23fa8f1c..82f83f50 100644
--- a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_4.rst
+++ b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__invz_4
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__invz_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__invz_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_4 layout**
diff --git a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_8.rst b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_8.rst
index 91628007..960e80b9 100644
--- a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_8.rst
+++ b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_8.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__invz_8
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_8 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__invz_8.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__invz_8 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_8 layout**
diff --git a/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq.schematic.svg b/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq.schematic.svg
new file mode 100644
index 00000000..c63cb0e6
--- /dev/null
+++ b/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="354" height="239"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(86,142)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latq.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latq.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latq.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(247,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latq.v:0$2"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latq.v:0$2"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latq.v:0$2"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="generic" transform="translate(173,86.5)" s:width="30" s:height="40" id="cell_x0"><text x="15" y="-4" class="nodelabel cell_x0" s:attribute="ref">udp_gf180mcu_fd_sc_mcu9t5v0_tt_25c_1v80_verilog_mgm_n_iq_latch_udp</text><rect width="30" height="100" s:generic="body" class="cell_x0"/><g transform="translate(0,10)" s:x="0" s:y="10" s:pid="in0" id="port_x0~C"><text x="-3" y="-4" class="inputPortLabel cell_x0">C</text></g><g transform="translate(0,30)" s:x="0" s:y="10" s:pid="in0" id="port_x0~CK"><text x="-3" y="-4" class="inputPortLabel cell_x0">CK</text></g><g transform="translate(0,50)" s:x="0" s:y="10" s:pid="in0" id="port_x0~D"><text x="-3" y="-4" class="inputPortLabel cell_x0">D</text></g><g transform="translate(0,70)" s:x="0" s:y="10" s:pid="in0" id="port_x0~N"><text x="-3" y="-4" class="inputPortLabel cell_x0">N</text></g><g transform="translate(0,90)" s:x="0" s:y="10" s:pid="in0" id="port_x0~P"><text x="-3" y="-4" class="inputPortLabel cell_x0">P</text></g><g transform="translate(30,10)" s:x="30" s:y="10" s:pid="out0" id="port_x0~Q"><text x="5" y="-4" style="fill:#000; stroke:none" class="cell_x0">Q</text></g></g><g s:type="inputExt" transform="translate(77,22)" s:width="30" s:height="20" id="cell_E"><text x="15" y="-4" class="nodelabel cell_E" s:attribute="ref">E</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_E"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,142)" s:width="30" s:height="20" id="cell_D"><text x="15" y="-4" class="nodelabel cell_D" s:attribute="ref">D</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_D"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(312,87)" s:width="30" s:height="20" id="cell_Q"><text x="15" y="-4" class="nodelabel cell_Q" s:attribute="ref">Q</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Q"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(77,207)" s:width="30" s:height="20" id="cell_notifier"><text x="15" y="-4" class="nodelabel cell_notifier" s:attribute="ref">notifier</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_notifier"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="constant" transform="translate(77,87)" s:width="30" s:height="20" id="cell_0"><text x="15" y="-4" class="nodelabel cell_0" s:attribute="ref">0</text><s:alias val="$_constant_"/><rect width="30" height="20" class="cell_0"/><g s:x="31" s:y="10" s:pid="Y"/></g><line x1="42" x2="85" y1="152" y2="152" class="net_3 width_1" style="stroke-width: 1"/><line x1="204" x2="246" y1="97" y2="97" class="net_7 width_1" style="stroke-width: 1"/><line x1="108" x2="173" y1="97" y2="97" class="net_8 width_1" style="stroke-width: 1"/><line x1="108" x2="135" y1="97" y2="97" class="net_8 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="97" y2="177" class="net_8 width_1" style="stroke-width: 1"/><circle cx="135" cy="97" r="2" style="fill:#000" class="net_8 width_1"/><line x1="135" x2="173" y1="177" y2="177" class="net_8 width_1" style="stroke-width: 1"/><line x1="107" x2="145" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="32" y2="117" class="net_2 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="117" y2="117" class="net_2 width_1" style="stroke-width: 1"/><line x1="113" x2="145" y1="152" y2="152" class="net_6 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="152" y2="137" class="net_6 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="137" y2="137" class="net_6 width_1" style="stroke-width: 1"/><line x1="107" x2="145" y1="217" y2="217" class="net_5 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="217" y2="157" class="net_5 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="157" y2="157" class="net_5 width_1" style="stroke-width: 1"/><line x1="274" x2="312" y1="97" y2="97" class="net_4 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_1.rst b/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_1.rst
index 0e413afb..b386e7df 100644
--- a/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_1.rst
+++ b/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__latq_1
 
 **gf180mcu_fd_sc_mcu9t5v0__latq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latq_1 layout**
diff --git a/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_2.rst b/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_2.rst
index 0c90a310..7377a8e7 100644
--- a/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_2.rst
+++ b/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__latq_2
 
 **gf180mcu_fd_sc_mcu9t5v0__latq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latq_2 layout**
diff --git a/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_4.rst b/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_4.rst
index 8151e897..0644efc1 100644
--- a/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_4.rst
+++ b/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__latq_4
 
 **gf180mcu_fd_sc_mcu9t5v0__latq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latq_4 layout**
diff --git a/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq.schematic.svg b/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq.schematic.svg
new file mode 100644
index 00000000..479a3f37
--- /dev/null
+++ b/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="288" height="314"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(86,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latrnq.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latrnq.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latrnq.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="generic" transform="translate(173,111.5)" s:width="30" s:height="40" id="cell_x0"><text x="15" y="-4" class="nodelabel cell_x0" s:attribute="ref">udp_gf180mcu_fd_sc_mcu9t5v0_tt_25c_1v80_verilog_mgm_n_iq_latch_udp</text><rect width="30" height="100" s:generic="body" class="cell_x0"/><g transform="translate(0,10)" s:x="0" s:y="10" s:pid="in0" id="port_x0~C"><text x="-3" y="-4" class="inputPortLabel cell_x0">C</text></g><g transform="translate(0,30)" s:x="0" s:y="10" s:pid="in0" id="port_x0~CK"><text x="-3" y="-4" class="inputPortLabel cell_x0">CK</text></g><g transform="translate(0,50)" s:x="0" s:y="10" s:pid="in0" id="port_x0~D"><text x="-3" y="-4" class="inputPortLabel cell_x0">D</text></g><g transform="translate(0,70)" s:x="0" s:y="10" s:pid="in0" id="port_x0~N"><text x="-3" y="-4" class="inputPortLabel cell_x0">N</text></g><g transform="translate(0,90)" s:x="0" s:y="10" s:pid="in0" id="port_x0~P"><text x="-3" y="-4" class="inputPortLabel cell_x0">P</text></g><g transform="translate(30,10)" s:x="30" s:y="10" s:pid="out0" id="port_x0~Q"><text x="5" y="-4" style="fill:#000; stroke:none" class="cell_x0">Q</text></g></g><g s:type="inputExt" transform="translate(77,87)" s:width="30" s:height="20" id="cell_E"><text x="15" y="-4" class="nodelabel cell_E" s:attribute="ref">E</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_E"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_RN"><text x="15" y="-4" class="nodelabel cell_RN" s:attribute="ref">RN</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_RN"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(77,152)" s:width="30" s:height="20" id="cell_D"><text x="15" y="-4" class="nodelabel cell_D" s:attribute="ref">D</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_D"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(246,112)" s:width="30" s:height="20" id="cell_Q"><text x="15" y="-4" class="nodelabel cell_Q" s:attribute="ref">Q</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Q"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(77,217)" s:width="30" s:height="20" id="cell_notifier"><text x="15" y="-4" class="nodelabel cell_notifier" s:attribute="ref">notifier</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_notifier"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="constant" transform="translate(77,282)" s:width="30" s:height="20" id="cell_0"><text x="15" y="-4" class="nodelabel cell_0" s:attribute="ref">0</text><s:alias val="$_constant_"/><rect width="30" height="20" class="cell_0"/><g s:x="31" s:y="10" s:pid="Y"/></g><line x1="42" x2="85" y1="32" y2="32" class="net_3 width_1" style="stroke-width: 1"/><line x1="113" x2="145" y1="32" y2="32" class="net_7 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="32" y2="122" class="net_7 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="122" y2="122" class="net_7 width_1" style="stroke-width: 1"/><line x1="107" x2="135" y1="97" y2="97" class="net_2 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="97" y2="142" class="net_2 width_1" style="stroke-width: 1"/><line x1="135" x2="173" y1="142" y2="142" class="net_2 width_1" style="stroke-width: 1"/><line x1="107" x2="173" y1="162" y2="162" class="net_4 width_1" style="stroke-width: 1"/><line x1="107" x2="135" y1="227" y2="227" class="net_6 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="227" y2="182" class="net_6 width_1" style="stroke-width: 1"/><line x1="135" x2="173" y1="182" y2="182" class="net_6 width_1" style="stroke-width: 1"/><line x1="108" x2="145" y1="292" y2="292" class="net_8 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="292" y2="202" class="net_8 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="202" y2="202" class="net_8 width_1" style="stroke-width: 1"/><line x1="204" x2="246" y1="122" y2="122" class="net_5 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_1.rst b/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_1.rst
index 8bd9f46b..fcd7ba55 100644
--- a/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_1.rst
+++ b/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__latrnq_1
 
 **gf180mcu_fd_sc_mcu9t5v0__latrnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latrnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latrnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latrnq_1 layout**
diff --git a/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_2.rst b/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_2.rst
index b608aeed..58581483 100644
--- a/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_2.rst
+++ b/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__latrnq_2
 
 **gf180mcu_fd_sc_mcu9t5v0__latrnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latrnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latrnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latrnq_2 layout**
diff --git a/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_4.rst b/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_4.rst
index 20808778..863d20c0 100644
--- a/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_4.rst
+++ b/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__latrnq_4
 
 **gf180mcu_fd_sc_mcu9t5v0__latrnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latrnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latrnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latrnq_4 layout**
diff --git a/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq.schematic.svg b/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq.schematic.svg
new file mode 100644
index 00000000..48d094d9
--- /dev/null
+++ b/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="288" height="304"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(86,272)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latrsnq.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latrsnq.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latrsnq.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(86,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latrsnq.v:0$2"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latrsnq.v:0$2"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latrsnq.v:0$2"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="generic" transform="translate(173,111.5)" s:width="30" s:height="40" id="cell_x0"><text x="15" y="-4" class="nodelabel cell_x0" s:attribute="ref">udp_gf180mcu_fd_sc_mcu9t5v0_tt_25c_1v80_verilog_mgm_hn_iq_latch_udp</text><rect width="30" height="100" s:generic="body" class="cell_x0"/><g transform="translate(0,10)" s:x="0" s:y="10" s:pid="in0" id="port_x0~C"><text x="-3" y="-4" class="inputPortLabel cell_x0">C</text></g><g transform="translate(0,30)" s:x="0" s:y="10" s:pid="in0" id="port_x0~CK"><text x="-3" y="-4" class="inputPortLabel cell_x0">CK</text></g><g transform="translate(0,50)" s:x="0" s:y="10" s:pid="in0" id="port_x0~D"><text x="-3" y="-4" class="inputPortLabel cell_x0">D</text></g><g transform="translate(0,70)" s:x="0" s:y="10" s:pid="in0" id="port_x0~N"><text x="-3" y="-4" class="inputPortLabel cell_x0">N</text></g><g transform="translate(0,90)" s:x="0" s:y="10" s:pid="in0" id="port_x0~P"><text x="-3" y="-4" class="inputPortLabel cell_x0">P</text></g><g transform="translate(30,10)" s:x="30" s:y="10" s:pid="out0" id="port_x0~Q"><text x="5" y="-4" style="fill:#000; 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\ No newline at end of file
diff --git a/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_1.rst b/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_1.rst
index f2853025..8762f72d 100644
--- a/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_1.rst
+++ b/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__latrsnq_1
 
 **gf180mcu_fd_sc_mcu9t5v0__latrsnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latrsnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latrsnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latrsnq_1 layout**
diff --git a/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_2.rst b/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_2.rst
index b2a83eda..8588fef3 100644
--- a/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_2.rst
+++ b/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__latrsnq_2
 
 **gf180mcu_fd_sc_mcu9t5v0__latrsnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latrsnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latrsnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latrsnq_2 layout**
diff --git a/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_4.rst b/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_4.rst
index a5c24bdb..77d185a0 100644
--- a/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_4.rst
+++ b/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__latrsnq_4
 
 **gf180mcu_fd_sc_mcu9t5v0__latrsnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latrsnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latrsnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latrsnq_4 layout**
diff --git a/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq.schematic.svg b/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq.schematic.svg
new file mode 100644
index 00000000..17ec0a8d
--- /dev/null
+++ b/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="288" height="304"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(86,272)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latsnq.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latsnq.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latsnq.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="generic" transform="translate(173,111.5)" s:width="30" s:height="40" id="cell_x0"><text x="15" y="-4" class="nodelabel cell_x0" s:attribute="ref">udp_gf180mcu_fd_sc_mcu9t5v0_tt_25c_1v80_verilog_mgm_n_iq_latch_udp</text><rect width="30" height="100" s:generic="body" class="cell_x0"/><g transform="translate(0,10)" s:x="0" s:y="10" s:pid="in0" id="port_x0~C"><text x="-3" y="-4" class="inputPortLabel cell_x0">C</text></g><g transform="translate(0,30)" s:x="0" s:y="10" s:pid="in0" id="port_x0~CK"><text x="-3" y="-4" class="inputPortLabel cell_x0">CK</text></g><g transform="translate(0,50)" s:x="0" s:y="10" s:pid="in0" id="port_x0~D"><text x="-3" y="-4" class="inputPortLabel cell_x0">D</text></g><g transform="translate(0,70)" s:x="0" s:y="10" s:pid="in0" id="port_x0~N"><text x="-3" y="-4" class="inputPortLabel cell_x0">N</text></g><g transform="translate(0,90)" s:x="0" s:y="10" s:pid="in0" id="port_x0~P"><text x="-3" y="-4" class="inputPortLabel cell_x0">P</text></g><g transform="translate(30,10)" s:x="30" s:y="10" s:pid="out0" id="port_x0~Q"><text x="5" y="-4" style="fill:#000; stroke:none" class="cell_x0">Q</text></g></g><g s:type="inputExt" transform="translate(77,87)" s:width="30" s:height="20" id="cell_E"><text x="15" y="-4" class="nodelabel cell_E" s:attribute="ref">E</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_E"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(77,152)" s:width="30" s:height="20" id="cell_D"><text x="15" y="-4" class="nodelabel cell_D" s:attribute="ref">D</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_D"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,272)" s:width="30" s:height="20" id="cell_SETN"><text x="15" y="-4" class="nodelabel cell_SETN" s:attribute="ref">SETN</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_SETN"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(246,112)" s:width="30" s:height="20" id="cell_Q"><text x="15" y="-4" class="nodelabel cell_Q" s:attribute="ref">Q</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Q"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(77,217)" s:width="30" s:height="20" id="cell_notifier"><text x="15" y="-4" class="nodelabel cell_notifier" s:attribute="ref">notifier</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_notifier"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="constant" transform="translate(77,22)" s:width="30" s:height="20" id="cell_0"><text x="15" y="-4" class="nodelabel cell_0" s:attribute="ref">0</text><s:alias val="$_constant_"/><rect width="30" height="20" class="cell_0"/><g s:x="31" s:y="10" s:pid="Y"/></g><line x1="42" x2="85" y1="282" y2="282" class="net_4 width_1" style="stroke-width: 1"/><line x1="108" x2="145" y1="32" y2="32" class="net_8 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="32" y2="122" class="net_8 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="122" y2="122" class="net_8 width_1" style="stroke-width: 1"/><line x1="107" x2="135" y1="97" y2="97" class="net_2 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="97" y2="142" class="net_2 width_1" style="stroke-width: 1"/><line x1="135" x2="173" y1="142" y2="142" class="net_2 width_1" style="stroke-width: 1"/><line x1="107" x2="173" y1="162" y2="162" class="net_3 width_1" style="stroke-width: 1"/><line x1="107" x2="135" y1="227" y2="227" class="net_6 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="227" y2="182" class="net_6 width_1" style="stroke-width: 1"/><line x1="135" x2="173" y1="182" y2="182" class="net_6 width_1" style="stroke-width: 1"/><line x1="113" x2="145" y1="282" y2="282" class="net_7 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="282" y2="202" class="net_7 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="202" y2="202" class="net_7 width_1" style="stroke-width: 1"/><line x1="204" x2="246" y1="122" y2="122" class="net_5 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_1.rst b/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_1.rst
index 78c632d0..4604d309 100644
--- a/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_1.rst
+++ b/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__latsnq_1
 
 **gf180mcu_fd_sc_mcu9t5v0__latsnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latsnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latsnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latsnq_1 layout**
diff --git a/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_2.rst b/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_2.rst
index 01f40028..b772895a 100644
--- a/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_2.rst
+++ b/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__latsnq_2
 
 **gf180mcu_fd_sc_mcu9t5v0__latsnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latsnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latsnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latsnq_2 layout**
diff --git a/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_4.rst b/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_4.rst
index 430b5103..f888363b 100644
--- a/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_4.rst
+++ b/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__latsnq_4
 
 **gf180mcu_fd_sc_mcu9t5v0__latsnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latsnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latsnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latsnq_4 layout**
diff --git a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2.schematic.svg b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2.schematic.svg
new file mode 100644
index 00000000..1592c22b
--- /dev/null
+++ b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="380" height="194"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
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diff --git a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_1.rst b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_1.rst
index 4c54737e..af6379cf 100644
--- a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_1.rst
+++ b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__mux2_1
 
 **gf180mcu_fd_sc_mcu9t5v0__mux2_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__mux2_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__mux2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__mux2_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__mux2_1 layout**
diff --git a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_1.schematic.png b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_1.schematic.png
deleted file mode 100644
index c1ec3391..00000000
Binary files a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_1.schematic.png and /dev/null differ
diff --git a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_2.rst b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_2.rst
index e286f925..b9ac02f3 100644
--- a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_2.rst
+++ b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__mux2_2
 
 **gf180mcu_fd_sc_mcu9t5v0__mux2_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__mux2_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__mux2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__mux2_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__mux2_2 layout**
diff --git a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_2.schematic.png b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_2.schematic.png
deleted file mode 100644
index c1ec3391..00000000
Binary files a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_2.schematic.png and /dev/null differ
diff --git a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_4.rst b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_4.rst
index 5bdaa89d..b2cfde29 100644
--- a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_4.rst
+++ b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__mux2_4
 
 **gf180mcu_fd_sc_mcu9t5v0__mux2_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__mux2_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__mux2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__mux2_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__mux2_4 layout**
diff --git a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_4.schematic.png b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_4.schematic.png
deleted file mode 100644
index c1ec3391..00000000
Binary files a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_4.schematic.png and /dev/null differ
diff --git a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4.schematic.svg b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4.schematic.svg
new file mode 100644
index 00000000..479f4a3c
--- /dev/null
+++ b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4.schematic.svg
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+}
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+  font-weight: bold;
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+}
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\ No newline at end of file
diff --git a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_1.rst b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_1.rst
index fbba4db6..1d310aa4 100644
--- a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_1.rst
+++ b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__mux4_1
 
 **gf180mcu_fd_sc_mcu9t5v0__mux4_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__mux4_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__mux4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__mux4_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__mux4_1 layout**
diff --git a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_1.schematic.png b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_1.schematic.png
deleted file mode 100644
index 85de14a3..00000000
Binary files a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_1.schematic.png and /dev/null differ
diff --git a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_2.rst b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_2.rst
index 5645343a..8d15b7c6 100644
--- a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_2.rst
+++ b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__mux4_2
 
 **gf180mcu_fd_sc_mcu9t5v0__mux4_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__mux4_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__mux4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__mux4_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__mux4_2 layout**
diff --git a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_2.schematic.png b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_2.schematic.png
deleted file mode 100644
index 85de14a3..00000000
Binary files a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_2.schematic.png and /dev/null differ
diff --git a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_4.rst b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_4.rst
index f09c2664..7155bbcd 100644
--- a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_4.rst
+++ b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__mux4_4
 
 **gf180mcu_fd_sc_mcu9t5v0__mux4_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__mux4_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__mux4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__mux4_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__mux4_4 layout**
diff --git a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_4.schematic.png b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_4.schematic.png
deleted file mode 100644
index 85de14a3..00000000
Binary files a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_4.schematic.png and /dev/null differ
diff --git a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2.schematic.svg b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2.schematic.svg
new file mode 100644
index 00000000..36c961dc
--- /dev/null
+++ b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2.schematic.svg
@@ -0,0 +1,23 @@
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+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
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\ No newline at end of file
diff --git a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_1.rst b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_1.rst
index db13a7b9..74177519 100644
--- a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_1.rst
+++ b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__nand2_1
 
 **gf180mcu_fd_sc_mcu9t5v0__nand2_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nand2_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nand2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nand2_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nand2_1 layout**
diff --git a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_1.schematic.png b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_1.schematic.png
deleted file mode 100644
index 12f8d31b..00000000
Binary files a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_1.schematic.png and /dev/null differ
diff --git a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_2.rst b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_2.rst
index 1ab8f6f3..b8d9334e 100644
--- a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_2.rst
+++ b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__nand2_2
 
 **gf180mcu_fd_sc_mcu9t5v0__nand2_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nand2_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nand2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nand2_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nand2_2 layout**
diff --git a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_2.schematic.png b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_2.schematic.png
deleted file mode 100644
index 12f8d31b..00000000
Binary files a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_2.schematic.png and /dev/null differ
diff --git a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_4.rst b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_4.rst
index 2a0ed1dc..57e3d0d0 100644
--- a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_4.rst
+++ b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__nand2_4
 
 **gf180mcu_fd_sc_mcu9t5v0__nand2_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nand2_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nand2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nand2_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nand2_4 layout**
diff --git a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_4.schematic.png b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_4.schematic.png
deleted file mode 100644
index 12f8d31b..00000000
Binary files a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_4.schematic.png and /dev/null differ
diff --git a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3.schematic.svg b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3.schematic.svg
new file mode 100644
index 00000000..ebf30247
--- /dev/null
+++ b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="316" height="184"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand3.v:0$3"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand3.v:0$3"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand3.v:0$3"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand3.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand3.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand3.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(144,152)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand3.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand3.v:0$5"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand3.v:0$5"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="or" transform="translate(143.66666666666666,27)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__nand3.v:34$1"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__nand3.v:34$1"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="or" transform="translate(209,34.5)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__nand3.v:34$2"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__nand3.v:34$2"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(78,152)" s:width="30" s:height="20" id="cell_A3"><text x="15" y="-4" class="nodelabel cell_A3" s:attribute="ref">A3</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A3"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(274,37)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_5 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="97" y2="97" class="net_4 width_1" style="stroke-width: 1"/><line x1="108" x2="143" y1="162" y2="162" class="net_2 width_1" style="stroke-width: 1"/><line x1="105" x2="145.66666666666666" y1="32" y2="32" class="net_6 width_1" style="stroke-width: 1"/><line x1="105" x2="118" y1="97" y2="97" class="net_7 width_1" style="stroke-width: 1"/><line x1="118" x2="118" y1="97" y2="47" class="net_7 width_1" style="stroke-width: 1"/><line x1="118" x2="145.66666666666666" y1="47" y2="47" class="net_7 width_1" style="stroke-width: 1"/><line x1="173.66666666666666" x2="211" y1="39.5" y2="39.5" class="net_9 width_1" style="stroke-width: 1"/><line x1="171" x2="184" y1="162" y2="162" class="net_8 width_1" style="stroke-width: 1"/><line x1="184" x2="184" y1="162" y2="54.5" class="net_8 width_1" style="stroke-width: 1"/><line x1="184" x2="211" y1="54.5" y2="54.5" class="net_8 width_1" style="stroke-width: 1"/><line x1="239" x2="274" y1="47" y2="47" class="net_3 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_1.rst b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_1.rst
index 340ca3b0..fbcfdfd2 100644
--- a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_1.rst
+++ b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__nand3_1
 
 **gf180mcu_fd_sc_mcu9t5v0__nand3_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nand3_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nand3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nand3_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nand3_1 layout**
diff --git a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_1.schematic.png b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_1.schematic.png
deleted file mode 100644
index ef9d64c1..00000000
Binary files a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_1.schematic.png and /dev/null differ
diff --git a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_2.rst b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_2.rst
index 34b8ec29..9a1bfb76 100644
--- a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_2.rst
+++ b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__nand3_2
 
 **gf180mcu_fd_sc_mcu9t5v0__nand3_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nand3_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nand3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nand3_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nand3_2 layout**
diff --git a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_2.schematic.png b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_2.schematic.png
deleted file mode 100644
index ef9d64c1..00000000
Binary files a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_2.schematic.png and /dev/null differ
diff --git a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_4.rst b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_4.rst
index 2362ac9a..6a2e9ca5 100644
--- a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_4.rst
+++ b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__nand3_4
 
 **gf180mcu_fd_sc_mcu9t5v0__nand3_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nand3_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nand3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nand3_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nand3_4 layout**
diff --git a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_4.schematic.png b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_4.schematic.png
deleted file mode 100644
index ef9d64c1..00000000
Binary files a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_4.schematic.png and /dev/null differ
diff --git a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4.schematic.svg b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4.schematic.svg
new file mode 100644
index 00000000..285bae1d
--- /dev/null
+++ b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="382" height="249"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand4.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand4.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand4.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand4.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand4.v:0$5"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand4.v:0$5"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(144,152)" s:width="30" s:height="20" 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y2="227" class="net_10 width_1" style="stroke-width: 1"/><line x1="250" x2="250" y1="227" y2="62" class="net_10 width_1" style="stroke-width: 1"/><line x1="250" x2="277" y1="62" y2="62" class="net_10 width_1" style="stroke-width: 1"/><line x1="305" x2="340" y1="54.5" y2="54.5" class="net_3 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_1.rst b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_1.rst
index b6a0b8a7..0ba0d917 100644
--- a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_1.rst
+++ b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__nand4_1
 
 **gf180mcu_fd_sc_mcu9t5v0__nand4_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nand4_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nand4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nand4_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nand4_1 layout**
diff --git a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_1.schematic.png b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_1.schematic.png
deleted file mode 100644
index 2816b71c..00000000
Binary files a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_1.schematic.png and /dev/null differ
diff --git a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_2.rst b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_2.rst
index eadf831c..eacc796e 100644
--- a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_2.rst
+++ b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__nand4_2
 
 **gf180mcu_fd_sc_mcu9t5v0__nand4_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nand4_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nand4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nand4_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nand4_2 layout**
diff --git a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_2.schematic.png b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_2.schematic.png
deleted file mode 100644
index 2816b71c..00000000
Binary files a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_2.schematic.png and /dev/null differ
diff --git a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_4.rst b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_4.rst
index c61769bd..4e31e2d9 100644
--- a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_4.rst
+++ b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__nand4_4
 
 **gf180mcu_fd_sc_mcu9t5v0__nand4_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nand4_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nand4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nand4_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nand4_4 layout**
diff --git a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_4.schematic.png b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_4.schematic.png
deleted file mode 100644
index 2816b71c..00000000
Binary files a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_4.schematic.png and /dev/null differ
diff --git a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2.schematic.svg b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2.schematic.svg
new file mode 100644
index 00000000..43397584
--- /dev/null
+++ b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="250" height="119"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor2.v:30$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor2.v:30$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor2.v:0$2"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor2.v:0$2"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor2.v:0$2"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor2.v:0$3"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor2.v:0$3"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor2.v:0$3"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(208,29.5)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><line x1="105" x2="143" y1="32" y2="32" class="net_5 width_1" style="stroke-width: 1"/><line x1="105" x2="118" y1="97" y2="97" class="net_6 width_1" style="stroke-width: 1"/><line x1="118" x2="118" y1="97" y2="47" class="net_6 width_1" style="stroke-width: 1"/><line x1="118" x2="143" y1="47" y2="47" class="net_6 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="32" y2="32" class="net_4 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="97" y2="97" class="net_2 width_1" style="stroke-width: 1"/><line x1="173" x2="208" y1="39.5" y2="39.5" class="net_3 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_1.rst b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_1.rst
index b3842b18..c81e8863 100644
--- a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_1.rst
+++ b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__nor2_1
 
 **gf180mcu_fd_sc_mcu9t5v0__nor2_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nor2_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nor2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nor2_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nor2_1 layout**
diff --git a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_1.schematic.png b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_1.schematic.png
deleted file mode 100644
index cc8a0fca..00000000
Binary files a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_1.schematic.png and /dev/null differ
diff --git a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_2.rst b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_2.rst
index a0d9b1e5..399be4f3 100644
--- a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_2.rst
+++ b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__nor2_2
 
 **gf180mcu_fd_sc_mcu9t5v0__nor2_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nor2_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nor2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nor2_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nor2_2 layout**
diff --git a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_2.schematic.png b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_2.schematic.png
deleted file mode 100644
index cc8a0fca..00000000
Binary files a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_2.schematic.png and /dev/null differ
diff --git a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_4.rst b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_4.rst
index af65d81a..8695b1db 100644
--- a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_4.rst
+++ b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__nor2_4
 
 **gf180mcu_fd_sc_mcu9t5v0__nor2_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nor2_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nor2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nor2_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nor2_4 layout**
diff --git a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_4.schematic.png b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_4.schematic.png
deleted file mode 100644
index cc8a0fca..00000000
Binary files a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_4.schematic.png and /dev/null differ
diff --git a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3.schematic.svg b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3.schematic.svg
new file mode 100644
index 00000000..f2a15a4e
--- /dev/null
+++ b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="316" height="184"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143.66666666666666,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor3.v:34$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor3.v:34$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(209,34.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor3.v:34$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor3.v:34$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor3.v:0$3"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor3.v:0$3"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor3.v:0$3"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor3.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor3.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor3.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(144,152)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor3.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor3.v:0$5"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor3.v:0$5"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(78,152)" s:width="30" s:height="20" id="cell_A3"><text x="15" y="-4" class="nodelabel cell_A3" s:attribute="ref">A3</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A3"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(274,37)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><line x1="105" x2="143.66666666666666" y1="32" y2="32" class="net_6 width_1" style="stroke-width: 1"/><line x1="105" x2="118" y1="97" y2="97" class="net_7 width_1" style="stroke-width: 1"/><line x1="118" x2="118" y1="97" y2="47" class="net_7 width_1" style="stroke-width: 1"/><line x1="118" x2="143.66666666666666" y1="47" y2="47" class="net_7 width_1" style="stroke-width: 1"/><line x1="173.66666666666666" x2="209" y1="39.5" y2="39.5" class="net_8 width_1" style="stroke-width: 1"/><line x1="171" x2="184" y1="162" y2="162" class="net_9 width_1" style="stroke-width: 1"/><line x1="184" x2="184" y1="162" y2="54.5" class="net_9 width_1" style="stroke-width: 1"/><line x1="184" x2="209" y1="54.5" y2="54.5" class="net_9 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="32" y2="32" class="net_5 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="97" y2="97" class="net_4 width_1" style="stroke-width: 1"/><line x1="108" x2="143" y1="162" y2="162" class="net_2 width_1" style="stroke-width: 1"/><line x1="239" x2="274" y1="47" y2="47" class="net_3 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_1.rst b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_1.rst
index b9abc432..8f2a69f2 100644
--- a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_1.rst
+++ b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__nor3_1
 
 **gf180mcu_fd_sc_mcu9t5v0__nor3_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nor3_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nor3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nor3_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nor3_1 layout**
diff --git a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_1.schematic.png b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_1.schematic.png
deleted file mode 100644
index 40c2ac41..00000000
Binary files a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_1.schematic.png and /dev/null differ
diff --git a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_2.rst b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_2.rst
index fe9fdb3a..b38b8a71 100644
--- a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_2.rst
+++ b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__nor3_2
 
 **gf180mcu_fd_sc_mcu9t5v0__nor3_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nor3_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nor3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nor3_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nor3_2 layout**
diff --git a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_2.schematic.png b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_2.schematic.png
deleted file mode 100644
index 40c2ac41..00000000
Binary files a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_2.schematic.png and /dev/null differ
diff --git a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_4.rst b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_4.rst
index f8db624d..ffbcc22b 100644
--- a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_4.rst
+++ b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__nor3_4
 
 **gf180mcu_fd_sc_mcu9t5v0__nor3_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nor3_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nor3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nor3_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nor3_4 layout**
diff --git a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_4.schematic.png b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_4.schematic.png
deleted file mode 100644
index 40c2ac41..00000000
Binary files a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_4.schematic.png and /dev/null differ
diff --git a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4.schematic.svg b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4.schematic.svg
new file mode 100644
index 00000000..1d696b2d
--- /dev/null
+++ b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="382" height="249"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143.66666666666666,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor4.v:38$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor4.v:38$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(209.66666666666666,34.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor4.v:38$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor4.v:38$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(275,42)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor4.v:38$3"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor4.v:38$3"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor4.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor4.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor4.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor4.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 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\ No newline at end of file
diff --git a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_1.rst b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_1.rst
index 17c0f878..b9b6cc46 100644
--- a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_1.rst
+++ b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__nor4_1
 
 **gf180mcu_fd_sc_mcu9t5v0__nor4_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nor4_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nor4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nor4_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nor4_1 layout**
diff --git a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_1.schematic.png b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_1.schematic.png
deleted file mode 100644
index 314705d9..00000000
Binary files a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_1.schematic.png and /dev/null differ
diff --git a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_2.rst b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_2.rst
index ad103ff4..95b7fd85 100644
--- a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_2.rst
+++ b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__nor4_2
 
 **gf180mcu_fd_sc_mcu9t5v0__nor4_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nor4_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nor4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nor4_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nor4_2 layout**
diff --git a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_2.schematic.png b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_2.schematic.png
deleted file mode 100644
index 314705d9..00000000
Binary files a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_2.schematic.png and /dev/null differ
diff --git a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_4.rst b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_4.rst
index ce89f3b4..30953d79 100644
--- a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_4.rst
+++ b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__nor4_4
 
 **gf180mcu_fd_sc_mcu9t5v0__nor4_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nor4_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nor4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nor4_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nor4_4 layout**
diff --git a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_4.schematic.png b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_4.schematic.png
deleted file mode 100644
index 314705d9..00000000
Binary files a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_4.schematic.png and /dev/null differ
diff --git a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21.schematic.svg b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21.schematic.svg
new file mode 100644
index 00000000..9f5a5919
--- /dev/null
+++ b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="316" height="184"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143.66666666666666,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai21.v:32$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai21.v:32$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai21.v:0$3"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai21.v:0$3"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai21.v:0$3"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai21.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai21.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai21.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(144,152)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai21.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai21.v:0$5"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai21.v:0$5"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="or" transform="translate(209,34.5)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai21.v:38$2"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai21.v:38$2"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(274,37)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(78,152)" s:width="30" s:height="20" id="cell_B"><text x="15" y="-4" class="nodelabel cell_B" s:attribute="ref">B</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_B"/><g s:x="30" s:y="10" s:pid="Y"/></g><line x1="105" x2="143.66666666666666" y1="32" y2="32" class="net_6 width_1" style="stroke-width: 1"/><line x1="105" x2="118" y1="97" y2="97" class="net_7 width_1" style="stroke-width: 1"/><line x1="118" x2="118" y1="97" y2="47" class="net_7 width_1" style="stroke-width: 1"/><line x1="118" x2="143.66666666666666" y1="47" y2="47" class="net_7 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="32" y2="32" class="net_4 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="97" y2="97" class="net_2 width_1" style="stroke-width: 1"/><line x1="108" x2="143" y1="162" y2="162" class="net_5 width_1" style="stroke-width: 1"/><line x1="173.66666666666666" x2="211" y1="39.5" y2="39.5" class="net_8 width_1" style="stroke-width: 1"/><line x1="171" x2="184" y1="162" y2="162" class="net_9 width_1" style="stroke-width: 1"/><line x1="184" x2="184" y1="162" y2="54.5" class="net_9 width_1" style="stroke-width: 1"/><line x1="184" x2="211" y1="54.5" y2="54.5" class="net_9 width_1" style="stroke-width: 1"/><line x1="239" x2="274" y1="47" y2="47" class="net_3 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_1.rst b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_1.rst
index 23fecd94..b93181f7 100644
--- a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_1.rst
+++ b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai21_1
 
 **gf180mcu_fd_sc_mcu9t5v0__oai21_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai21_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai21.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai21_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai21_1 layout**
diff --git a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_1.schematic.png b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_1.schematic.png
deleted file mode 100644
index f95472c2..00000000
Binary files a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_1.schematic.png and /dev/null differ
diff --git a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_2.rst b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_2.rst
index b93ed8c0..00202a96 100644
--- a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_2.rst
+++ b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai21_2
 
 **gf180mcu_fd_sc_mcu9t5v0__oai21_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai21_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai21.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai21_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai21_2 layout**
diff --git a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_2.schematic.png b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_2.schematic.png
deleted file mode 100644
index f95472c2..00000000
Binary files a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_2.schematic.png and /dev/null differ
diff --git a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_4.rst b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_4.rst
index fc2b64a1..f21766a0 100644
--- a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_4.rst
+++ b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai21_4
 
 **gf180mcu_fd_sc_mcu9t5v0__oai21_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai21_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai21.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai21_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai21_4 layout**
diff --git a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_4.schematic.png b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_4.schematic.png
deleted file mode 100644
index f95472c2..00000000
Binary files a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_4.schematic.png and /dev/null differ
diff --git a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211.schematic.svg b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211.schematic.svg
new file mode 100644
index 00000000..4aca3e0e
--- /dev/null
+++ b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="382" height="249"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143.66666666666666,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai211.v:32$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai211.v:32$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai211.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai211.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai211.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai211.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai211.v:0$5"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai211.v:0$5"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(144,152)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai211.v:0$6"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai211.v:0$6"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai211.v:0$6"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(210,217)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai211.v:0$7"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai211.v:0$7"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai211.v:0$7"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="or" transform="translate(209.66666666666666,34.5)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai211.v:42$2"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai211.v:42$2"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="or" transform="translate(275,42)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai211.v:42$3"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai211.v:42$3"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(340,44.5)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(78,152)" s:width="30" s:height="20" id="cell_B"><text x="15" y="-4" class="nodelabel cell_B" s:attribute="ref">B</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_B"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(144,217)" s:width="30" s:height="20" id="cell_C"><text x="15" y="-4" class="nodelabel cell_C" s:attribute="ref">C</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_C"/><g s:x="30" s:y="10" s:pid="Y"/></g><line x1="105" x2="143.66666666666666" y1="32" y2="32" class="net_7 width_1" style="stroke-width: 1"/><line x1="105" x2="118" y1="97" y2="97" class="net_8 width_1" style="stroke-width: 1"/><line x1="118" x2="118" y1="97" y2="47" class="net_8 width_1" style="stroke-width: 1"/><line x1="118" x2="143.66666666666666" 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\ No newline at end of file
diff --git a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_1.rst b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_1.rst
index 8b591e46..ceaaadce 100644
--- a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_1.rst
+++ b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai211_1
 
 **gf180mcu_fd_sc_mcu9t5v0__oai211_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai211_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai211.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai211_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai211_1 layout**
diff --git a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_1.schematic.png b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_1.schematic.png
deleted file mode 100644
index 0382fcc2..00000000
Binary files a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_1.schematic.png and /dev/null differ
diff --git a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_2.rst b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_2.rst
index c44d101d..b919ee69 100644
--- a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_2.rst
+++ b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai211_2
 
 **gf180mcu_fd_sc_mcu9t5v0__oai211_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai211_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai211.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai211_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai211_2 layout**
diff --git a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_2.schematic.png b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_2.schematic.png
deleted file mode 100644
index 0382fcc2..00000000
Binary files a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_2.schematic.png and /dev/null differ
diff --git a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_4.rst b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_4.rst
index 4036a3f3..6fbd01f4 100644
--- a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_4.rst
+++ b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai211_4
 
 **gf180mcu_fd_sc_mcu9t5v0__oai211_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai211_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai211.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai211_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai211_4 layout**
diff --git a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_4.schematic.png b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_4.schematic.png
deleted file mode 100644
index 0382fcc2..00000000
Binary files a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_4.schematic.png and /dev/null differ
diff --git a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22.schematic.svg b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22.schematic.svg
new file mode 100644
index 00000000..ec5203ce
--- /dev/null
+++ b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="315" height="249"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai22.v:32$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai22.v:32$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(143,157)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai22.v:44$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai22.v:44$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai22.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai22.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai22.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai22.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai22.v:0$5"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai22.v:0$5"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,152)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai22.v:0$6"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai22.v:0$6"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai22.v:0$6"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,217)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai22.v:0$7"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai22.v:0$7"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai22.v:0$7"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="or" transform="translate(208,34.5)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai22.v:46$3"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" 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s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><line x1="105" x2="143" y1="32" y2="32" class="net_7 width_1" style="stroke-width: 1"/><line x1="105" x2="118" y1="97" y2="97" class="net_8 width_1" style="stroke-width: 1"/><line x1="118" x2="118" y1="97" y2="47" class="net_8 width_1" style="stroke-width: 1"/><line x1="118" x2="143" y1="47" y2="47" class="net_8 width_1" style="stroke-width: 1"/><line x1="105" x2="143" y1="162" y2="162" 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\ No newline at end of file
diff --git a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_1.rst b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_1.rst
index f1539d7e..9e55b655 100644
--- a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_1.rst
+++ b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai22_1
 
 **gf180mcu_fd_sc_mcu9t5v0__oai22_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai22_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai22.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai22_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai22_1 layout**
diff --git a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_1.schematic.png b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_1.schematic.png
deleted file mode 100644
index 76be4ee8..00000000
Binary files a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_1.schematic.png and /dev/null differ
diff --git a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_2.rst b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_2.rst
index f0a3f91e..b062459c 100644
--- a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_2.rst
+++ b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai22_2
 
 **gf180mcu_fd_sc_mcu9t5v0__oai22_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai22_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai22.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai22_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai22_2 layout**
diff --git a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_2.schematic.png b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_2.schematic.png
deleted file mode 100644
index 76be4ee8..00000000
Binary files a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_2.schematic.png and /dev/null differ
diff --git a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_4.rst b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_4.rst
index 274008ba..f06314c2 100644
--- a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_4.rst
+++ b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai22_4
 
 **gf180mcu_fd_sc_mcu9t5v0__oai22_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai22_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai22.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai22_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai22_4 layout**
diff --git a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_4.schematic.png b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_4.schematic.png
deleted file mode 100644
index 76be4ee8..00000000
Binary files a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_4.schematic.png and /dev/null differ
diff --git a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221.schematic.svg b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221.schematic.svg
new file mode 100644
index 00000000..51565e26
--- /dev/null
+++ b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221.schematic.svg
@@ -0,0 +1,23 @@
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+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
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diff --git a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_1.rst b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_1.rst
index 7420dbcb..dcc1f6dc 100644
--- a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_1.rst
+++ b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai221_1
 
 **gf180mcu_fd_sc_mcu9t5v0__oai221_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai221_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai221.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai221_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai221_1 layout**
diff --git a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_1.schematic.png b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_1.schematic.png
deleted file mode 100644
index c75021d6..00000000
Binary files a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_1.schematic.png and /dev/null differ
diff --git a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_2.rst b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_2.rst
index e95aa6f2..8c3e7c00 100644
--- a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_2.rst
+++ b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai221_2
 
 **gf180mcu_fd_sc_mcu9t5v0__oai221_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai221_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai221.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai221_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai221_2 layout**
diff --git a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_2.schematic.png b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_2.schematic.png
deleted file mode 100644
index c75021d6..00000000
Binary files a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_2.schematic.png and /dev/null differ
diff --git a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_4.rst b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_4.rst
index 84a7381f..af7cd424 100644
--- a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_4.rst
+++ b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai221_4
 
 **gf180mcu_fd_sc_mcu9t5v0__oai221_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai221_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai221.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai221_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai221_4 layout**
diff --git a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_4.schematic.png b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_4.schematic.png
deleted file mode 100644
index c75021d6..00000000
Binary files a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_4.schematic.png and /dev/null differ
diff --git a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222.schematic.svg b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222.schematic.svg
new file mode 100644
index 00000000..cc35b653
--- /dev/null
+++ b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222.schematic.svg
@@ -0,0 +1,23 @@
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+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
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\ No newline at end of file
diff --git a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_1.rst b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_1.rst
index fad296af..b62a2f5d 100644
--- a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_1.rst
+++ b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai222_1
 
 **gf180mcu_fd_sc_mcu9t5v0__oai222_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai222_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai222.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai222_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai222_1 layout**
diff --git a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_1.schematic.png b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_1.schematic.png
deleted file mode 100644
index c67674b8..00000000
Binary files a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_1.schematic.png and /dev/null differ
diff --git a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_2.rst b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_2.rst
index 632a6073..621e5001 100644
--- a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_2.rst
+++ b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai222_2
 
 **gf180mcu_fd_sc_mcu9t5v0__oai222_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai222_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai222.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai222_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai222_2 layout**
diff --git a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_2.schematic.png b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_2.schematic.png
deleted file mode 100644
index c67674b8..00000000
Binary files a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_2.schematic.png and /dev/null differ
diff --git a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_4.rst b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_4.rst
index af9fe19f..4023de04 100644
--- a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_4.rst
+++ b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai222_4
 
 **gf180mcu_fd_sc_mcu9t5v0__oai222_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai222_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai222.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai222_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai222_4 layout**
diff --git a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_4.schematic.png b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_4.schematic.png
deleted file mode 100644
index c67674b8..00000000
Binary files a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_4.schematic.png and /dev/null differ
diff --git a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31.schematic.svg b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31.schematic.svg
new file mode 100644
index 00000000..ade34a24
--- /dev/null
+++ b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="382" height="249"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
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\ No newline at end of file
diff --git a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_1.rst b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_1.rst
index d3f631f3..1de6407f 100644
--- a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_1.rst
+++ b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai31_1
 
 **gf180mcu_fd_sc_mcu9t5v0__oai31_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai31_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai31.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai31_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai31_1 layout**
diff --git a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_1.schematic.png b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_1.schematic.png
deleted file mode 100644
index f7bdfd69..00000000
Binary files a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_1.schematic.png and /dev/null differ
diff --git a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_2.rst b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_2.rst
index c248ba7d..77cf0fcf 100644
--- a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_2.rst
+++ b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai31_2
 
 **gf180mcu_fd_sc_mcu9t5v0__oai31_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai31_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai31.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai31_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai31_2 layout**
diff --git a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_2.schematic.png b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_2.schematic.png
deleted file mode 100644
index f7bdfd69..00000000
Binary files a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_2.schematic.png and /dev/null differ
diff --git a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_4.rst b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_4.rst
index a9763ef4..78f6f0f3 100644
--- a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_4.rst
+++ b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai31_4
 
 **gf180mcu_fd_sc_mcu9t5v0__oai31_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai31_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai31.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai31_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai31_4 layout**
diff --git a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_4.schematic.png b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_4.schematic.png
deleted file mode 100644
index f7bdfd69..00000000
Binary files a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_4.schematic.png and /dev/null differ
diff --git a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32.schematic.svg b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32.schematic.svg
new file mode 100644
index 00000000..c3a5d60b
--- /dev/null
+++ b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32.schematic.svg
@@ -0,0 +1,23 @@
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+  stroke:#000;
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+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
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diff --git a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_1.rst b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_1.rst
index 25e069ee..35e23c9f 100644
--- a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_1.rst
+++ b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai32_1
 
 **gf180mcu_fd_sc_mcu9t5v0__oai32_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai32_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai32.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai32_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai32_1 layout**
diff --git a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_1.schematic.png b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_1.schematic.png
deleted file mode 100644
index 55a96a46..00000000
Binary files a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_1.schematic.png and /dev/null differ
diff --git a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_2.rst b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_2.rst
index 2942d38d..4041e239 100644
--- a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_2.rst
+++ b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai32_2
 
 **gf180mcu_fd_sc_mcu9t5v0__oai32_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai32_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai32.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai32_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai32_2 layout**
diff --git a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_2.schematic.png b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_2.schematic.png
deleted file mode 100644
index 55a96a46..00000000
Binary files a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_2.schematic.png and /dev/null differ
diff --git a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_4.rst b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_4.rst
index 151de589..4807b476 100644
--- a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_4.rst
+++ b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai32_4
 
 **gf180mcu_fd_sc_mcu9t5v0__oai32_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai32_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai32.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai32_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai32_4 layout**
diff --git a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_4.schematic.png b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_4.schematic.png
deleted file mode 100644
index 55a96a46..00000000
Binary files a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_4.schematic.png and /dev/null differ
diff --git a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33.schematic.svg b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33.schematic.svg
new file mode 100644
index 00000000..c233516b
--- /dev/null
+++ b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33.schematic.svg
@@ -0,0 +1,23 @@
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+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
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+.splitjoinBody {
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id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai33.v:52$3"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai33.v:52$3"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(209,219.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai33.v:52$4"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai33.v:52$4"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,272)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai33.v:0$10"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path 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class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai33.v:0$6"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai33.v:0$7"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai33.v:0$7"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai33.v:0$7"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(144,152)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai33.v:0$8"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai33.v:0$8"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai33.v:0$8"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,207)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai33.v:0$9"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai33.v:0$9"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai33.v:0$9"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="or" transform="translate(274,42)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai33.v:54$5"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai33.v:54$5"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(78,337)" s:width="30" s:height="20" id="cell_B3"><text x="15" y="-4" class="nodelabel cell_B3" s:attribute="ref">B3</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_B3"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,272)" s:width="30" s:height="20" id="cell_B2"><text x="15" y="-4" class="nodelabel cell_B2" s:attribute="ref">B2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_B2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,207)" s:width="30" s:height="20" id="cell_B1"><text x="15" y="-4" class="nodelabel cell_B1" s:attribute="ref">B1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_B1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(339,44.5)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(78,152)" s:width="30" s:height="20" id="cell_A3"><text x="15" y="-4" class="nodelabel cell_A3" s:attribute="ref">A3</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A3"/><g s:x="30" s:y="10" s:pid="Y"/></g><line x1="105" x2="143.66666666666666" y1="32" y2="32" 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\ No newline at end of file
diff --git a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_1.rst b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_1.rst
index e04c0d5f..3d9b7314 100644
--- a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_1.rst
+++ b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai33_1
 
 **gf180mcu_fd_sc_mcu9t5v0__oai33_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai33_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai33.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai33_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai33_1 layout**
diff --git a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_1.schematic.png b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_1.schematic.png
deleted file mode 100644
index bfc83f1b..00000000
Binary files a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_1.schematic.png and /dev/null differ
diff --git a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_2.rst b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_2.rst
index 8870c1e6..52de455a 100644
--- a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_2.rst
+++ b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai33_2
 
 **gf180mcu_fd_sc_mcu9t5v0__oai33_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai33_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai33.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai33_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai33_2 layout**
diff --git a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_2.schematic.png b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_2.schematic.png
deleted file mode 100644
index bfc83f1b..00000000
Binary files a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_2.schematic.png and /dev/null differ
diff --git a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_4.rst b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_4.rst
index 8a92628d..026e4fb8 100644
--- a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_4.rst
+++ b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__oai33_4
 
 **gf180mcu_fd_sc_mcu9t5v0__oai33_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai33_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai33.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai33_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai33_4 layout**
diff --git a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_4.schematic.png b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_4.schematic.png
deleted file mode 100644
index bfc83f1b..00000000
Binary files a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_4.schematic.png and /dev/null differ
diff --git a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2.schematic.svg b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2.schematic.svg
new file mode 100644
index 00000000..a3c6976a
--- /dev/null
+++ b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="184" height="119"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="or" transform="translate(77,27)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__or2.v:22$1"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__or2.v:22$1"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(142,29.5)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="79" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="52" y1="97" y2="97" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="52" y1="97" y2="47" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="79" y1="47" y2="47" class="net_3 width_1" style="stroke-width: 1"/><line x1="107" x2="142" y1="39.5" y2="39.5" class="net_4 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_1.rst b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_1.rst
index c1a0d6a1..edfb9d3f 100644
--- a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_1.rst
+++ b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__or2_1
 
 **gf180mcu_fd_sc_mcu9t5v0__or2_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__or2_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__or2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__or2_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__or2_1 layout**
diff --git a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_1.schematic.png b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_1.schematic.png
deleted file mode 100644
index 54517525..00000000
Binary files a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_1.schematic.png and /dev/null differ
diff --git a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_2.rst b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_2.rst
index 32a6b19a..d54e0587 100644
--- a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_2.rst
+++ b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__or2_2
 
 **gf180mcu_fd_sc_mcu9t5v0__or2_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__or2_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__or2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__or2_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__or2_2 layout**
diff --git a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_2.schematic.png b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_2.schematic.png
deleted file mode 100644
index 54517525..00000000
Binary files a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_2.schematic.png and /dev/null differ
diff --git a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_4.rst b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_4.rst
index 6a3dcab6..fc2aef42 100644
--- a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_4.rst
+++ b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__or2_4
 
 **gf180mcu_fd_sc_mcu9t5v0__or2_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__or2_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__or2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__or2_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__or2_4 layout**
diff --git a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_4.schematic.png b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_4.schematic.png
deleted file mode 100644
index 54517525..00000000
Binary files a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_4.schematic.png and /dev/null differ
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new file mode 100644
index 00000000..d8a26d59
--- /dev/null
+++ b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="249" height="129"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="or" transform="translate(77,27)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__or3.v:22$1"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__or3.v:22$1"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="or" transform="translate(142,34.5)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__or3.v:22$2"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__or3.v:22$2"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(77,97)" s:width="30" s:height="20" id="cell_A3"><text x="15" y="-4" class="nodelabel cell_A3" s:attribute="ref">A3</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A3"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(207,37)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="79" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="52" y1="97" y2="97" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="52" y1="97" y2="47" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="79" y1="47" y2="47" class="net_3 width_1" style="stroke-width: 1"/><line x1="107" x2="144" y1="39.5" y2="39.5" class="net_6 width_1" style="stroke-width: 1"/><line x1="107" x2="117" y1="107" y2="107" class="net_4 width_1" style="stroke-width: 1"/><line x1="117" x2="117" y1="107" y2="54.5" class="net_4 width_1" style="stroke-width: 1"/><line x1="117" x2="144" y1="54.5" y2="54.5" class="net_4 width_1" style="stroke-width: 1"/><line x1="172" x2="207" y1="47" y2="47" class="net_5 width_1" style="stroke-width: 1"/></svg>
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diff --git a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_1.rst b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_1.rst
index e111f3f1..a2f3044e 100644
--- a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_1.rst
+++ b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__or3_1
 
 **gf180mcu_fd_sc_mcu9t5v0__or3_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__or3_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__or3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__or3_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__or3_1 layout**
diff --git a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_1.schematic.png b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_1.schematic.png
deleted file mode 100644
index 5914186d..00000000
Binary files a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_1.schematic.png and /dev/null differ
diff --git a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_2.rst b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_2.rst
index 660c05ea..d63819a1 100644
--- a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_2.rst
+++ b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__or3_2
 
 **gf180mcu_fd_sc_mcu9t5v0__or3_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__or3_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__or3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__or3_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__or3_2 layout**
diff --git a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_2.schematic.png b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_2.schematic.png
deleted file mode 100644
index 5914186d..00000000
Binary files a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_2.schematic.png and /dev/null differ
diff --git a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_4.rst b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_4.rst
index 8fef9254..3857427f 100644
--- a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_4.rst
+++ b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__or3_4
 
 **gf180mcu_fd_sc_mcu9t5v0__or3_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__or3_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__or3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__or3_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__or3_4 layout**
diff --git a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_4.schematic.png b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_4.schematic.png
deleted file mode 100644
index 5914186d..00000000
Binary files a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_4.schematic.png and /dev/null differ
diff --git a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4.schematic.svg b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4.schematic.svg
new file mode 100644
index 00000000..2c363ab0
--- /dev/null
+++ b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="314" height="136.5"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="or" transform="translate(77,27)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__or4.v:22$1"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__or4.v:22$1"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="or" transform="translate(142,34.5)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__or4.v:22$2"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__or4.v:22$2"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="or" transform="translate(207,42)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__or4.v:22$3"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__or4.v:22$3"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(77,97)" s:width="30" s:height="20" id="cell_A3"><text x="15" y="-4" class="nodelabel cell_A3" s:attribute="ref">A3</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A3"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(142,104.5)" s:width="30" s:height="20" id="cell_A4"><text x="15" y="-4" class="nodelabel cell_A4" s:attribute="ref">A4</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A4"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(272,44.5)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="79" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="52" y1="97" y2="97" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="52" y1="97" y2="47" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="79" y1="47" y2="47" class="net_3 width_1" style="stroke-width: 1"/><line x1="107" x2="144" y1="39.5" y2="39.5" class="net_7 width_1" style="stroke-width: 1"/><line x1="107" x2="117" y1="107" y2="107" class="net_4 width_1" style="stroke-width: 1"/><line x1="117" x2="117" y1="107" y2="54.5" class="net_4 width_1" style="stroke-width: 1"/><line x1="117" x2="144" y1="54.5" y2="54.5" class="net_4 width_1" style="stroke-width: 1"/><line x1="172" x2="209" y1="47" y2="47" class="net_8 width_1" style="stroke-width: 1"/><line x1="172" x2="182" y1="114.5" y2="114.5" class="net_5 width_1" style="stroke-width: 1"/><line x1="182" x2="182" y1="114.5" y2="62" class="net_5 width_1" style="stroke-width: 1"/><line x1="182" x2="209" y1="62" y2="62" class="net_5 width_1" style="stroke-width: 1"/><line x1="237" x2="272" y1="54.5" y2="54.5" class="net_6 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_1.rst b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_1.rst
index 5149cfed..b44cf167 100644
--- a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_1.rst
+++ b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__or4_1
 
 **gf180mcu_fd_sc_mcu9t5v0__or4_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__or4_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__or4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__or4_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__or4_1 layout**
diff --git a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_1.schematic.png b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_1.schematic.png
deleted file mode 100644
index 0d4d5475..00000000
Binary files a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_1.schematic.png and /dev/null differ
diff --git a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_2.rst b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_2.rst
index 9792b2b2..0eb42aca 100644
--- a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_2.rst
+++ b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__or4_2
 
 **gf180mcu_fd_sc_mcu9t5v0__or4_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__or4_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__or4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__or4_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__or4_2 layout**
diff --git a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_2.schematic.png b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_2.schematic.png
deleted file mode 100644
index 0d4d5475..00000000
Binary files a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_2.schematic.png and /dev/null differ
diff --git a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_4.rst b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_4.rst
index 5b6c6cbf..b847e27a 100644
--- a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_4.rst
+++ b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__or4_4
 
 **gf180mcu_fd_sc_mcu9t5v0__or4_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__or4_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__or4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__or4_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__or4_4 layout**
diff --git a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_4.schematic.png b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_4.schematic.png
deleted file mode 100644
index 0d4d5475..00000000
Binary files a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_4.schematic.png and /dev/null differ
diff --git a/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq.schematic.svg b/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq.schematic.svg
new file mode 100644
index 00000000..963ac411
--- /dev/null
+++ b/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="560" height="294"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
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diff --git a/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_1.rst b/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_1.rst
index 94e4d337..77820387 100644
--- a/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_1.rst
+++ b/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__sdffq_1
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffq_1 layout**
diff --git a/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_2.rst b/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_2.rst
index ebc1d518..17fc34e2 100644
--- a/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_2.rst
+++ b/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__sdffq_2
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffq_2 layout**
diff --git a/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_4.rst b/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_4.rst
index a9f642a6..c505e07b 100644
--- a/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_4.rst
+++ b/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__sdffq_4
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffq_4 layout**
diff --git a/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq.schematic.svg b/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq.schematic.svg
new file mode 100644
index 00000000..62a23b1f
--- /dev/null
+++ b/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq.schematic.svg
@@ -0,0 +1,23 @@
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+}
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+  font-size:10px;
+  font-weight: bold;
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diff --git a/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1.rst b/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1.rst
index 252ae165..6a6ec6b7 100644
--- a/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1.rst
+++ b/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1 layout**
diff --git a/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2.rst b/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2.rst
index d4ab7dbd..3e9442a8 100644
--- a/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2.rst
+++ b/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2 layout**
diff --git a/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4.rst b/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4.rst
index 3470e584..cc713b80 100644
--- a/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4.rst
+++ b/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4 layout**
diff --git a/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq.schematic.svg b/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq.schematic.svg
new file mode 100644
index 00000000..cce0d4aa
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diff --git a/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1.rst b/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1.rst
index ded8867c..7b7a8917 100644
--- a/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1.rst
+++ b/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1 layout**
diff --git a/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2.rst b/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2.rst
index bc385b40..0cb6451a 100644
--- a/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2.rst
+++ b/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2 layout**
diff --git a/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4.rst b/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4.rst
index b11a8e28..5e615ab2 100644
--- a/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4.rst
+++ b/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4 layout**
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new file mode 100644
index 00000000..33197b53
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diff --git a/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1.rst b/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1.rst
index d92a2a19..2de0edc8 100644
--- a/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1.rst
+++ b/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1 layout**
diff --git a/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2.rst b/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2.rst
index a96bdd34..deaabc13 100644
--- a/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2.rst
+++ b/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2 layout**
diff --git a/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4.rst b/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4.rst
index 5554ba6d..63355f57 100644
--- a/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4.rst
+++ b/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4 layout**
diff --git a/cells/tieh/gf180mcu_fd_sc_mcu9t5v0__tieh.rst b/cells/tieh/gf180mcu_fd_sc_mcu9t5v0__tieh.rst
index bbbebb35..da023284 100644
--- a/cells/tieh/gf180mcu_fd_sc_mcu9t5v0__tieh.rst
+++ b/cells/tieh/gf180mcu_fd_sc_mcu9t5v0__tieh.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__tieh
 
 **gf180mcu_fd_sc_mcu9t5v0__tieh schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__tieh.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__tieh.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__tieh schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__tieh layout**
diff --git a/cells/tieh/gf180mcu_fd_sc_mcu9t5v0__tieh.schematic.png b/cells/tieh/gf180mcu_fd_sc_mcu9t5v0__tieh.schematic.png
deleted file mode 100644
index c1197425..00000000
Binary files a/cells/tieh/gf180mcu_fd_sc_mcu9t5v0__tieh.schematic.png and /dev/null differ
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new file mode 100644
index 00000000..95fdf51c
--- /dev/null
+++ b/cells/tieh/gf180mcu_fd_sc_mcu9t5v0__tieh.schematic.svg
@@ -0,0 +1,23 @@
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+}
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\ No newline at end of file
diff --git a/cells/tiel/gf180mcu_fd_sc_mcu9t5v0__tiel.rst b/cells/tiel/gf180mcu_fd_sc_mcu9t5v0__tiel.rst
index 6eb0400f..743c5af1 100644
--- a/cells/tiel/gf180mcu_fd_sc_mcu9t5v0__tiel.rst
+++ b/cells/tiel/gf180mcu_fd_sc_mcu9t5v0__tiel.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__tiel
 
 **gf180mcu_fd_sc_mcu9t5v0__tiel schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__tiel.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__tiel.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__tiel schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__tiel layout**
diff --git a/cells/tiel/gf180mcu_fd_sc_mcu9t5v0__tiel.schematic.png b/cells/tiel/gf180mcu_fd_sc_mcu9t5v0__tiel.schematic.png
deleted file mode 100644
index 80d18635..00000000
Binary files a/cells/tiel/gf180mcu_fd_sc_mcu9t5v0__tiel.schematic.png and /dev/null differ
diff --git a/cells/tiel/gf180mcu_fd_sc_mcu9t5v0__tiel.schematic.svg b/cells/tiel/gf180mcu_fd_sc_mcu9t5v0__tiel.schematic.svg
new file mode 100644
index 00000000..11510dd9
--- /dev/null
+++ b/cells/tiel/gf180mcu_fd_sc_mcu9t5v0__tiel.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="120" height="54"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="outputExt" transform="translate(78,22)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="constant" transform="translate(12,22)" s:width="30" s:height="20" id="cell_0"><text x="15" y="-4" class="nodelabel cell_0" s:attribute="ref">0</text><s:alias val="$_constant_"/><rect width="30" height="20" class="cell_0"/><g s:x="31" s:y="10" s:pid="Y"/></g><line x1="43" x2="78" y1="32" y2="32" class="net_0 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2.schematic.svg b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2.schematic.svg
new file mode 100644
index 00000000..9212d2fd
--- /dev/null
+++ b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="315" height="140"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143,12)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__xnor2.v:24$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__xnor2.v:24$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(143,98)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__xnor2.v:36$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__xnor2.v:36$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,43)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__xnor2.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__xnor2.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__xnor2.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,108)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__xnor2.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__xnor2.v:0$5"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__xnor2.v:0$5"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="or" transform="translate(208,90.5)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__xnor2.v:38$3"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__xnor2.v:38$3"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,108)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,43)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(273,93)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="52" y1="53" y2="53" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="52" y1="53" y2="21" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="118" y1="21" y2="21" class="net_3 width_1" style="stroke-width: 1"/><line x1="118" x2="118" y1="21" y2="17" class="net_3 width_1" style="stroke-width: 1"/><circle cx="52" cy="53" r="2" style="fill:#000" class="net_3 width_1"/><line x1="118" x2="143" y1="17" y2="17" class="net_3 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="53" y2="53" class="net_3 width_1" style="stroke-width: 1"/><line x1="42" x2="62" y1="118" y2="118" class="net_2 width_1" style="stroke-width: 1"/><line x1="62" x2="62" y1="118" y2="32" class="net_2 width_1" style="stroke-width: 1"/><circle cx="62" cy="118" r="2" style="fill:#000" class="net_2 width_1"/><line x1="62" x2="143" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="118" y2="118" class="net_2 width_1" style="stroke-width: 1"/><line x1="105" x2="118" y1="53" y2="53" class="net_6 width_1" style="stroke-width: 1"/><line x1="118" x2="118" y1="53" y2="103" class="net_6 width_1" style="stroke-width: 1"/><line x1="118" x2="143" y1="103" y2="103" class="net_6 width_1" style="stroke-width: 1"/><line x1="105" x2="143" y1="118" y2="118" class="net_7 width_1" style="stroke-width: 1"/><line x1="173" x2="183" y1="24.5" y2="24.5" class="net_5 width_1" style="stroke-width: 1"/><line x1="183" x2="183" y1="24.5" y2="95.5" class="net_5 width_1" style="stroke-width: 1"/><line x1="183" x2="210" y1="95.5" y2="95.5" class="net_5 width_1" style="stroke-width: 1"/><line x1="173" x2="210" y1="110.5" y2="110.5" class="net_8 width_1" style="stroke-width: 1"/><line x1="238" x2="273" y1="103" y2="103" class="net_4 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file
diff --git a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_1.rst b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_1.rst
index 2511c049..8766a646 100644
--- a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_1.rst
+++ b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__xnor2_1
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor2_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor2_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor2_1 layout**
diff --git a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_1.schematic.png b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_1.schematic.png
deleted file mode 100644
index 16d11d59..00000000
Binary files a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_1.schematic.png and /dev/null differ
diff --git a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_2.rst b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_2.rst
index 25ce5417..33b6b697 100644
--- a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_2.rst
+++ b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__xnor2_2
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor2_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor2_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xnor2_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor2_2 layout**
diff --git a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_2.schematic.png b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_2.schematic.png
deleted file mode 100644
index 16d11d59..00000000
Binary files a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_2.schematic.png and /dev/null differ
diff --git a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_4.rst b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_4.rst
index 9c40c9c5..95ae7d27 100644
--- a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_4.rst
+++ b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__xnor2_4
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor2_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor2_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xnor2_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor2_4 layout**
diff --git a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_4.schematic.png b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_4.schematic.png
deleted file mode 100644
index 16d11d59..00000000
Binary files a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_4.schematic.png and /dev/null differ
diff --git a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3.schematic.svg b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3.schematic.svg
new file mode 100644
index 00000000..10ce9fa7
--- /dev/null
+++ b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3.schematic.svg
@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="516" height="324.5"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(148.66666666666666,43)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__xnor3.v:28$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__xnor3.v:28$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(214,12)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__xnor3.v:28$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__xnor3.v:28$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(148.66666666666666,113)" s:width="30" s:height="25" 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diff --git a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_1.rst b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_1.rst
index 2e7cb988..de75ecce 100644
--- a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_1.rst
+++ b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__xnor3_1
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor3_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor3_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xnor3_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor3_1 layout**
diff --git a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_1.schematic.png b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_1.schematic.png
deleted file mode 100644
index a5470305..00000000
Binary files a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_1.schematic.png and /dev/null differ
diff --git a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_2.rst b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_2.rst
index 221737e8..d4703de8 100644
--- a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_2.rst
+++ b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__xnor3_2
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor3_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor3_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xnor3_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor3_2 layout**
diff --git a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_2.schematic.png b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_2.schematic.png
deleted file mode 100644
index a5470305..00000000
Binary files a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_2.schematic.png and /dev/null differ
diff --git a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_4.rst b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_4.rst
index 50e3fb25..c8bf6b50 100644
--- a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_4.rst
+++ b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__xnor3_4
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor3_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor3_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xnor3_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor3_4 layout**
diff --git a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_4.schematic.png b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_4.schematic.png
deleted file mode 100644
index a5470305..00000000
Binary files a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_4.schematic.png and /dev/null differ
diff --git a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2.schematic.svg b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2.schematic.svg
new file mode 100644
index 00000000..c928259f
--- /dev/null
+++ b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2.schematic.svg
@@ -0,0 +1,23 @@
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+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
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diff --git a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_1.rst b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_1.rst
index d57880a7..9a843000 100644
--- a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_1.rst
+++ b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__xor2_1
 
 **gf180mcu_fd_sc_mcu9t5v0__xor2_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xor2_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xor2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xor2_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xor2_1 layout**
diff --git a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_1.schematic.png b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_1.schematic.png
deleted file mode 100644
index 47b7a37d..00000000
Binary files a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_1.schematic.png and /dev/null differ
diff --git a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_2.rst b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_2.rst
index 5859815f..d8906d73 100644
--- a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_2.rst
+++ b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__xor2_2
 
 **gf180mcu_fd_sc_mcu9t5v0__xor2_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xor2_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xor2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xor2_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xor2_2 layout**
diff --git a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_2.schematic.png b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_2.schematic.png
deleted file mode 100644
index 47b7a37d..00000000
Binary files a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_2.schematic.png and /dev/null differ
diff --git a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_4.rst b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_4.rst
index f2c922a3..7ebaef18 100644
--- a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_4.rst
+++ b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__xor2_4
 
 **gf180mcu_fd_sc_mcu9t5v0__xor2_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xor2_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xor2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xor2_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xor2_4 layout**
diff --git a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_4.schematic.png b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_4.schematic.png
deleted file mode 100644
index 47b7a37d..00000000
Binary files a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_4.schematic.png and /dev/null differ
diff --git a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3.schematic.svg b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3.schematic.svg
new file mode 100644
index 00000000..6f57ec1c
--- /dev/null
+++ b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3.schematic.svg
@@ -0,0 +1,23 @@
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+  stroke:#000;
+  fill:none;
+}
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+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
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diff --git a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_1.rst b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_1.rst
index 701cbb90..76fb7711 100644
--- a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_1.rst
+++ b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_1.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__xor3_1
 
 **gf180mcu_fd_sc_mcu9t5v0__xor3_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xor3_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xor3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xor3_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xor3_1 layout**
diff --git a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_1.schematic.png b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_1.schematic.png
deleted file mode 100644
index a5600406..00000000
Binary files a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_1.schematic.png and /dev/null differ
diff --git a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_2.rst b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_2.rst
index cdb7b4fe..9ccafc76 100644
--- a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_2.rst
+++ b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_2.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__xor3_2
 
 **gf180mcu_fd_sc_mcu9t5v0__xor3_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xor3_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xor3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xor3_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xor3_2 layout**
diff --git a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_2.schematic.png b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_2.schematic.png
deleted file mode 100644
index a5600406..00000000
Binary files a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_2.schematic.png and /dev/null differ
diff --git a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_4.rst b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_4.rst
index b1460c5a..b827e944 100644
--- a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_4.rst
+++ b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_4.rst
@@ -9,7 +9,7 @@ gf180mcu_fd_sc_mcu9t5v0__xor3_4
 
 **gf180mcu_fd_sc_mcu9t5v0__xor3_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xor3_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xor3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xor3_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xor3_4 layout**
diff --git a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_4.schematic.png b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_4.schematic.png
deleted file mode 100644
index a5600406..00000000
Binary files a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_4.schematic.png and /dev/null differ