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Makefile.config
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###############################################################################
#
# Copyright 2014, ACSE & CADIEEL
# ACSE : http://www.sase.com.ar/asociacion-civil-sistemas-embebidos/ciaa/
# CADIEEL: http://www.cadieel.org.ar
# Copyright 2015, Mariano Cerdeiro
# Copyright 2015, Juan Cecconi (Numetron, UTN-FRBA)
# Copyright 2016, Franco Bucafusco
# All rights reserved.
#
# This file is part of CIAA Firmware.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice,
# this list of conditions and the following disclaimer in the documentation
# and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
###############################################################################
######################## DO NOT CHANGE THIS FILE ##############################
###############################################################################
# You dont have to change this file, never.
#
# Copy this file to Makefile.mine and set the variables.
#
# Makefile.mine will be included by the root make file but ignored by
# .gitignore.
#
# You can also remove this commentas lines.
#
# Please take into account to check and compare your Makefile.mine every time
# that Makefile.config is updated to be sure that you dont need to define new
# variables.
#
###############################################################################
# ARCH, CPUTYPE and CPU following are supported
# +--------------+---------------+----------------+--------------+------------------+
# | ARCH | CPUTYPE | CPU | COMPILER | BOARD |
# +--------------+---------------+----------------+--------------+------------------+
# | x86 | ia32 | | gcc | ciaa_sim_ia32 |
# | | ia64 | | | ciaa_sim_ia64 |
# +--------------+---------------+----------------+--------------+------------------+
# | cortexM4 | lpc43xx | lpc4337 | gcc | edu_ciaa_nxp |
# | | | | | ciaa_nxp |
# | | k60_120 | mk60fx512vlq15 | gcc | ciaa_fsl |
# +--------------+---------------+----------------+--------------+------------------+
# | mips | pic32 | pic32mz | gcc | ciaa_pic |
# +--------------+---------------+----------------+--------------+------------------+
# | msp430 | msp430f5x_6x | msp430f5529 | gcc | msp_exp430f5529 |
# +--------------+---------------+----------------+--------------+------------------+
#
# if you define the BOARD the others parameters are optional.
#ARCH ?= x86
#CPUTYPE ?= ia32
#CPU ?= none
#COMPILER ?= gcc
#BOARD ?= edu_ciaa_nxp
#BOARD ?= msp_exp430f5529
BOARD ?= ciaa_sim_ia32
###############################################################################
# rtostests options
#
# RTOSTESTS_DEBUG_CTESTS = 1 #, set debug flag in ctest.pl
# RTOSTESTS_CLEAN_GENERATE = 0 #, skips make clean and generate (use it only if you are running a single sub test case, but after generating RTOS at least one time!)
# RTOSTESTS_CTEST = 'ctest_tm_01:Test Sequence 1' #, test case name, based on ctestcases.cfg (use it for single ctest)
# RTOSTESTS_SUBTEST = 'full-preemptive' #, sub test case name, based on ctestcases.cfg or empty to start running from this test to the end
# RTOSTESTS_RAM_EXEC = 1 # Run all the test in RAM saving Flash cycles.
# Projects
#
# Available projects are:
# examples/adc_dac (example using adc and dac)
# examples/blinking (simple example with rtos and posix)
# examples/blinking_echo (example with rtos and posix)
# examples/blinking_modbus_slave (example with rtos, posix and using modbus slave)
# examples/blinking_modbus_master (example with rtos, posix and using modbus master)
# examples/blinking_lwip (blinking and tcp echo using lwip)
# examples/rtcs_example (example using real time control system module)
# examples/rtos_example (example using rtos)
#
PROJECT_PATH ?= examples$(DS)blinking