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review if the uvm driver is correct with changing the clock polarity and phase #3

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M0stafaRady opened this issue May 14, 2024 · 0 comments
Open

review if the uvm driver is correct with changing the clock polarity and phase #3

M0stafaRady opened this issue May 14, 2024 · 0 comments
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I implemented the driver and the monitor to drive the byte with which would be read correctly with the current RTL but I'm not sure of that is the correct protocol for phase and polarity shifting. If is implemented incorrectly in the RTL, the uvm verification will not detect it.
@M0stafaRady M0stafaRady self-assigned this May 14, 2024
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