diff --git a/hdl/rtl/EF_SPI.v b/hdl/rtl/EF_SPI.v
index 036c0bd..9633816 100644
--- a/hdl/rtl/EF_SPI.v
+++ b/hdl/rtl/EF_SPI.v
@@ -85,13 +85,13 @@ module EF_SPI #(parameter
 
     assign      csb = ~ss;
     
-    aucohl_ped done_ed (
+    ef_util_ped done_ed (
         .clk(clk),
         .in(done),
         .out(done_pe)
     );
 
-    aucohl_fifo #(
+    ef_util_fifo #(
         .DW(FDW), 
         .AW(FAW)
     ) rx_fifo (
@@ -107,7 +107,7 @@ module EF_SPI #(parameter
         .level(rx_level)    
     );
 
-    aucohl_fifo #(
+    ef_util_fifo #(
         .DW(FDW), 
         .AW(FAW)
     ) tx_fifo (
diff --git a/verify/uvm-python/Makefile b/verify/uvm-python/Makefile
index 6c881b7..f2f77d8 100644
--- a/verify/uvm-python/Makefile
+++ b/verify/uvm-python/Makefile
@@ -4,7 +4,7 @@ MODULE   ?= top_module
 AHB_FILES ?= $(PWD)/../../hdl/rtl/bus_wrappers/EF_SPI_AHBL.v
 APB_FILES ?= $(PWD)/../../hdl/rtl/bus_wrappers/EF_SPI_APB.v
 WB_FILES ?=$(PWD)/../../hdl/rtl/bus_wrappers/EF_SPI_WB.v
-HDL_FILES ?= $(PWD)/../../ip/EF_IP_UTIL/rtl/aucohl_lib.v $(PWD)/../../ip/EF_IP_UTIL/rtl/aucohl_rtl.vh  $(PWD)/../../hdl/rtl/spi_master.v $(PWD)/../../hdl/rtl/EF_SPI.v 
+HDL_FILES ?= $(PWD)/../../ip/EF_IP_UTIL/hdl/ef_util_lib.v  $(PWD)/../../hdl/rtl/spi_master.v $(PWD)/../../hdl/rtl/EF_SPI.v 
 
 VERILOG_SOURCES ?=  $(PWD)/top.v $(AHB_FILES) $(APB_FILES) $(WB_FILES) $(HDL_FILES)
 RTL_MACROS += ""
diff --git a/verify/uvm-python/test_lib.py b/verify/uvm-python/test_lib.py
index 3e2ab11..5235a3f 100644
--- a/verify/uvm-python/test_lib.py
+++ b/verify/uvm-python/test_lib.py
@@ -69,7 +69,7 @@ async def module_top(dut):
     UVMRoot().clp.get_arg_values("+TEST_PATH=", test_path)
     test_path = test_path[0]
     await run_test()
-    coverage_db.export_to_yaml(filename=f"{test_path}/coverage.yalm")
+    coverage_db.export_to_yaml(filename=f"{test_path}/coverage.yaml")
     # profiler.disable()
     # profiler.dump_stats("profile_result.prof")