processor.py

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"""
This file defines a single core out of order processor for X86.

The width, LSQ depth, and reorder buffer entries are parameterized. Other
configuration parameters have default values. See 
`gem5/src/cpu/o3/BaseO3CPU.py` for defaults
"""

from gem5.components.processors.base_cpu_core import BaseCPUCore
from gem5.components.processors.base_cpu_processor import BaseCPUProcessor
from gem5.isas import ISA
from gem5.components.processors.cpu_types import CPUTypes

from m5.objects import X86O3CPU


class OutOfOrderCore(BaseCPUCore):
    """
    An out of order core for X86.
    The LSQ depth (split equally between loads and stores), the width of the
    core, and the number of entries in the reorder buffer are configurable.
    """

    def __init__(self, core_id, lsq_depth, width, rob_entries):
        super().__init__(core=X86O3CPU(cpu_id=core_id), isa=ISA.X86)
        self.core.fetchWidth = width
        self.core.decodeWidth = width
        self.core.renameWidth = width
        self.core.dispatchWidth = width
        self.core.wbWidth = width
        self.core.issueWidth = width
        self.core.commitWidth = width
        self.core.squashWidth = width

        self.core.LQEntries = lsq_depth / 2
        self.core.SQEntries = lsq_depth / 2

        self.core.numROBEntries = rob_entries


class OutOfOrderProcessor(BaseCPUProcessor):
    """
    A single core out of order processor for X86.
    The LSQ depth (split equally between loads and stores), the width of the
    core, and the number of entries in the reorder buffer are configurable.
    """

    def __init__(self, lsq_depth=32, width=4, rob_entries=128):
        self._cpu_type = CPUTypes.O3
        super().__init__(
            cores=[
                OutOfOrderCore(
                    core_id=0,
                    lsq_depth=lsq_depth,
                    width=width,
                    rob_entries=rob_entries,
                )
            ]
        )