Initialize (FPGA) memory in Chisel 6

[schoeberl]

Type of issue: Bug Report

Please provide the steps to reproduce the problem:

Initializing memory is broken now. See for an error: https://github.com/schoeberl/chisel-book/actions/runs/11708082480/job/32608967721

The code is here: https://github.com/schoeberl/chisel-book/blob/6ee398bd61bf8cdee02abcd780a2035b8cff4d1a/src/main/scala/memory.scala#L107-L130

and the test at: https://github.com/schoeberl/chisel-book/blob/6ee398bd61bf8cdee02abcd780a2035b8cff4d1a/src/test/scala/MemoryTest.scala#L118-L140

You can also reproduce it by running sbt test in the chisel-book repo, which is currently committed to version 6.

[donaldkuck]

It is a bug of chiseltest, because chiseltest does not support LoadMemoryAnnotation. see below log:

[info] compiling 1 Scala source to /home/zsj/workspace/chisel-book/target/scala-2.13/classes ...
[WARNING] Unsupported annotation: LoadMemoryAnnotation
 Please report this issue at https://github.com/ucb-bar/chiseltest/issues

relevant codes: https://github.com/ucb-bar/chiseltest/blob/6.x/src/main/scala/chiseltest/simulator/ChiselBridge.scala#L159

But we can use loadMemoryFromFileInline instead, because chisetest supports LoadMemoryInlineAnnotation.

I will submit the modified code to your repository.