From 1d4bd277dd84c928835343d02729268848f6c53d Mon Sep 17 00:00:00 2001
From: Luke Mahowald <Luke.Mahowald@amd.com>
Date: Thu, 19 Sep 2024 18:22:48 -0400
Subject: [PATCH] SS changes made to resolve synthesis errors

---
 src/mcu/rtl/caliptra_mcu_top.sv               |   2 +-
 .../veer_el2/rtl/rev1p0/dbg/mcu_el2_dbg.sv    |  60 +++---
 .../rtl/rev1p0/dec/mcu_el2_dec_decode_ctl.sv  |  54 +++---
 .../rtl/rev1p0/dec/mcu_el2_dec_gpr_ctl.sv     |   2 +-
 .../rtl/rev1p0/dec/mcu_el2_dec_pmp_ctl.sv     |   4 +-
 .../rtl/rev1p0/dec/mcu_el2_dec_tlu_ctl.sv     | 172 +++++++++---------
 .../rtl/rev1p0/dec/mcu_el2_dec_trigger.sv     |   2 +-
 .../veer_el2/rtl/rev1p0/exu/mcu_el2_exu.sv    |  20 +-
 .../rtl/rev1p0/exu/mcu_el2_exu_alu_ctl.sv     |   6 +-
 .../rtl/rev1p0/exu/mcu_el2_exu_div_ctl.sv     |  62 +++----
 .../rtl/rev1p0/exu/mcu_el2_exu_mul_ctl.sv     |   6 +-
 .../veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu.sv    |   2 +-
 .../rtl/rev1p0/ifu/mcu_el2_ifu_aln_ctl.sv     |  30 +--
 .../rtl/rev1p0/ifu/mcu_el2_ifu_bp_ctl.sv      |  22 +--
 .../rtl/rev1p0/ifu/mcu_el2_ifu_ic_mem.sv      |  84 ++++-----
 .../rtl/rev1p0/ifu/mcu_el2_ifu_iccm_mem.sv    |  24 +--
 .../rtl/rev1p0/ifu/mcu_el2_ifu_ifc_ctl.sv     |   6 +-
 .../rtl/rev1p0/ifu/mcu_el2_ifu_mem_ctl.sv     | 102 +++++------
 .../rtl/rev1p0/lib/mcu_ahb_to_axi4.sv         |  36 ++--
 .../rtl/rev1p0/lib/mcu_axi4_to_ahb.sv         |  54 +++---
 .../veer_el2/rtl/rev1p0/lib/mcu_beh_lib.sv    |   6 +-
 .../veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu.sv    |   4 +-
 .../rtl/rev1p0/lsu/mcu_el2_lsu_addrcheck.sv   |  10 +-
 .../rtl/rev1p0/lsu/mcu_el2_lsu_bus_buffer.sv  | 144 +++++++--------
 .../rtl/rev1p0/lsu/mcu_el2_lsu_bus_intf.sv    |   6 +-
 .../rtl/rev1p0/lsu/mcu_el2_lsu_clkdomain.sv   |  26 +--
 .../rtl/rev1p0/lsu/mcu_el2_lsu_dccm_ctl.sv    |  44 ++---
 .../rtl/rev1p0/lsu/mcu_el2_lsu_dccm_mem.sv    |   4 +-
 .../rtl/rev1p0/lsu/mcu_el2_lsu_ecc.sv         |  24 +--
 .../rtl/rev1p0/lsu/mcu_el2_lsu_lsc_ctl.sv     |  66 +++----
 .../rtl/rev1p0/lsu/mcu_el2_lsu_stbuf.sv       |  14 +-
 .../rtl/rev1p0/lsu/mcu_el2_lsu_trigger.sv     |   2 +-
 .../veer_el2/rtl/rev1p0/mcu_common_defines.vh |   8 +-
 .../veer_el2/rtl/rev1p0/mcu_el2_dma_ctrl.sv   |  80 ++++----
 .../veer_el2/rtl/rev1p0/mcu_el2_mem.sv        |   2 +-
 .../veer_el2/rtl/rev1p0/mcu_el2_pic_ctrl.sv   |  52 +++---
 .../veer_el2/rtl/rev1p0/mcu_el2_veer.sv       |   8 +-
 37 files changed, 625 insertions(+), 625 deletions(-)

diff --git a/src/mcu/rtl/caliptra_mcu_top.sv b/src/mcu/rtl/caliptra_mcu_top.sv
index cfa9d7e..aafb571 100755
--- a/src/mcu/rtl/caliptra_mcu_top.sv
+++ b/src/mcu/rtl/caliptra_mcu_top.sv
@@ -109,7 +109,7 @@ module caliptra_mcu_top
     input logic                        scan_mode
 );
 
-    `include "mcu_common_defines.sv"
+    `include "mcu_common_defines.vh"
 
     localparam NUM_INTR = `MCU_RV_PIC_TOTAL_INT; // 31
     localparam TOTAL_OBF_KEY_BITS = `CLP_OBF_KEY_DWORDS * 32;
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/dbg/mcu_el2_dbg.sv b/src/riscv_core/veer_el2/rtl/rev1p0/dbg/mcu_el2_dbg.sv
index 0e07514..a5eff87 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/dbg/mcu_el2_dbg.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/dbg/mcu_el2_dbg.sv
@@ -264,8 +264,8 @@ import mcu_el2_pkg::*;
    // used for the system bus
    assign sb_free_clken = dmi_reg_en | execute_command | sb_state_en | (sb_state != SBIDLE) | clk_override;
 
-   rvoclkhdr dbg_free_cgc    (.en(dbg_free_clken), .l1clk(dbg_free_clk), .*);
-   rvoclkhdr sb_free_cgc     (.en(sb_free_clken), .l1clk(sb_free_clk), .*);
+   mcu_rvoclkhdr dbg_free_cgc    (.en(dbg_free_clken), .l1clk(dbg_free_clk), .*);
+   mcu_rvoclkhdr sb_free_cgc     (.en(sb_free_clken), .l1clk(sb_free_clk), .*);
 
    // end clocking section
 
@@ -274,7 +274,7 @@ import mcu_el2_pkg::*;
    assign dbg_core_rst_l = ~dmcontrol_reg[1] | scan_mode;
 
    // synchronize the rst
-   rvsyncss #(1) rstl_syncff (.din(rst_l), .dout(rst_l_sync), .clk(free_clk), .rst_l(dbg_rst_l));
+   mcu_rvsyncss #(1) rstl_syncff (.din(rst_l), .dout(rst_l_sync), .clk(free_clk), .rst_l(dbg_rst_l));
 
    // system bus register
    // sbcs[31:29], sbcs - [22]:sbbusyerror, [21]: sbbusy, [20]:sbreadonaddr, [19:17]:sbaccess, [16]:sbautoincrement, [15]:sbreadondata, [14:12]:sberror, sbsize=32, 128=0, 64/32/16/8 are legal
@@ -288,12 +288,12 @@ import mcu_el2_pkg::*;
                                          (sbcs_reg[21] & dmi_reg_en & ((dmi_reg_wr_en & (dmi_reg_addr == 7'h39)) | (dmi_reg_addr == 7'h3c) | (dmi_reg_addr == 7'h3d)));
    assign        sbcs_sbbusyerror_din = ~(sbcs_wren & dmi_reg_wdata[22]);   // Clear when writing one
 
-   rvdffs #(1) sbcs_sbbusyerror_reg  (.din(sbcs_sbbusyerror_din),  .dout(sbcs_reg[22]),    .en(sbcs_sbbusyerror_wren), .rst_l(dbg_dm_rst_l), .clk(sb_free_clk));
-   rvdffs #(1) sbcs_sbbusy_reg       (.din(sbcs_sbbusy_din),       .dout(sbcs_reg[21]),    .en(sbcs_sbbusy_wren),      .rst_l(dbg_dm_rst_l), .clk(sb_free_clk));
-   rvdffs #(1) sbcs_sbreadonaddr_reg (.din(dmi_reg_wdata[20]),     .dout(sbcs_reg[20]),    .en(sbcs_wren),             .rst_l(dbg_dm_rst_l), .clk(sb_free_clk));
-   rvdffs #(5) sbcs_misc_reg         (.din({dmi_reg_wdata[19],~dmi_reg_wdata[18],dmi_reg_wdata[17:15]}),
+   mcu_rvdffs #(1) sbcs_sbbusyerror_reg  (.din(sbcs_sbbusyerror_din),  .dout(sbcs_reg[22]),    .en(sbcs_sbbusyerror_wren), .rst_l(dbg_dm_rst_l), .clk(sb_free_clk));
+   mcu_rvdffs #(1) sbcs_sbbusy_reg       (.din(sbcs_sbbusy_din),       .dout(sbcs_reg[21]),    .en(sbcs_sbbusy_wren),      .rst_l(dbg_dm_rst_l), .clk(sb_free_clk));
+   mcu_rvdffs #(1) sbcs_sbreadonaddr_reg (.din(dmi_reg_wdata[20]),     .dout(sbcs_reg[20]),    .en(sbcs_wren),             .rst_l(dbg_dm_rst_l), .clk(sb_free_clk));
+   mcu_rvdffs #(5) sbcs_misc_reg         (.din({dmi_reg_wdata[19],~dmi_reg_wdata[18],dmi_reg_wdata[17:15]}),
                                       .dout(sbcs_reg_int[19:15]), .en(sbcs_wren),             .rst_l(dbg_dm_rst_l), .clk(sb_free_clk));
-   rvdffs #(3) sbcs_error_reg        (.din(sbcs_sberror_din[2:0]), .dout(sbcs_reg[14:12]), .en(sbcs_sberror_wren),     .rst_l(dbg_dm_rst_l), .clk(sb_free_clk));
+   mcu_rvdffs #(3) sbcs_error_reg        (.din(sbcs_sberror_din[2:0]), .dout(sbcs_reg[14:12]), .en(sbcs_sberror_wren),     .rst_l(dbg_dm_rst_l), .clk(sb_free_clk));
 
    assign sbcs_unaligned =    ((sbcs_reg[19:17] == 3'b001) &  sbaddress0_reg[0]) |
                               ((sbcs_reg[19:17] == 3'b010) &  (|sbaddress0_reg[1:0])) |
@@ -320,15 +320,15 @@ import mcu_el2_pkg::*;
    assign        sbdata1_din[31:0]   = ({32{sbdata1_reg_wren0}} & dmi_reg_wdata[31:0]) |
                                        ({32{sbdata1_reg_wren1}} & sb_bus_rdata[63:32]);
 
-   rvdffe #(32)    dbg_sbdata0_reg    (.*, .din(sbdata0_din[31:0]), .dout(sbdata0_reg[31:0]), .en(sbdata0_reg_wren), .rst_l(dbg_dm_rst_l));
-   rvdffe #(32)    dbg_sbdata1_reg    (.*, .din(sbdata1_din[31:0]), .dout(sbdata1_reg[31:0]), .en(sbdata1_reg_wren), .rst_l(dbg_dm_rst_l));
+   mcu_rvdffe #(32)    dbg_sbdata0_reg    (.*, .din(sbdata0_din[31:0]), .dout(sbdata0_reg[31:0]), .en(sbdata0_reg_wren), .rst_l(dbg_dm_rst_l));
+   mcu_rvdffe #(32)    dbg_sbdata1_reg    (.*, .din(sbdata1_din[31:0]), .dout(sbdata1_reg[31:0]), .en(sbdata1_reg_wren), .rst_l(dbg_dm_rst_l));
 
     // sbaddress
    assign        sbaddress0_reg_wren0   = dmi_reg_en & dmi_reg_wr_en & (dmi_reg_addr == 7'h39);
    assign        sbaddress0_reg_wren    = sbaddress0_reg_wren0 | sbaddress0_reg_wren1;
    assign        sbaddress0_reg_din[31:0]= ({32{sbaddress0_reg_wren0}} & dmi_reg_wdata[31:0]) |
                                            ({32{sbaddress0_reg_wren1}} & (32'(sbaddress0_reg[31:0] + {28'b0,sbaddress0_incr[3:0]})));
-   rvdffe #(32)    dbg_sbaddress0_reg    (.*, .din(sbaddress0_reg_din[31:0]), .dout(sbaddress0_reg[31:0]), .en(sbaddress0_reg_wren), .rst_l(dbg_dm_rst_l));
+   mcu_rvdffe #(32)    dbg_sbaddress0_reg    (.*, .din(sbaddress0_reg_din[31:0]), .dout(sbaddress0_reg[31:0]), .en(sbaddress0_reg_wren), .rst_l(dbg_dm_rst_l));
 
    assign sbreadonaddr_access = dmi_reg_en & dmi_reg_wr_en & (dmi_reg_addr == 7'h39) & sbcs_reg[20];   // if readonaddr is set the next command will start upon writing of addr0
    assign sbreadondata_access = dmi_reg_en & ~dmi_reg_wr_en & (dmi_reg_addr == 7'h3c) & sbcs_reg[15];  // if readondata is set the next command will start upon reading of data0
@@ -342,9 +342,9 @@ import mcu_el2_pkg::*;
    assign dmcontrol_reg[29]   = '0;
    assign dmcontrol_reg[27:2] = '0;
    assign resumereq           = dmcontrol_reg[30] & ~dmcontrol_reg[31] & dmcontrol_wren_Q;
-   rvdffs #(4) dmcontrolff (.din({dmi_reg_wdata[31:30],dmi_reg_wdata[28],dmi_reg_wdata[1]}), .dout({dmcontrol_reg[31:30], dmcontrol_reg[28], dmcontrol_reg[1]}), .en(dmcontrol_wren), .rst_l(dbg_dm_rst_l), .clk(dbg_free_clk));
-   rvdffs #(1) dmcontrol_dmactive_ff (.din(dmi_reg_wdata[0]), .dout(dmcontrol_reg[0]), .en(dmcontrol_wren), .rst_l(dbg_rst_l), .clk(dbg_free_clk));
-   rvdff  #(1) dmcontrol_wrenff(.din(dmcontrol_wren), .dout(dmcontrol_wren_Q), .rst_l(dbg_dm_rst_l), .clk(dbg_free_clk));
+   mcu_rvdffs #(4) dmcontrolff (.din({dmi_reg_wdata[31:30],dmi_reg_wdata[28],dmi_reg_wdata[1]}), .dout({dmcontrol_reg[31:30], dmcontrol_reg[28], dmcontrol_reg[1]}), .en(dmcontrol_wren), .rst_l(dbg_dm_rst_l), .clk(dbg_free_clk));
+   mcu_rvdffs #(1) dmcontrol_dmactive_ff (.din(dmi_reg_wdata[0]), .dout(dmcontrol_reg[0]), .en(dmcontrol_wren), .rst_l(dbg_rst_l), .clk(dbg_free_clk));
+   mcu_rvdff  #(1) dmcontrol_wrenff(.din(dmcontrol_wren), .dout(dmcontrol_wren_Q), .rst_l(dbg_dm_rst_l), .clk(dbg_free_clk));
 
    // dmstatus register bits that are implemented
    // [19:18]-havereset,[17:16]-resume ack, [9:8]-halted, [3:0]-version
@@ -370,9 +370,9 @@ import mcu_el2_pkg::*;
    assign dmstatus_unavail = dmcontrol_reg[1] | ~rst_l_sync;
    assign dmstatus_running = ~(dmstatus_unavail | dmstatus_halted);
 
-   rvdffs  #(1) dmstatus_resumeack_reg  (.din(dmstatus_resumeack_din), .dout(dmstatus_resumeack), .en(dmstatus_resumeack_wren), .rst_l(dbg_dm_rst_l), .clk(dbg_free_clk));
-   rvdff   #(1) dmstatus_halted_reg     (.din(dec_tlu_dbg_halted & ~dec_tlu_mpc_halted_only),     .dout(dmstatus_halted), .rst_l(dbg_dm_rst_l), .clk(dbg_free_clk));
-   rvdffs  #(1) dmstatus_haveresetn_reg (.din(1'b1), .dout(dmstatus_haveresetn), .en(dmstatus_haveresetn_wren), .rst_l(rst_l), .clk(dbg_free_clk));
+   mcu_rvdffs  #(1) dmstatus_resumeack_reg  (.din(dmstatus_resumeack_din), .dout(dmstatus_resumeack), .en(dmstatus_resumeack_wren), .rst_l(dbg_dm_rst_l), .clk(dbg_free_clk));
+   mcu_rvdff   #(1) dmstatus_halted_reg     (.din(dec_tlu_dbg_halted & ~dec_tlu_mpc_halted_only),     .dout(dmstatus_halted), .rst_l(dbg_dm_rst_l), .clk(dbg_free_clk));
+   mcu_rvdffs  #(1) dmstatus_haveresetn_reg (.din(1'b1), .dout(dmstatus_haveresetn), .en(dmstatus_haveresetn_wren), .rst_l(rst_l), .clk(dbg_free_clk));
 
    // haltsum0 register
    assign haltsum0_reg[31:1] = '0;
@@ -410,12 +410,12 @@ import mcu_el2_pkg::*;
                                                                 abstractcs_error_sel6 ? (~dmi_reg_wdata[10:8] & abstractcs_reg[10:8]) :   //W1C
                                                                                         abstractcs_reg[10:8];                             //hold
 
-   rvdffs #(1) dmabstractcs_busy_reg  (.din(abstractcs_busy_din), .dout(abstractcs_reg[12]), .en(abstractcs_busy_wren), .rst_l(dbg_dm_rst_l), .clk(dbg_free_clk));
-   rvdff  #(3) dmabstractcs_error_reg (.din(abstractcs_error_din[2:0]), .dout(abstractcs_reg[10:8]), .rst_l(dbg_dm_rst_l), .clk(dbg_free_clk));
+   mcu_rvdffs #(1) dmabstractcs_busy_reg  (.din(abstractcs_busy_din), .dout(abstractcs_reg[12]), .en(abstractcs_busy_wren), .rst_l(dbg_dm_rst_l), .clk(dbg_free_clk));
+   mcu_rvdff  #(3) dmabstractcs_error_reg (.din(abstractcs_error_din[2:0]), .dout(abstractcs_reg[10:8]), .rst_l(dbg_dm_rst_l), .clk(dbg_free_clk));
 
     // abstract auto reg
    assign abstractauto_reg_wren  = dmi_reg_en & dmi_reg_wr_en & (dmi_reg_addr == 7'h18) & ~abstractcs_reg[12];
-   rvdffs #(2) dbg_abstractauto_reg (.*, .din(dmi_reg_wdata[1:0]), .dout(abstractauto_reg[1:0]), .en(abstractauto_reg_wren), .rst_l(dbg_dm_rst_l), .clk(dbg_free_clk));
+   mcu_rvdffs #(2) dbg_abstractauto_reg (.*, .din(dmi_reg_wdata[1:0]), .dout(abstractauto_reg[1:0]), .en(abstractauto_reg_wren), .rst_l(dbg_dm_rst_l), .clk(dbg_free_clk));
 
    // command register - implemented all the bits in this register
    // command[16] = 1: write, 0: read
@@ -427,9 +427,9 @@ import mcu_el2_pkg::*;
    assign command_transfer_din = (dmi_reg_wdata[31:24] == 8'h0) & dmi_reg_wdata[17];
    assign command_din[31:16] = {dmi_reg_wdata[31:24],1'b0,dmi_reg_wdata[22:19],command_postexec_din,command_transfer_din, dmi_reg_wdata[16]};
    assign command_din[15:0] =  command_wren ? dmi_reg_wdata[15:0] : dbg_cmd_next_addr[15:0];
-   rvdff  #(1)  execute_commandff   (.*, .din(execute_command_ns), .dout(execute_command), .clk(dbg_free_clk), .rst_l(dbg_dm_rst_l));
-   rvdffe #(16) dmcommand_reg       (.*, .din(command_din[31:16]), .dout(command_reg[31:16]), .en(command_wren), .rst_l(dbg_dm_rst_l));
-   rvdffe #(16) dmcommand_regno_reg (.*, .din(command_din[15:0]),  .dout(command_reg[15:0]),  .en(command_regno_wren), .rst_l(dbg_dm_rst_l));
+   mcu_rvdff  #(1)  execute_commandff   (.*, .din(execute_command_ns), .dout(execute_command), .clk(dbg_free_clk), .rst_l(dbg_dm_rst_l));
+   mcu_rvdffe #(16) dmcommand_reg       (.*, .din(command_din[31:16]), .dout(command_reg[31:16]), .en(command_wren), .rst_l(dbg_dm_rst_l));
+   mcu_rvdffe #(16) dmcommand_regno_reg (.*, .din(command_din[15:0]),  .dout(command_reg[15:0]),  .en(command_regno_wren), .rst_l(dbg_dm_rst_l));
 
   // data0 reg
    assign data0_reg_wren0   = (dmi_reg_en & dmi_reg_wr_en & (dmi_reg_addr == 7'h4) & (dbg_state == HALTED) & ~abstractcs_reg[12]);
@@ -440,7 +440,7 @@ import mcu_el2_pkg::*;
                               ({32{data0_reg_wren1}} & core_dbg_rddata[31:0]) |
                               ({32{data0_reg_wren2}} & sb_bus_rdata[31:0]);
 
-   rvdffe #(32) dbg_data0_reg (.*, .din(data0_din[31:0]), .dout(data0_reg[31:0]), .en(data0_reg_wren), .rst_l(dbg_dm_rst_l));
+   mcu_rvdffe #(32) dbg_data0_reg (.*, .din(data0_din[31:0]), .dout(data0_reg[31:0]), .en(data0_reg_wren), .rst_l(dbg_dm_rst_l));
 
    // data 1
    assign data1_reg_wren0   = (dmi_reg_en & dmi_reg_wr_en & (dmi_reg_addr == 7'h5) & (dbg_state == HALTED) & ~abstractcs_reg[12]);
@@ -450,10 +450,10 @@ import mcu_el2_pkg::*;
    assign data1_din[31:0]   = ({32{data1_reg_wren0}} & dmi_reg_wdata[31:0]) |
                               ({32{data1_reg_wren1}} & dbg_cmd_next_addr[31:0]);
 
-   rvdffe #(32)    dbg_data1_reg    (.*, .din(data1_din[31:0]), .dout(data1_reg[31:0]), .en(data1_reg_wren), .rst_l(dbg_dm_rst_l));
+   mcu_rvdffe #(32)    dbg_data1_reg    (.*, .din(data1_din[31:0]), .dout(data1_reg[31:0]), .en(data1_reg_wren), .rst_l(dbg_dm_rst_l));
 
-   rvdffs #(1) sb_abmem_cmd_doneff  (.din(sb_abmem_cmd_done_in),  .dout(sb_abmem_cmd_done),  .en(sb_abmem_cmd_done_en),  .clk(dbg_free_clk), .rst_l(dbg_dm_rst_l), .*);
-   rvdffs #(1) sb_abmem_data_doneff (.din(sb_abmem_data_done_in), .dout(sb_abmem_data_done), .en(sb_abmem_data_done_en), .clk(dbg_free_clk), .rst_l(dbg_dm_rst_l), .*);
+   mcu_rvdffs #(1) sb_abmem_cmd_doneff  (.din(sb_abmem_cmd_done_in),  .dout(sb_abmem_cmd_done),  .en(sb_abmem_cmd_done_en),  .clk(dbg_free_clk), .rst_l(dbg_dm_rst_l), .*);
+   mcu_rvdffs #(1) sb_abmem_data_doneff (.din(sb_abmem_data_done_in), .dout(sb_abmem_data_done), .en(sb_abmem_data_done_en), .clk(dbg_free_clk), .rst_l(dbg_dm_rst_l), .*);
 
    // FSM to control the debug mode entry, command send/recieve, and Resume flow.
    always_comb begin
@@ -561,8 +561,8 @@ import mcu_el2_pkg::*;
                                     ({32{dmi_reg_addr == 7'h3d}} & sbdata1_reg[31:0]);
 
 
-   rvdffs #($bits(state_t)) dbg_state_reg    (.din(dbg_nxtstate), .dout({dbg_state}), .en(dbg_state_en), .rst_l(dbg_dm_rst_l & rst_l), .clk(dbg_free_clk));
-   rvdffe #(32)             dmi_rddata_reg   (.din(dmi_reg_rdata_din[31:0]), .dout(dmi_reg_rdata[31:0]), .en(dmi_reg_en), .rst_l(dbg_dm_rst_l), .clk(clk), .*);
+   mcu_rvdffs #($bits(state_t)) dbg_state_reg    (.din(dbg_nxtstate), .dout({dbg_state}), .en(dbg_state_en), .rst_l(dbg_dm_rst_l & rst_l), .clk(dbg_free_clk));
+   mcu_rvdffe #(32)             dmi_rddata_reg   (.din(dmi_reg_rdata_din[31:0]), .dout(dmi_reg_rdata[31:0]), .en(dmi_reg_en), .rst_l(dbg_dm_rst_l), .clk(clk), .*);
 
    assign abmem_addr[31:0]      = data1_reg[31:0];
    assign abmem_addr_core_local = (abmem_addr_in_dccm_region | abmem_addr_in_iccm_region | abmem_addr_in_pic_region);
@@ -668,7 +668,7 @@ import mcu_el2_pkg::*;
          endcase
    end // always_comb begin
 
-   rvdffs #($bits(sb_state_t)) sb_state_reg (.din(sb_nxtstate), .dout({sb_state}), .en(sb_state_en), .rst_l(dbg_dm_rst_l), .clk(sb_free_clk));
+   mcu_rvdffs #($bits(sb_state_t)) sb_state_reg (.din(sb_nxtstate), .dout({sb_state}), .en(sb_state_en), .rst_l(dbg_dm_rst_l), .clk(sb_free_clk));
 
    assign sb_abmem_cmd_write      = command_reg[16];
    assign sb_abmem_cmd_size[2:0]  = {1'b0, command_reg[21:20]};
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_decode_ctl.sv b/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_decode_ctl.sv
index 223808c..3eae650 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_decode_ctl.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_decode_ctl.sv
@@ -433,13 +433,13 @@ import mcu_el2_pkg::*;
    mcu_el2_reg_pkt_t i0r;
 
 
-   rvdffie  #(8) misc1ff (.*,
+   mcu_rvdffie  #(8) misc1ff (.*,
                           .clk(free_l2clk),
                           .din( {leak1_i1_stall_in,leak1_i0_stall_in,dec_tlu_flush_extint,pause_state_in ,dec_tlu_wr_pause_r, tlu_wr_pause_r1,illegal_lockout_in,ps_stall_in}),
                           .dout({leak1_i1_stall,   leak1_i0_stall,   dec_extint_stall,    pause_state,       tlu_wr_pause_r1,tlu_wr_pause_r2,illegal_lockout,   ps_stall   })
                           );
 
-   rvdffie  #(8) misc2ff (.*,
+   mcu_rvdffie  #(8) misc2ff (.*,
                           .clk(free_l2clk),
                           .din( {lsu_trigger_match_m[3:0],lsu_pmu_misaligned_m,div_active_in,exu_flush_final,  dec_debug_valid_d}),
                           .dout({lsu_trigger_match_r[3:0],lsu_pmu_misaligned_r,div_active,       flush_final_r,    debug_valid_x})
@@ -488,7 +488,7 @@ if(mcu_pt.BTB_ENABLE==1) begin
       assign btb_error_found = (i0_br_error_all | btb_error_found_f) & ~dec_tlu_flush_lower_r;
       assign fa_error_index_ns = (i0_br_error_all & ~btb_error_found_f) ? dec_i0_bp_fa_index : dec_fa_error_index;
 
-      rvdff #($clog2(mcu_pt.BTB_SIZE)+1) btberrorfa_f   (.*, .clk(active_clk),
+      mcu_rvdff #($clog2(mcu_pt.BTB_SIZE)+1) btberrorfa_f   (.*, .clk(active_clk),
                                                          .din({btb_error_found,    fa_error_index_ns}),
                                                          .dout({btb_error_found_f, dec_fa_error_index}));
 
@@ -678,7 +678,7 @@ end // else: !if(mcu_pt.BTB_ENABLE==1)
       end
 
 
-   rvdffie #( $bits(mcu_el2_load_cam_pkt_t) ) cam_ff (.*, .din(cam_in[i]), .dout(cam_raw[i]));
+   mcu_rvdffie #( $bits(mcu_el2_load_cam_pkt_t) ) cam_ff (.*, .din(cam_in[i]), .dout(cam_raw[i]));
 
 
    assign nonblock_load_write[i] = (load_data_tag[NBLOAD_TAG_MSB:0] == cam_raw[i].tag[NBLOAD_TAG_MSB:0]) & cam_raw[i].valid;
@@ -720,7 +720,7 @@ end : cam_array
 
 // don't writeback a nonblock load
 
-   rvdffs #(1) wbnbloaddelayff (.*, .clk(active_clk), .en(i0_r_ctl_en ), .din(lsu_nonblock_load_valid_m),        .dout(nonblock_load_valid_m_delay) );
+   mcu_rvdffs #(1) wbnbloaddelayff (.*, .clk(active_clk), .en(i0_r_ctl_en ), .din(lsu_nonblock_load_valid_m),        .dout(nonblock_load_valid_m_delay) );
 
    assign i0_load_kill_wen_r = nonblock_load_valid_m_delay &  r_d.i0load;
 
@@ -778,7 +778,7 @@ end : cam_array
 
 
 
-   rvdff #(1) lsu_idle_ff (.*, .clk(active_clk), .din(lsu_idle_any), .dout(lsu_idle));
+   mcu_rvdff #(1) lsu_idle_ff (.*, .clk(active_clk), .din(lsu_idle_any), .dout(lsu_idle));
 
 
 
@@ -934,7 +934,7 @@ end : cam_array
    assign dec_csr_stall_int_ff = ((r_d.csraddr[11:0] == 12'h300) | (r_d.csraddr[11:0] == 12'h304)) & r_d.csrwen & r_d.i0valid & ~dec_tlu_i0_kill_writeb_wb;
 
 
-   rvdff #(5) csrmiscff (.*,
+   mcu_rvdff #(5) csrmiscff (.*,
                         .clk (active_clk),
                         .din ({csr_ren_qual_d, csr_clr_d, csr_set_d, csr_write_d, i0_dp.csr_imm}),
                         .dout({csr_read_x,     csr_clr_x, csr_set_x, csr_write_x, csr_imm_x})
@@ -945,7 +945,7 @@ end : cam_array
 
    // perform the update operation if any
 
-   rvdffe #(37) csr_rddata_x_ff (.*, .en(i0_x_data_en & any_csr_d), .din( {i0[19:15],dec_csr_rddata_d[31:0]}), .dout({csrimm_x[4:0],csr_rddata_x[31:0]}));
+   mcu_rvdffe #(37) csr_rddata_x_ff (.*, .en(i0_x_data_en & any_csr_d), .din( {i0[19:15],dec_csr_rddata_d[31:0]}), .dout({csrimm_x[4:0],csr_rddata_x[31:0]}));
 
 
    assign csr_mask_x[31:0]       = ({32{ csr_imm_x}} & {27'b0,csrimm_x[4:0]}) |
@@ -984,7 +984,7 @@ end : cam_array
                                     (dec_tlu_wr_pause_r) ? dec_csr_wrdata_r[31:0] : write_csr_data_x[31:0];
 
    // will hold until write-back at which time the CSR will be updated while GPR is possibly written with prior CSR
-   rvdffe #(32) write_csr_ff (.*, .clk(free_l2clk), .en(csr_data_wen), .din(write_csr_data_in[31:0]), .dout(write_csr_data[31:0]));
+   mcu_rvdffe #(32) write_csr_ff (.*, .clk(free_l2clk), .en(csr_data_wen), .din(write_csr_data_in[31:0]), .dout(write_csr_data[31:0]));
 
    assign pause_stall = pause_state;
 
@@ -1140,7 +1140,7 @@ end : cam_array
 
    assign illegal_inst_en    = shift_illegal & ~illegal_lockout;
 
-   rvdffe #(32) illegal_any_ff (.*, .en(illegal_inst_en), .din(i0_inst_d[31:0]), .dout(dec_illegal_inst[31:0]));
+   mcu_rvdffe #(32) illegal_any_ff (.*, .en(illegal_inst_en), .din(i0_inst_d[31:0]), .dout(dec_illegal_inst[31:0]));
 
    assign illegal_lockout_in = (shift_illegal | illegal_lockout) & ~flush_final_r;
 
@@ -1258,7 +1258,7 @@ end : cam_array
 
 
 
-   rvdfflie #( .WIDTH($bits(mcu_el2_trap_pkt_t)),.LEFT(9) ) trap_xff (.*, .en(i0_x_ctl_en), .din(d_t),  .dout(x_t));
+   mcu_rvdfflie #( .WIDTH($bits(mcu_el2_trap_pkt_t)),.LEFT(9) ) trap_xff (.*, .en(i0_x_ctl_en), .din(d_t),  .dout(x_t));
 
    always_comb begin
       x_t_in = x_t;
@@ -1266,7 +1266,7 @@ end : cam_array
    end
 
 
-   rvdfflie  #( .WIDTH($bits(mcu_el2_trap_pkt_t)),.LEFT(9) ) trap_r_ff (.*, .en(i0_x_ctl_en), .din(x_t_in),  .dout(r_t));
+   mcu_rvdfflie  #( .WIDTH($bits(mcu_el2_trap_pkt_t)),.LEFT(9) ) trap_r_ff (.*, .en(i0_x_ctl_en), .din(x_t_in),  .dout(r_t));
 
 
     always_comb begin
@@ -1296,8 +1296,8 @@ end : cam_array
    assign i0_d_c.load               =  i0_dp.load & i0_legal_decode_d;
    assign i0_d_c.alu                =  i0_dp.alu  & i0_legal_decode_d;
 
-   rvdffs #( $bits(mcu_el2_class_pkt_t) ) i0_x_c_ff   (.*, .en(i0_x_ctl_en),  .clk(active_clk), .din(i0_d_c),  .dout(i0_x_c));
-   rvdffs #( $bits(mcu_el2_class_pkt_t) ) i0_r_c_ff   (.*, .en(i0_r_ctl_en),  .clk(active_clk), .din(i0_x_c),  .dout(i0_r_c));
+   mcu_rvdffs #( $bits(mcu_el2_class_pkt_t) ) i0_x_c_ff   (.*, .en(i0_x_ctl_en),  .clk(active_clk), .din(i0_d_c),  .dout(i0_x_c));
+   mcu_rvdffs #( $bits(mcu_el2_class_pkt_t) ) i0_r_c_ff   (.*, .en(i0_r_ctl_en),  .clk(active_clk), .din(i0_x_c),  .dout(i0_r_c));
 
 
    assign d_d.i0rd[4:0]             =  i0r.rd[4:0];
@@ -1314,7 +1314,7 @@ end : cam_array
    assign d_d.csraddr[11:0] =  i0[31:20]; // csr read/write address
 
 
-   rvdff  #(3) i0cgff               (.*, .clk(active_clk),            .din(i0_pipe_en[3:1]), .dout(i0_pipe_en[2:0]));
+   mcu_rvdff  #(3) i0cgff               (.*, .clk(active_clk),            .din(i0_pipe_en[3:1]), .dout(i0_pipe_en[2:0]));
 
    assign i0_pipe_en[3]             =  dec_i0_decode_d;
 
@@ -1330,7 +1330,7 @@ end : cam_array
 
 
 
-   rvdfflie #( .WIDTH($bits(mcu_el2_dest_pkt_t)),.LEFT(15) ) e1ff (.*, .en(i0_x_ctl_en), .din(d_d),  .dout(x_d));
+   mcu_rvdfflie #( .WIDTH($bits(mcu_el2_dest_pkt_t)),.LEFT(15) ) e1ff (.*, .en(i0_x_ctl_en), .din(d_d),  .dout(x_d));
 
    always_comb begin
       x_d_in = x_d;
@@ -1339,7 +1339,7 @@ end : cam_array
       x_d_in.i0valid     = x_d.i0valid & ~dec_tlu_flush_lower_wb & ~dec_tlu_flush_lower_r;
    end
 
-   rvdfflie #( .WIDTH($bits(mcu_el2_dest_pkt_t)), .LEFT(15) ) r_d_ff (.*, .en(i0_r_ctl_en), .din(x_d_in), .dout(r_d));
+   mcu_rvdfflie #( .WIDTH($bits(mcu_el2_dest_pkt_t)), .LEFT(15) ) r_d_ff (.*, .en(i0_r_ctl_en), .din(x_d_in), .dout(r_d));
 
 
    always_comb begin
@@ -1359,7 +1359,7 @@ end : cam_array
    end
 
 
-   rvdfflie #(.WIDTH($bits(mcu_el2_dest_pkt_t)), .LEFT(15)) wbff (.*, .en(i0_wb_ctl_en), .din(r_d_in), .dout(wbd));
+   mcu_rvdfflie #(.WIDTH($bits(mcu_el2_dest_pkt_t)), .LEFT(15)) wbff (.*, .en(i0_wb_ctl_en), .din(r_d_in), .dout(wbd));
 
    assign dec_i0_waddr_r[4:0]       =  r_d_in.i0rd[4:0];
 
@@ -1410,13 +1410,13 @@ end : cam_array
    end
 
 
-   rvdffe #(32) i0_result_r_ff       (.*, .en(i0_r_data_en & (x_d.i0v | x_d.csrwen | debug_valid_x)),  .din(i0_result_x[31:0]),       .dout(i0_result_r_raw[31:0]));
+   mcu_rvdffe #(32) i0_result_r_ff       (.*, .en(i0_r_data_en & (x_d.i0v | x_d.csrwen | debug_valid_x)),  .din(i0_result_x[31:0]),       .dout(i0_result_r_raw[31:0]));
 
    // correct lsu load data - don't use for bypass, do pass down the pipe
    assign i0_result_corr_r[31:0]     = (r_d.i0v & r_d.i0load) ? lsu_result_corr_r[31:0] : i0_result_r_raw[31:0];
 
 
-   rvdffe #(12) e1brpcff             (.*, .en(i0_x_data_en), .din(last_br_immed_d[12:1] ), .dout(last_br_immed_x[12:1]));
+   mcu_rvdffe #(12) e1brpcff             (.*, .en(i0_x_data_en), .din(last_br_immed_d[12:1] ), .dout(last_br_immed_x[12:1]));
 
 
 
@@ -1429,25 +1429,25 @@ end : cam_array
    assign trace_enable = ~dec_tlu_trace_disable;
 
 
-   rvdffe #(.WIDTH(5),.OVERRIDE(1))  i0rdff  (.*, .en(i0_div_decode_d),        .din(i0r.rd[4:0]),             .dout(div_waddr_wb[4:0]));
+   mcu_rvdffe #(.WIDTH(5),.OVERRIDE(1))  i0rdff  (.*, .en(i0_div_decode_d),        .din(i0r.rd[4:0]),             .dout(div_waddr_wb[4:0]));
 
-   rvdffe #(32) i0xinstff            (.*, .en(i0_x_data_en & trace_enable),    .din(i0_inst_d[31:0]),         .dout(i0_inst_x[31:0]));
-   rvdffe #(32) i0cinstff            (.*, .en(i0_r_data_en & trace_enable),    .din(i0_inst_x[31:0]),         .dout(i0_inst_r[31:0]));
+   mcu_rvdffe #(32) i0xinstff            (.*, .en(i0_x_data_en & trace_enable),    .din(i0_inst_d[31:0]),         .dout(i0_inst_x[31:0]));
+   mcu_rvdffe #(32) i0cinstff            (.*, .en(i0_r_data_en & trace_enable),    .din(i0_inst_x[31:0]),         .dout(i0_inst_r[31:0]));
 
-   rvdffe #(32) i0wbinstff           (.*, .en(i0_wb_en & trace_enable),        .din(i0_inst_wb_in[31:0]),     .dout(i0_inst_wb[31:0]));
-   rvdffe #(31) i0wbpcff             (.*, .en(i0_wb_en & trace_enable),        .din(dec_tlu_i0_pc_r[31:1]),   .dout(  i0_pc_wb[31:1]));
+   mcu_rvdffe #(32) i0wbinstff           (.*, .en(i0_wb_en & trace_enable),        .din(i0_inst_wb_in[31:0]),     .dout(i0_inst_wb[31:0]));
+   mcu_rvdffe #(31) i0wbpcff             (.*, .en(i0_wb_en & trace_enable),        .din(dec_tlu_i0_pc_r[31:1]),   .dout(  i0_pc_wb[31:1]));
 
    assign dec_i0_inst_wb[31:0] = i0_inst_wb[31:0];
    assign dec_i0_pc_wb[31:1] = i0_pc_wb[31:1];
 
 
 
-   rvdffpcie #(31) i0_pc_r_ff           (.*, .en(i0_r_data_en), .din(exu_i0_pc_x[31:1]), .dout(dec_i0_pc_r[31:1]));
+   mcu_rvdffpcie #(31) i0_pc_r_ff           (.*, .en(i0_r_data_en), .din(exu_i0_pc_x[31:1]), .dout(dec_i0_pc_r[31:1]));
 
    assign dec_tlu_i0_pc_r[31:1]      = dec_i0_pc_r[31:1];
 
 
-   rvbradder ibradder_correct (
+   mcu_rvbradder ibradder_correct (
                      .pc(exu_i0_pc_x[31:1]),
                      .offset(last_br_immed_x[12:1]),
                      .dout(pred_correct_npc_x[31:1]));
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_gpr_ctl.sv b/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_gpr_ctl.sv
index 404ef46..80d21e4 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_gpr_ctl.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_gpr_ctl.sv
@@ -50,7 +50,7 @@ import mcu_el2_pkg::*;
    // GPR Write Enables
    assign gpr_wr_en[31:1] = (w0v[31:1] | w1v[31:1] | w2v[31:1]);
    for ( genvar j=1; j<32; j++ )  begin : gpr
-      rvdffe #(32) gprff (.*, .en(gpr_wr_en[j]), .din(gpr_in[j][31:0]), .dout(gpr_out[j][31:0]));
+      mcu_rvdffe #(32) gprff (.*, .en(gpr_wr_en[j]), .din(gpr_in[j][31:0]), .dout(gpr_out[j][31:0]));
    end : gpr
 
    // the read out
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_pmp_ctl.sv b/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_pmp_ctl.sv
index e5fb022..8b2fdf0 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_pmp_ctl.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_pmp_ctl.sv
@@ -113,7 +113,7 @@ module mcu_el2_dec_pmp_ctl
       assign csr_wdata = (raw_wdata & 8'b00000001) ? (raw_wdata & 8'b10011111) : (raw_wdata & 8'b10011101);
 `endif
 
-      rvdffe #(8) pmpcfg_ff (.*, .clk(free_l2clk),
+      mcu_rvdffe #(8) pmpcfg_ff (.*, .clk(free_l2clk),
                           .en(wr_pmpcfg_r & (wr_pmpcfg_group == entry_idx[5:2]) & (~entry_lock_eff[entry_idx])),
                           .din(csr_wdata),
                           .dout(pmp_pmpcfg[entry_idx]));
@@ -150,7 +150,7 @@ module mcu_el2_dec_pmp_ctl
                                   : 1'b0);
       assign pmpaddr_lock = entry_lock_eff[entry_idx] | pmpaddr_lock_next;
       assign pmp_pmpaddr[entry_idx][31:30] = 2'b00;
-      rvdffe #(30) pmpaddr_ff (.*, .clk(free_l2clk),
+      mcu_rvdffe #(30) pmpaddr_ff (.*, .clk(free_l2clk),
                           .en(wr_pmpaddr_r & (wr_pmpaddr_address == entry_idx)
                               & (~pmpaddr_lock)),
                           .din(dec_csr_wrdata_r[29:0]),
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_tlu_ctl.sv b/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_tlu_ctl.sv
index 48bef1c..a9d7803 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_tlu_ctl.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_tlu_ctl.sv
@@ -499,24 +499,24 @@ import mcu_el2_pkg::*;
    assign clk_override = dec_tlu_dec_clk_override;
 
    // Async inputs to the core have to be sync'd to the core clock.
-   rvsyncss #(7) syncro_ff(.*,
+   mcu_rvsyncss #(7) syncro_ff(.*,
                            .clk(free_clk),
                            .din ({nmi_int,      timer_int,      soft_int,      i_cpu_halt_req,      i_cpu_run_req,      mpc_debug_halt_req,          mpc_debug_run_req}),
                            .dout({nmi_int_sync, timer_int_sync, soft_int_sync, i_cpu_halt_req_sync, i_cpu_run_req_sync, mpc_debug_halt_req_sync_raw, mpc_debug_run_req_sync}));
 
    // for CSRs that have inpipe writes only
 
-   rvoclkhdr csrwr_r_cgc   ( .en(dec_csr_wen_r_mod | clk_override), .l1clk(csr_wr_clk), .* );
+   mcu_rvoclkhdr csrwr_r_cgc   ( .en(dec_csr_wen_r_mod | clk_override), .l1clk(csr_wr_clk), .* );
 
    assign e4_valid = dec_tlu_i0_valid_r;
    assign e4e5_valid = e4_valid | e5_valid;
    assign flush_clkvalid = internal_dbg_halt_mode_f | i_cpu_run_req_d1 | interrupt_valid_r | interrupt_valid_r_d1 |
                            reset_delayed | pause_expired_r | pause_expired_wb | ic_perr_r | iccm_sbecc_r |
                            clk_override;
-   rvoclkhdr e4e5_cgc     ( .en(e4e5_valid | clk_override), .l1clk(e4e5_clk), .* );
-   rvoclkhdr e4e5_int_cgc ( .en(e4e5_valid | flush_clkvalid), .l1clk(e4e5_int_clk), .* );
+   mcu_rvoclkhdr e4e5_cgc     ( .en(e4e5_valid | clk_override), .l1clk(e4e5_clk), .* );
+   mcu_rvoclkhdr e4e5_int_cgc ( .en(e4e5_valid | flush_clkvalid), .l1clk(e4e5_int_clk), .* );
 
-   rvdffie #(11)  freeff (.*, .clk(free_l2clk),
+   mcu_rvdffie #(11)  freeff (.*, .clk(free_l2clk),
                           .din ({ifu_ic_error_start, ifu_iccm_rd_ecc_single_err, iccm_repair_state_ns, e4_valid, internal_dbg_halt_mode,
                                  lsu_pmu_load_external_m, lsu_pmu_store_external_m, tlu_flush_lower_r,  tlu_i0_kill_writeb_r,
                                  internal_dbg_halt_mode_f, force_halt}),
@@ -587,7 +587,7 @@ localparam MSECCFG_MML   = 0;
    // fast ints in progress have priority
    assign mpc_debug_halt_req_sync = mpc_debug_halt_req_sync_raw & ~ext_int_freeze_d1;
 
-    rvdffie #(16)  mpvhalt_ff (.*, .clk(free_l2clk),
+    mcu_rvdffie #(16)  mpvhalt_ff (.*, .clk(free_l2clk),
                                  .din({1'b1, reset_detect,
                                        nmi_int_sync, nmi_int_detected, nmi_lsu_load_type, nmi_lsu_store_type,
                                        mpc_debug_halt_req_sync, mpc_debug_run_req_sync,
@@ -688,7 +688,7 @@ localparam MSECCFG_MML   = 0;
 
    assign request_debug_mode_done = (request_debug_mode_r_d1 | request_debug_mode_done_f) & ~dbg_tlu_halted_f;
 
-    rvdffie #(18)  halt_ff (.*, .clk(free_l2clk),
+    mcu_rvdffie #(18)  halt_ff (.*, .clk(free_l2clk),
                           .din({dec_tlu_flush_noredir_r, halt_taken, lsu_idle_any, ifu_miss_state_idle, dbg_tlu_halted,
                                 resume_ack_ns, debug_halt_req_ns, debug_resume_req, trigger_hit_dmode_r,
                                 dcsr_single_step_done, debug_halt_req, dec_tlu_wr_pause_r, dec_pause_state,
@@ -828,7 +828,7 @@ localparam MTDATA1_LD    = 0;
    assign i_cpu_halt_req_sync_qual = i_cpu_halt_req_sync & ~dec_tlu_debug_mode & ~ext_int_freeze_d1;
    assign i_cpu_run_req_sync_qual = i_cpu_run_req_sync & ~dec_tlu_debug_mode & pmu_fw_tlu_halted_f & ~ext_int_freeze_d1;
 
-   rvdffie #(10) exthaltff (.*, .clk(free_l2clk), .din({i_cpu_halt_req_sync_qual, i_cpu_run_req_sync_qual,   cpu_halt_status,
+   mcu_rvdffie #(10) exthaltff (.*, .clk(free_l2clk), .din({i_cpu_halt_req_sync_qual, i_cpu_run_req_sync_qual,   cpu_halt_status,
                                                    cpu_halt_ack,   cpu_run_ack, internal_pmu_fw_halt_mode,
                                                    pmu_fw_halt_req_ns, pmu_fw_tlu_halted,
                                                    int_timer0_int_hold, int_timer1_int_hold}),
@@ -976,7 +976,7 @@ end // else: !if(mcu_pt.BTB_ENABLE==1)
 
    assign       ebreak_to_debug_mode_r = (dec_tlu_packet_r.pmu_i0_itype == EBREAK)  & dec_tlu_i0_valid_r & ~i0_trigger_hit_r & dcsr[DCSR_EBREAKM] & ~rfpc_i0_r;
 
-   rvdff #(1)  exctype_wb_ff (.*, .clk(e4e5_clk),
+   mcu_rvdff #(1)  exctype_wb_ff (.*, .clk(e4e5_clk),
                                 .din (ebreak_to_debug_mode_r   ),
                                 .dout(ebreak_to_debug_mode_r_d1));
 
@@ -1193,7 +1193,7 @@ end
                                       ({31{~take_nmi & debug_resume_req_f}} & dpc[31:1]) |
                                       ({31{~take_nmi & sel_npc_resume}} & npc_r_d1[31:1]) );
 
-   rvdffpcie #(31)  flush_lower_ff (.*, .en(tlu_flush_lower_r),
+   mcu_rvdffpcie #(31)  flush_lower_ff (.*, .en(tlu_flush_lower_r),
                                  .din({tlu_flush_path_r[31:1]}),
                                  .dout({tlu_flush_path_r_d1[31:1]}));
 
@@ -1206,7 +1206,7 @@ end
    assign exc_or_int_valid_r = lsu_exc_valid_r | i0_exception_valid_r | interrupt_valid_r | (i0_trigger_hit_r & ~trigger_hit_dmode_r);
 
 
-   rvdffie #(12)  excinfo_wb_ff (.*,
+   mcu_rvdffie #(12)  excinfo_wb_ff (.*,
                                  .din({interrupt_valid_r, i0_exception_valid_r, exc_or_int_valid_r,
                                        exc_cause_r[4:0], tlu_i0_commit_cmt & ~illegal_r, i0_trigger_hit_r,
                                        take_nmi, pause_expired_r }),
@@ -1222,7 +1222,7 @@ end
                          (exc_or_int_valid_r & 1'b0 ) |
                          ((~mret_r & ~exc_or_int_valid_r) & priv_mode);
 
-   rvdff #(1) priv_ff (
+   mcu_rvdff #(1) priv_ff (
         .clk    (free_l2clk),
         .rst_l  (rst_l),
         .din    (priv_mode_ns),
@@ -1315,7 +1315,7 @@ end
 
    assign wr_mtvec_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MTVEC);
    assign mtvec_ns[30:0] = {dec_csr_wrdata_r[31:2], dec_csr_wrdata_r[0]} ;
-   rvdffe #(31)  mtvec_ff (.*, .en(wr_mtvec_r), .din(mtvec_ns[30:0]), .dout(mtvec[30:0]));
+   mcu_rvdffe #(31)  mtvec_ff (.*, .en(wr_mtvec_r), .din(mtvec_ns[30:0]), .dout(mtvec[30:0]));
 
    // ----------------------------------------------------------------------
    // MIP (RW)
@@ -1344,7 +1344,7 @@ end
 
    assign wr_mie_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MIE);
    assign mie_ns[5:0] = wr_mie_r ? {dec_csr_wrdata_r[30:28], dec_csr_wrdata_r[11], dec_csr_wrdata_r[7], dec_csr_wrdata_r[3]} : mie[5:0];
-   rvdff #(6)  mie_ff (.*, .clk(csr_wr_clk), .din(mie_ns[5:0]), .dout(mie[5:0]));
+   mcu_rvdff #(6)  mie_ff (.*, .clk(csr_wr_clk), .din(mie_ns[5:0]), .dout(mie[5:0]));
 
 
    // ----------------------------------------------------------------------
@@ -1366,8 +1366,8 @@ end
 
    assign mcyclel_ns[31:0] = wr_mcyclel_r ? dec_csr_wrdata_r[31:0] : mcyclel_inc[31:0];
 
-   rvdffe #(24) mcyclel_bff      (.*, .clk(free_l2clk), .en(wr_mcyclel_r | (mcyclela_cout & mcyclel_cout_in)),    .din(mcyclel_ns[31:8]), .dout(mcyclel[31:8]));
-   rvdffe #(8)  mcyclel_aff      (.*, .clk(free_l2clk), .en(wr_mcyclel_r | mcyclel_cout_in),  .din(mcyclel_ns[7:0]),  .dout(mcyclel[7:0]));
+   mcu_rvdffe #(24) mcyclel_bff      (.*, .clk(free_l2clk), .en(wr_mcyclel_r | (mcyclela_cout & mcyclel_cout_in)),    .din(mcyclel_ns[31:8]), .dout(mcyclel[31:8]));
+   mcu_rvdffe #(8)  mcyclel_aff      (.*, .clk(free_l2clk), .en(wr_mcyclel_r | mcyclel_cout_in),  .din(mcyclel_ns[7:0]),  .dout(mcyclel[7:0]));
 
    // ----------------------------------------------------------------------
    // MCYCLEH (RW)
@@ -1382,7 +1382,7 @@ end
    assign mcycleh_inc[31:0] = mcycleh[31:0] + {31'b0, mcyclel_cout_f};
    assign mcycleh_ns[31:0]  = wr_mcycleh_r ? dec_csr_wrdata_r[31:0] : mcycleh_inc[31:0];
 
-   rvdffe #(32)  mcycleh_ff (.*, .clk(free_l2clk), .en(wr_mcycleh_r | mcyclel_cout_f), .din(mcycleh_ns[31:0]), .dout(mcycleh[31:0]));
+   mcu_rvdffe #(32)  mcycleh_ff (.*, .clk(free_l2clk), .en(wr_mcycleh_r | mcyclel_cout_f), .din(mcycleh_ns[31:0]), .dout(mcycleh[31:0]));
 
    // ----------------------------------------------------------------------
    // MINSTRETL (RW)
@@ -1408,9 +1408,9 @@ end
    assign minstretl_cout_ns = minstretl_cout & ~wr_minstreth_r & i0_valid_no_ebreak_ecall_r & ~dec_tlu_dbg_halted;
 
    assign minstretl_ns[31:0] = wr_minstretl_r ? dec_csr_wrdata_r[31:0] : minstretl_inc[31:0];
-   rvdffe #(24)  minstretl_bff (.*, .en(wr_minstretl_r | (minstretl_couta & minstret_enable)),
+   mcu_rvdffe #(24)  minstretl_bff (.*, .en(wr_minstretl_r | (minstretl_couta & minstret_enable)),
                                 .din(minstretl_ns[31:8]), .dout(minstretl[31:8]));
-   rvdffe #(8)   minstretl_aff (.*, .en(minstret_enable),
+   mcu_rvdffe #(8)   minstretl_aff (.*, .en(minstret_enable),
                                 .din(minstretl_ns[7:0]),  .dout(minstretl[7:0]));
 
 
@@ -1427,7 +1427,7 @@ end
 
    assign minstreth_inc[31:0] = minstreth[31:0] + {31'b0, minstretl_cout_f};
    assign minstreth_ns[31:0]  = wr_minstreth_r ? dec_csr_wrdata_r[31:0] : minstreth_inc[31:0];
-   rvdffe #(32)  minstreth_ff (.*, .en((minstret_enable_f & minstretl_cout_f) | wr_minstreth_r), .din(minstreth_ns[31:0]), .dout(minstreth[31:0]));
+   mcu_rvdffe #(32)  minstreth_ff (.*, .en((minstret_enable_f & minstretl_cout_f) | wr_minstreth_r), .din(minstreth_ns[31:0]), .dout(minstreth[31:0]));
 
    assign minstreth_read[31:0] = minstreth_inc[31:0];
 
@@ -1438,7 +1438,7 @@ end
 
    assign wr_mscratch_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MSCRATCH);
 
-   rvdffe #(32)  mscratch_ff (.*, .en(wr_mscratch_r), .din(dec_csr_wrdata_r[31:0]), .dout(mscratch[31:0]));
+   mcu_rvdffe #(32)  mscratch_ff (.*, .en(wr_mscratch_r), .din(dec_csr_wrdata_r[31:0]), .dout(mscratch[31:0]));
 
    // ----------------------------------------------------------------------
    // MEPC (RW)
@@ -1456,7 +1456,7 @@ end
                            ({31{(sel_flush_npc_r)}} & tlu_flush_path_r_d1[31:1]) |
                            ({31{(sel_hold_npc_r)}} & npc_r_d1[31:1]) );
 
-   rvdffpcie #(31)  npwbc_ff (.*, .en(sel_exu_npc_r | sel_flush_npc_r | reset_delayed), .din(npc_r[31:1]), .dout(npc_r_d1[31:1]));
+   mcu_rvdffpcie #(31)  npwbc_ff (.*, .en(sel_exu_npc_r | sel_flush_npc_r | reset_delayed), .din(npc_r[31:1]), .dout(npc_r_d1[31:1]));
 
    // PC has to be captured for exceptions and interrupts. For MRET, we could execute it and then take an
    // interrupt before the next instruction.
@@ -1465,7 +1465,7 @@ end
    assign pc_r[31:1]  = ( ({31{ pc0_valid_r}} & dec_tlu_i0_pc_r[31:1]) |
                           ({31{~pc0_valid_r}} & pc_r_d1[31:1]));
 
-   rvdffpcie #(31)  pwbc_ff (.*, .en(pc0_valid_r), .din(pc_r[31:1]), .dout(pc_r_d1[31:1]));
+   mcu_rvdffpcie #(31)  pwbc_ff (.*, .en(pc0_valid_r), .din(pc_r[31:1]), .dout(pc_r_d1[31:1]));
 
    assign wr_mepc_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MEPC);
 
@@ -1475,7 +1475,7 @@ end
                             ({31{~wr_mepc_r & ~exc_or_int_valid_r}} & mepc[31:1]) );
 
 
-   rvdffe #(31)  mepc_ff (.*, .en(i0_exception_valid_r | lsu_exc_valid_r | mepc_trigger_hit_sel_pc_r | interrupt_valid_r | wr_mepc_r), .din(mepc_ns[31:1]), .dout(mepc[31:1]));
+   mcu_rvdffe #(31)  mepc_ff (.*, .en(i0_exception_valid_r | lsu_exc_valid_r | mepc_trigger_hit_sel_pc_r | interrupt_valid_r | wr_mepc_r), .din(mepc_ns[31:1]), .dout(mepc[31:1]));
 
    // ----------------------------------------------------------------------
    // MCAUSE (RW)
@@ -1500,7 +1500,7 @@ end
                               ({32{wr_mcause_r & ~exc_or_int_valid_r}} & dec_csr_wrdata_r[31:0]) |
                               ({32{~wr_mcause_r & ~exc_or_int_valid_r}} & mcause[31:0]) );
 
-   rvdffe #(32)  mcause_ff (.*, .en(exc_or_int_valid_r | wr_mcause_r), .din(mcause_ns[31:0]), .dout(mcause[31:0]));
+   mcu_rvdffe #(32)  mcause_ff (.*, .en(exc_or_int_valid_r | wr_mcause_r), .din(mcause_ns[31:0]), .dout(mcause[31:0]));
    // ----------------------------------------------------------------------
    // MSCAUSE (RW)
    // [2:0] : Secondary exception Cause
@@ -1522,7 +1522,7 @@ end
                               ({4{~wr_mscause_r & ~exc_or_int_valid_r}} & mscause[3:0])
                              );
 
-   rvdff #(4)  mscause_ff (.*, .clk(e4e5_int_clk), .din(mscause_ns[3:0]), .dout(mscause[3:0]));
+   mcu_rvdff #(4)  mscause_ff (.*, .clk(e4e5_int_clk), .din(mscause_ns[3:0]), .dout(mscause[3:0]));
    // ----------------------------------------------------------------------
    // MTVAL (RW)
    // [31:0] : Exception address if relevant
@@ -1544,7 +1544,7 @@ end
                             ({32{~take_nmi & ~wr_mtval_r & ~mtval_capture_pc_r & ~mtval_capture_inst_r & ~mtval_clear_r & ~mtval_capture_lsu_r}} & mtval[31:0]) );
 
 
-   rvdffe #(32)  mtval_ff (.*, .en(tlu_flush_lower_r | wr_mtval_r), .din(mtval_ns[31:0]), .dout(mtval[31:0]));
+   mcu_rvdffe #(32)  mtval_ff (.*, .en(tlu_flush_lower_r | wr_mtval_r), .din(mtval_ns[31:0]), .dout(mtval[31:0]));
 
    // ----------------------------------------------------------------------
    // MSECCFG
@@ -1570,7 +1570,7 @@ end
 
    // mseccfg
    assign wr_mseccfg_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MSECCFG);
-   rvdffs #(3) mseccfg_ff (.*, .clk(csr_wr_clk), .en(wr_mseccfg_r), .din(mseccfg_ns), .dout(mseccfg));
+   mcu_rvdffs #(3) mseccfg_ff (.*, .clk(csr_wr_clk), .en(wr_mseccfg_r), .din(mseccfg_ns), .dout(mseccfg));
 
    assign mseccfg_ns = {
      pmp_any_region_locked ?
@@ -1599,7 +1599,7 @@ end
    assign wr_mcgc_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MCGC);
 
    assign mcgc_ns[9:0] = wr_mcgc_r ? {~dec_csr_wrdata_r[9], dec_csr_wrdata_r[8:0]} : mcgc_int[9:0];
-   rvdffe #(10)  mcgc_ff (.*, .en(wr_mcgc_r), .din(mcgc_ns[9:0]), .dout(mcgc_int[9:0]));
+   mcu_rvdffe #(10)  mcgc_ff (.*, .en(wr_mcgc_r), .din(mcgc_ns[9:0]), .dout(mcgc_int[9:0]));
 
    assign mcgc[9:0] = {~mcgc_int[9], mcgc_int[8:0]};
 
@@ -1637,7 +1637,7 @@ end
 
    assign wr_mfdc_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MFDC);
 
-   rvdffe #(16)  mfdc_ff (.*, .en(wr_mfdc_r), .din({mfdc_ns[15:0]}), .dout(mfdc_int[15:0]));
+   mcu_rvdffe #(16)  mfdc_ff (.*, .en(wr_mfdc_r), .din({mfdc_ns[15:0]}), .dout(mfdc_int[15:0]));
 
    // flip poweron value of bit 6 for AXI build
    if(mcu_pt.BUILD_AXI4==1) begin : axi4
@@ -1692,7 +1692,7 @@ end
                            dec_csr_wrdata_r[3], dec_csr_wrdata_r[2] & ~dec_csr_wrdata_r[3],
                            dec_csr_wrdata_r[1], dec_csr_wrdata_r[0] & ~dec_csr_wrdata_r[1]};
 
-   rvdffe #(32)  mrac_ff (.*, .en(wr_mrac_r), .din(mrac_in[31:0]), .dout(mrac[31:0]));
+   mcu_rvdffe #(32)  mrac_ff (.*, .en(wr_mrac_r), .din(mrac_in[31:0]), .dout(mrac[31:0]));
 
    // drive to LSU/IFU
    assign dec_tlu_mrac_ff[31:0] = mrac[31:0];
@@ -1717,7 +1717,7 @@ end
 
    assign mdseac_en = (lsu_imprecise_error_store_any | lsu_imprecise_error_load_any) & ~nmi_int_detected_f & ~mdseac_locked_f;
 
-   rvdffe #(32)  mdseac_ff (.*, .en(mdseac_en), .din(lsu_imprecise_error_addr_any[31:0]), .dout(mdseac[31:0]));
+   mcu_rvdffe #(32)  mdseac_ff (.*, .en(mdseac_en), .din(lsu_imprecise_error_addr_any[31:0]), .dout(mdseac[31:0]));
 
    // ----------------------------------------------------------------------
    // MPMC (R0W1)
@@ -1734,7 +1734,7 @@ end
 
    assign fw_halted_ns = (fw_halt_req | fw_halted) & ~set_mie_pmu_fw_halt;
    assign mpmc_b_ns[1] = wr_mpmc_r ? ~dec_csr_wrdata_r[1] : ~mpmc[1];
-   rvdff #(1)  mpmc_ff (.*, .clk(csr_wr_clk), .din(mpmc_b_ns[1]), .dout(mpmc_b[1]));
+   mcu_rvdff #(1)  mpmc_ff (.*, .clk(csr_wr_clk), .din(mpmc_b_ns[1]), .dout(mpmc_b[1]));
    assign mpmc[1] = ~mpmc_b[1];
 
    // ----------------------------------------------------------------------
@@ -1749,7 +1749,7 @@ end
    assign micect_inc[26:0] = micect[26:0] + {26'b0, ic_perr_r};
    assign micect_ns =  wr_micect_r ? {csr_sat[31:27], dec_csr_wrdata_r[26:0]} : {micect[31:27], micect_inc[26:0]};
 
-   rvdffe #(32)  micect_ff (.*, .en(wr_micect_r | ic_perr_r), .din(micect_ns[31:0]), .dout(micect[31:0]));
+   mcu_rvdffe #(32)  micect_ff (.*, .en(wr_micect_r | ic_perr_r), .din(micect_ns[31:0]), .dout(micect[31:0]));
 
    assign mice_ce_req = |({32'hffffffff << micect[31:27]} & {5'b0, micect[26:0]});
 
@@ -1763,7 +1763,7 @@ end
    assign miccmect_inc[26:0] = miccmect[26:0] + {26'b0, iccm_sbecc_r | iccm_dma_sb_error};
    assign miccmect_ns        = wr_miccmect_r ? {csr_sat[31:27], dec_csr_wrdata_r[26:0]} : {miccmect[31:27], miccmect_inc[26:0]};
 
-   rvdffe #(32)  miccmect_ff (.*, .clk(free_l2clk), .en(wr_miccmect_r | iccm_sbecc_r | iccm_dma_sb_error), .din(miccmect_ns[31:0]), .dout(miccmect[31:0]));
+   mcu_rvdffe #(32)  miccmect_ff (.*, .clk(free_l2clk), .en(wr_miccmect_r | iccm_sbecc_r | iccm_dma_sb_error), .din(miccmect_ns[31:0]), .dout(miccmect[31:0]));
 
    assign miccme_ce_req = |({32'hffffffff << miccmect[31:27]} & {5'b0, miccmect[26:0]});
 
@@ -1777,7 +1777,7 @@ end
    assign mdccmect_inc[26:0] = mdccmect[26:0] + {26'b0, lsu_single_ecc_error_r_d1};
    assign mdccmect_ns        = wr_mdccmect_r ? {csr_sat[31:27], dec_csr_wrdata_r[26:0]} : {mdccmect[31:27], mdccmect_inc[26:0]};
 
-   rvdffe #(32)  mdccmect_ff (.*, .clk(free_l2clk), .en(wr_mdccmect_r | lsu_single_ecc_error_r_d1), .din(mdccmect_ns[31:0]), .dout(mdccmect[31:0]));
+   mcu_rvdffe #(32)  mdccmect_ff (.*, .clk(free_l2clk), .en(wr_mdccmect_r | lsu_single_ecc_error_r_d1), .din(mdccmect_ns[31:0]), .dout(mdccmect[31:0]));
 
    assign mdccme_ce_req = |({32'hffffffff << mdccmect[31:27]} & {5'b0, mdccmect[26:0]});
 
@@ -1792,7 +1792,7 @@ end
 
    assign mfdht_ns[5:0] = wr_mfdht_r ? dec_csr_wrdata_r[5:0] : mfdht[5:0];
 
-   rvdffs #(6)  mfdht_ff (.*, .clk(csr_wr_clk), .en(wr_mfdht_r), .din(mfdht_ns[5:0]), .dout(mfdht[5:0]));
+   mcu_rvdffs #(6)  mfdht_ff (.*, .clk(csr_wr_clk), .en(wr_mfdht_r), .din(mfdht_ns[5:0]), .dout(mfdht[5:0]));
 
     // ----------------------------------------------------------------------
    // MFDHS(RW)
@@ -1805,11 +1805,11 @@ end
 
    assign mfdhs_ns[1:0] = wr_mfdhs_r ? dec_csr_wrdata_r[1:0] : ((dbg_tlu_halted & ~dbg_tlu_halted_f) ? {~lsu_idle_any_f, ~ifu_miss_state_idle_f} : mfdhs[1:0]);
 
-   rvdffs #(2)  mfdhs_ff (.*, .clk(free_clk), .en(wr_mfdhs_r | dbg_tlu_halted), .din(mfdhs_ns[1:0]), .dout(mfdhs[1:0]));
+   mcu_rvdffs #(2)  mfdhs_ff (.*, .clk(free_clk), .en(wr_mfdhs_r | dbg_tlu_halted), .din(mfdhs_ns[1:0]), .dout(mfdhs[1:0]));
 
    assign force_halt_ctr[31:0] = debug_halt_req_f ? (force_halt_ctr_f[31:0] + 32'b1) : (dbg_tlu_halted_f ? 32'b0 : force_halt_ctr_f[31:0]);
 
-   rvdffe #(32)  forcehaltctr_ff (.*, .en(mfdht[0]), .din(force_halt_ctr[31:0]), .dout(force_halt_ctr_f[31:0]));
+   mcu_rvdffe #(32)  forcehaltctr_ff (.*, .en(mfdht[0]), .din(force_halt_ctr[31:0]), .dout(force_halt_ctr_f[31:0]));
 
    assign force_halt = mfdht[0] & |(force_halt_ctr_f[31:0] & (32'hffffffff << mfdht[5:1]));
 
@@ -1822,7 +1822,7 @@ end
 
    assign wr_meivt_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MEIVT);
 
-   rvdffe #(22)  meivt_ff (.*, .en(wr_meivt_r), .din(dec_csr_wrdata_r[31:10]), .dout(meivt[31:10]));
+   mcu_rvdffe #(22)  meivt_ff (.*, .en(wr_meivt_r), .din(dec_csr_wrdata_r[31:10]), .dout(meivt[31:10]));
 
 
    // ----------------------------------------------------------------------
@@ -1834,7 +1834,7 @@ end
 
    assign wr_meihap_r = wr_meicpct_r;
 
-   rvdffe #(8)  meihap_ff (.*, .en(wr_meihap_r), .din(pic_claimid[7:0]), .dout(meihap[9:2]));
+   mcu_rvdffe #(8)  meihap_ff (.*, .en(wr_meihap_r), .din(pic_claimid[7:0]), .dout(meihap[9:2]));
 
    assign dec_tlu_meihap[31:2] = {meivt[31:10], meihap[9:2]};
    // ----------------------------------------------------------------------
@@ -1846,7 +1846,7 @@ end
    assign wr_meicurpl_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MEICURPL);
    assign meicurpl_ns[3:0] = wr_meicurpl_r ? dec_csr_wrdata_r[3:0] : meicurpl[3:0];
 
-   rvdff #(4)  meicurpl_ff (.*, .clk(csr_wr_clk), .din(meicurpl_ns[3:0]), .dout(meicurpl[3:0]));
+   mcu_rvdff #(4)  meicurpl_ff (.*, .clk(csr_wr_clk), .din(meicurpl_ns[3:0]), .dout(meicurpl[3:0]));
 
    // PIC needs this reg
    assign dec_tlu_meicurpl[3:0] = meicurpl[3:0];
@@ -1880,7 +1880,7 @@ end
    assign wr_meipt_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MEIPT);
    assign meipt_ns[3:0] = wr_meipt_r ? dec_csr_wrdata_r[3:0] : meipt[3:0];
 
-   rvdff #(4)  meipt_ff (.*, .clk(csr_wr_clk), .din(meipt_ns[3:0]), .dout(meipt[3:0]));
+   mcu_rvdff #(4)  meipt_ff (.*, .clk(csr_wr_clk), .din(meipt_ns[3:0]), .dout(meipt[3:0]));
 
    // to PIC
    assign dec_tlu_meipt[3:0] = meipt[3:0];
@@ -1928,7 +1928,7 @@ end
                           (wr_dcsr_r ? {dec_csr_wrdata_r[15], 3'b0, dec_csr_wrdata_r[11:10], 1'b0, dcsr[8:6], 2'b00, nmi_in_debug_mode | dcsr[3], dec_csr_wrdata_r[2]} :
                            {dcsr[15:4], nmi_in_debug_mode, dcsr[2]});
 
-   rvdffe #(14)  dcsr_ff (.*, .clk(free_l2clk), .en(enter_debug_halt_req_le | wr_dcsr_r | internal_dbg_halt_mode | take_nmi), .din(dcsr_ns[15:2]), .dout(dcsr[15:2]));
+   mcu_rvdffe #(14)  dcsr_ff (.*, .clk(free_l2clk), .en(enter_debug_halt_req_le | wr_dcsr_r | internal_dbg_halt_mode | take_nmi), .din(dcsr_ns[15:2]), .dout(dcsr[15:2]));
 
    // ----------------------------------------------------------------------
    // DPC (R/W) (Only accessible in debug mode)
@@ -1943,7 +1943,7 @@ end
                            ({31{dpc_capture_pc}} & pc_r[31:1]) |
                            ({31{~dpc_capture_pc & dpc_capture_npc}} & npc_r[31:1]) );
 
-   rvdffe #(31)  dpc_ff (.*, .en(wr_dpc_r | dpc_capture_pc | dpc_capture_npc), .din(dpc_ns[31:1]), .dout(dpc[31:1]));
+   mcu_rvdffe #(31)  dpc_ff (.*, .en(wr_dpc_r | dpc_capture_pc | dpc_capture_npc), .din(dpc_ns[31:1]), .dout(dpc[31:1]));
 
    // ----------------------------------------------------------------------
    // DICAWICS (R/W) (Only accessible in debug mode)
@@ -1959,7 +1959,7 @@ end
    assign dicawics_ns[16:0] = {dec_csr_wrdata_r[24], dec_csr_wrdata_r[21:20], dec_csr_wrdata_r[16:3]};
    assign wr_dicawics_r = allow_dbg_halt_csr_write & dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == DICAWICS);
 
-   rvdffe #(17)  dicawics_ff (.*, .en(wr_dicawics_r), .din(dicawics_ns[16:0]), .dout(dicawics[16:0]));
+   mcu_rvdffe #(17)  dicawics_ff (.*, .en(wr_dicawics_r), .din(dicawics_ns[16:0]), .dout(dicawics[16:0]));
 
    // ----------------------------------------------------------------------
    // DICAD0 (R/W) (Only accessible in debug mode)
@@ -1979,7 +1979,7 @@ end
 
    assign wr_dicad0_r = allow_dbg_halt_csr_write & dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == DICAD0);
 
-   rvdffe #(32)  dicad0_ff (.*, .en(wr_dicad0_r | ifu_ic_debug_rd_data_valid), .din(dicad0_ns[31:0]), .dout(dicad0[31:0]));
+   mcu_rvdffe #(32)  dicad0_ff (.*, .en(wr_dicad0_r | ifu_ic_debug_rd_data_valid), .din(dicad0_ns[31:0]), .dout(dicad0[31:0]));
 
    // ----------------------------------------------------------------------
    // DICAD0H (R/W) (Only accessible in debug mode)
@@ -1993,7 +1993,7 @@ end
 
    assign wr_dicad0h_r = allow_dbg_halt_csr_write & dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == DICAD0H);
 
-   rvdffe #(32)  dicad0h_ff (.*, .en(wr_dicad0h_r | ifu_ic_debug_rd_data_valid), .din(dicad0h_ns[31:0]), .dout(dicad0h[31:0]));
+   mcu_rvdffe #(32)  dicad0h_ff (.*, .en(wr_dicad0h_r | ifu_ic_debug_rd_data_valid), .din(dicad0h_ns[31:0]), .dout(dicad0h[31:0]));
 
 
 if (mcu_pt.ICACHE_ECC == 1) begin : genblock1
@@ -2006,7 +2006,7 @@ if (mcu_pt.ICACHE_ECC == 1) begin : genblock1
 
    assign wr_dicad1_r = allow_dbg_halt_csr_write & dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == DICAD1);
 
-   rvdffe #(.WIDTH(7), .OVERRIDE(1))  dicad1_ff (.*, .en(wr_dicad1_r | ifu_ic_debug_rd_data_valid), .din(dicad1_ns[6:0]), .dout(dicad1_raw[6:0]));
+   mcu_rvdffe #(.WIDTH(7), .OVERRIDE(1))  dicad1_ff (.*, .en(wr_dicad1_r | ifu_ic_debug_rd_data_valid), .din(dicad1_ns[6:0]), .dout(dicad1_raw[6:0]));
 
    assign dicad1[31:0] = {25'b0, dicad1_raw[6:0]};
 
@@ -2021,7 +2021,7 @@ else begin : genblock1
 
    assign wr_dicad1_r = allow_dbg_halt_csr_write & dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == DICAD1);
 
-   rvdffs #(4)  dicad1_ff (.*, .clk(free_clk), .en(wr_dicad1_r | ifu_ic_debug_rd_data_valid), .din(dicad1_ns[3:0]), .dout(dicad1_raw[3:0]));
+   mcu_rvdffs #(4)  dicad1_ff (.*, .clk(free_clk), .en(wr_dicad1_r | ifu_ic_debug_rd_data_valid), .din(dicad1_ns[3:0]), .dout(dicad1_raw[3:0]));
 
    assign dicad1[31:0] = {28'b0, dicad1_raw[3:0]};
 end
@@ -2053,7 +2053,7 @@ else
    assign wr_mtsel_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MTSEL);
    assign mtsel_ns[1:0] = wr_mtsel_r ? {dec_csr_wrdata_r[1:0]} : mtsel[1:0];
 
-   rvdff #(2)  mtsel_ff (.*, .clk(csr_wr_clk), .din(mtsel_ns[1:0]), .dout(mtsel[1:0]));
+   mcu_rvdff #(2)  mtsel_ff (.*, .clk(csr_wr_clk), .din(mtsel_ns[1:0]), .dout(mtsel[1:0]));
 
    // ----------------------------------------------------------------------
    // MTDATA1 (R/W)
@@ -2133,10 +2133,10 @@ else
                                 {mtdata1_t3[9], update_hit_bit_r[3] | mtdata1_t3[8], mtdata1_t3[7:0]};
 
 
-   rvdffe #(10)  mtdata1_t0_ff (.*, .en(trigger_enabled[0] | wr_mtdata1_t0_r), .din(mtdata1_t0_ns[9:0]), .dout(mtdata1_t0[9:0]));
-   rvdffe #(10)  mtdata1_t1_ff (.*, .en(trigger_enabled[1] | wr_mtdata1_t1_r), .din(mtdata1_t1_ns[9:0]), .dout(mtdata1_t1[9:0]));
-   rvdffe #(10)  mtdata1_t2_ff (.*, .en(trigger_enabled[2] | wr_mtdata1_t2_r), .din(mtdata1_t2_ns[9:0]), .dout(mtdata1_t2[9:0]));
-   rvdffe #(10)  mtdata1_t3_ff (.*, .en(trigger_enabled[3] | wr_mtdata1_t3_r), .din(mtdata1_t3_ns[9:0]), .dout(mtdata1_t3[9:0]));
+   mcu_rvdffe #(10)  mtdata1_t0_ff (.*, .en(trigger_enabled[0] | wr_mtdata1_t0_r), .din(mtdata1_t0_ns[9:0]), .dout(mtdata1_t0[9:0]));
+   mcu_rvdffe #(10)  mtdata1_t1_ff (.*, .en(trigger_enabled[1] | wr_mtdata1_t1_r), .din(mtdata1_t1_ns[9:0]), .dout(mtdata1_t1[9:0]));
+   mcu_rvdffe #(10)  mtdata1_t2_ff (.*, .en(trigger_enabled[2] | wr_mtdata1_t2_r), .din(mtdata1_t2_ns[9:0]), .dout(mtdata1_t2[9:0]));
+   mcu_rvdffe #(10)  mtdata1_t3_ff (.*, .en(trigger_enabled[3] | wr_mtdata1_t3_r), .din(mtdata1_t3_ns[9:0]), .dout(mtdata1_t3[9:0]));
 
    assign mtdata1_tsel_out[31:0] = ( ({32{(mtsel[1:0] == 2'b00)}} & {4'h2, mtdata1_t0[9], 6'b011111, mtdata1_t0[8:7], 6'b0, mtdata1_t0[6:5], 3'b0, mtdata1_t0[4:3], 3'b0, mtdata1_t0[2:0]}) |
                                      ({32{(mtsel[1:0] == 2'b01)}} & {4'h2, mtdata1_t1[9], 6'b011111, mtdata1_t1[8:7], 6'b0, mtdata1_t1[6:5], 3'b0, mtdata1_t1[4:3], 3'b0, mtdata1_t1[2:0]}) |
@@ -2186,10 +2186,10 @@ else
    assign wr_mtdata2_t2_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MTDATA2) & (mtsel[1:0] == 2'b10) & (~mtdata1_t2[MTDATA1_DMODE] | dbg_tlu_halted_f);
    assign wr_mtdata2_t3_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MTDATA2) & (mtsel[1:0] == 2'b11) & (~mtdata1_t3[MTDATA1_DMODE] | dbg_tlu_halted_f);
 
-   rvdffe #(32)  mtdata2_t0_ff (.*, .en(wr_mtdata2_t0_r), .din(dec_csr_wrdata_r[31:0]), .dout(mtdata2_t0[31:0]));
-   rvdffe #(32)  mtdata2_t1_ff (.*, .en(wr_mtdata2_t1_r), .din(dec_csr_wrdata_r[31:0]), .dout(mtdata2_t1[31:0]));
-   rvdffe #(32)  mtdata2_t2_ff (.*, .en(wr_mtdata2_t2_r), .din(dec_csr_wrdata_r[31:0]), .dout(mtdata2_t2[31:0]));
-   rvdffe #(32)  mtdata2_t3_ff (.*, .en(wr_mtdata2_t3_r), .din(dec_csr_wrdata_r[31:0]), .dout(mtdata2_t3[31:0]));
+   mcu_rvdffe #(32)  mtdata2_t0_ff (.*, .en(wr_mtdata2_t0_r), .din(dec_csr_wrdata_r[31:0]), .dout(mtdata2_t0[31:0]));
+   mcu_rvdffe #(32)  mtdata2_t1_ff (.*, .en(wr_mtdata2_t1_r), .din(dec_csr_wrdata_r[31:0]), .dout(mtdata2_t1[31:0]));
+   mcu_rvdffe #(32)  mtdata2_t2_ff (.*, .en(wr_mtdata2_t2_r), .din(dec_csr_wrdata_r[31:0]), .dout(mtdata2_t2[31:0]));
+   mcu_rvdffe #(32)  mtdata2_t3_ff (.*, .en(wr_mtdata2_t3_r), .din(dec_csr_wrdata_r[31:0]), .dout(mtdata2_t3[31:0]));
 
    assign mtdata2_tsel_out[31:0] = ( ({32{(mtsel[1:0] == 2'b00)}} & mtdata2_t0[31:0]) |
                                      ({32{(mtsel[1:0] == 2'b01)}} & mtdata2_t1[31:0]) |
@@ -2345,7 +2345,7 @@ else
    if(mcu_pt.FAST_INTERRUPT_REDIRECT) begin : genblock2
 
 `ifdef MCU_RV_USER_MODE
-   rvdffie #(33)  mstatus_ff (.*, .clk(free_l2clk),
+   mcu_rvdffie #(33)  mstatus_ff (.*, .clk(free_l2clk),
                              .din({mdseac_locked_ns, lsu_single_ecc_error_r, lsu_exc_valid_r, lsu_i0_exc_r,
                                    take_ext_int_start,    take_ext_int_start_d1, take_ext_int_start_d2, ext_int_freeze,
                                    mip_ns[5:0], mcyclel_cout & ~wr_mcycleh_r & mcyclel_cout_in,
@@ -2359,7 +2359,7 @@ else
                                     mhpmc_inc_r_d1[3:0], perfcnt_halted_d1,
                                     mstatus[3:0]}));
 `else
-   rvdffie #(31)  mstatus_ff (.*, .clk(free_l2clk),
+   mcu_rvdffie #(31)  mstatus_ff (.*, .clk(free_l2clk),
                              .din({mdseac_locked_ns, lsu_single_ecc_error_r, lsu_exc_valid_r, lsu_i0_exc_r,
                                    take_ext_int_start,    take_ext_int_start_d1, take_ext_int_start_d2, ext_int_freeze,
                                    mip_ns[5:0], mcyclel_cout & ~wr_mcycleh_r & mcyclel_cout_in,
@@ -2378,7 +2378,7 @@ else
    end
    else begin : genblock2
 `ifdef MCU_RV_USER_MODE
-   rvdffie #(29)  mstatus_ff (.*, .clk(free_l2clk),
+   mcu_rvdffie #(29)  mstatus_ff (.*, .clk(free_l2clk),
                              .din({mdseac_locked_ns, lsu_single_ecc_error_r, lsu_exc_valid_r, lsu_i0_exc_r,
                                    mip_ns[5:0], mcyclel_cout & ~wr_mcycleh_r & mcyclel_cout_in,
                                    minstret_enable, minstretl_cout_ns, fw_halted_ns,
@@ -2390,7 +2390,7 @@ else
                                     mhpmc_inc_r_d1[3:0], perfcnt_halted_d1,
                                     mstatus[3:0]}));
 `else
-   rvdffie #(27)  mstatus_ff (.*, .clk(free_l2clk),
+   mcu_rvdffie #(27)  mstatus_ff (.*, .clk(free_l2clk),
                              .din({mdseac_locked_ns, lsu_single_ecc_error_r, lsu_exc_valid_r, lsu_i0_exc_r,
                                    mip_ns[5:0], mcyclel_cout & ~wr_mcycleh_r & mcyclel_cout_in,
                                    minstret_enable, minstretl_cout_ns, fw_halted_ns,
@@ -2427,12 +2427,12 @@ else
    assign mhpmc3_wr_en  = mhpmc3_wr_en0 | mhpmc3_wr_en1;
    assign mhpmc3_incr[63:0] = {mhpmc3h[31:0],mhpmc3[31:0]} + {63'b0, 1'b1};
    assign mhpmc3_ns[31:0] = mhpmc3_wr_en0 ? dec_csr_wrdata_r[31:0] : mhpmc3_incr[31:0];
-   rvdffe #(32)  mhpmc3_ff (.*, .clk(free_l2clk), .en(mhpmc3_wr_en), .din(mhpmc3_ns[31:0]), .dout(mhpmc3[31:0]));
+   mcu_rvdffe #(32)  mhpmc3_ff (.*, .clk(free_l2clk), .en(mhpmc3_wr_en), .din(mhpmc3_ns[31:0]), .dout(mhpmc3[31:0]));
 
    assign mhpmc3h_wr_en0 = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MHPMC3H);
    assign mhpmc3h_wr_en  = mhpmc3h_wr_en0 | mhpmc3_wr_en1;
    assign mhpmc3h_ns[31:0] = mhpmc3h_wr_en0 ? dec_csr_wrdata_r[31:0] : mhpmc3_incr[63:32];
-   rvdffe #(32)  mhpmc3h_ff (.*, .clk(free_l2clk), .en(mhpmc3h_wr_en), .din(mhpmc3h_ns[31:0]), .dout(mhpmc3h[31:0]));
+   mcu_rvdffe #(32)  mhpmc3h_ff (.*, .clk(free_l2clk), .en(mhpmc3h_wr_en), .din(mhpmc3h_ns[31:0]), .dout(mhpmc3h[31:0]));
 
    // ----------------------------------------------------------------------
    // MHPMC4H(RW), MHPMC4(RW)
@@ -2449,12 +2449,12 @@ else
    assign mhpmc4_wr_en  = mhpmc4_wr_en0 | mhpmc4_wr_en1;
    assign mhpmc4_incr[63:0] = {mhpmc4h[31:0],mhpmc4[31:0]} + {63'b0,1'b1};
    assign mhpmc4_ns[31:0] = mhpmc4_wr_en0 ? dec_csr_wrdata_r[31:0] : mhpmc4_incr[31:0];
-   rvdffe #(32)  mhpmc4_ff (.*, .clk(free_l2clk), .en(mhpmc4_wr_en), .din(mhpmc4_ns[31:0]), .dout(mhpmc4[31:0]));
+   mcu_rvdffe #(32)  mhpmc4_ff (.*, .clk(free_l2clk), .en(mhpmc4_wr_en), .din(mhpmc4_ns[31:0]), .dout(mhpmc4[31:0]));
 
    assign mhpmc4h_wr_en0 = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MHPMC4H);
    assign mhpmc4h_wr_en  = mhpmc4h_wr_en0 | mhpmc4_wr_en1;
    assign mhpmc4h_ns[31:0] = mhpmc4h_wr_en0 ? dec_csr_wrdata_r[31:0] : mhpmc4_incr[63:32];
-   rvdffe #(32)  mhpmc4h_ff (.*, .clk(free_l2clk), .en(mhpmc4h_wr_en), .din(mhpmc4h_ns[31:0]), .dout(mhpmc4h[31:0]));
+   mcu_rvdffe #(32)  mhpmc4h_ff (.*, .clk(free_l2clk), .en(mhpmc4h_wr_en), .din(mhpmc4h_ns[31:0]), .dout(mhpmc4h[31:0]));
 
    // ----------------------------------------------------------------------
    // MHPMC5H(RW), MHPMC5(RW)
@@ -2471,12 +2471,12 @@ else
    assign mhpmc5_wr_en  = mhpmc5_wr_en0 | mhpmc5_wr_en1;
    assign mhpmc5_incr[63:0] = {mhpmc5h[31:0],mhpmc5[31:0]} + {63'b0,1'b1};
    assign mhpmc5_ns[31:0] = mhpmc5_wr_en0 ? dec_csr_wrdata_r[31:0] : mhpmc5_incr[31:0];
-   rvdffe #(32)  mhpmc5_ff (.*, .clk(free_l2clk), .en(mhpmc5_wr_en), .din(mhpmc5_ns[31:0]), .dout(mhpmc5[31:0]));
+   mcu_rvdffe #(32)  mhpmc5_ff (.*, .clk(free_l2clk), .en(mhpmc5_wr_en), .din(mhpmc5_ns[31:0]), .dout(mhpmc5[31:0]));
 
    assign mhpmc5h_wr_en0 = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MHPMC5H);
    assign mhpmc5h_wr_en  = mhpmc5h_wr_en0 | mhpmc5_wr_en1;
    assign mhpmc5h_ns[31:0] = mhpmc5h_wr_en0 ? dec_csr_wrdata_r[31:0] : mhpmc5_incr[63:32];
-   rvdffe #(32)  mhpmc5h_ff (.*, .clk(free_l2clk), .en(mhpmc5h_wr_en), .din(mhpmc5h_ns[31:0]), .dout(mhpmc5h[31:0]));
+   mcu_rvdffe #(32)  mhpmc5h_ff (.*, .clk(free_l2clk), .en(mhpmc5h_wr_en), .din(mhpmc5h_ns[31:0]), .dout(mhpmc5h[31:0]));
 
    // ----------------------------------------------------------------------
    // MHPMC6H(RW), MHPMC6(RW)
@@ -2493,12 +2493,12 @@ else
    assign mhpmc6_wr_en  = mhpmc6_wr_en0 | mhpmc6_wr_en1;
    assign mhpmc6_incr[63:0] = {mhpmc6h[31:0],mhpmc6[31:0]} + {63'b0,1'b1};
    assign mhpmc6_ns[31:0] = mhpmc6_wr_en0 ? dec_csr_wrdata_r[31:0] : mhpmc6_incr[31:0];
-   rvdffe #(32)  mhpmc6_ff (.*, .clk(free_l2clk), .en(mhpmc6_wr_en), .din(mhpmc6_ns[31:0]), .dout(mhpmc6[31:0]));
+   mcu_rvdffe #(32)  mhpmc6_ff (.*, .clk(free_l2clk), .en(mhpmc6_wr_en), .din(mhpmc6_ns[31:0]), .dout(mhpmc6[31:0]));
 
    assign mhpmc6h_wr_en0 = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MHPMC6H);
    assign mhpmc6h_wr_en  = mhpmc6h_wr_en0 | mhpmc6_wr_en1;
    assign mhpmc6h_ns[31:0] = mhpmc6h_wr_en0 ? dec_csr_wrdata_r[31:0] : mhpmc6_incr[63:32];
-   rvdffe #(32)  mhpmc6h_ff (.*, .clk(free_l2clk), .en(mhpmc6h_wr_en), .din(mhpmc6h_ns[31:0]), .dout(mhpmc6h[31:0]));
+   mcu_rvdffe #(32)  mhpmc6h_ff (.*, .clk(free_l2clk), .en(mhpmc6h_wr_en), .din(mhpmc6h_ns[31:0]), .dout(mhpmc6h[31:0]));
 
    // ----------------------------------------------------------------------
    // MHPME3(RW)
@@ -2517,28 +2517,28 @@ else
    assign event_r[9:0] = zero_event_r ? '0 : dec_csr_wrdata_r[9:0];
 
    assign wr_mhpme3_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MHPME3);
-   rvdffe #(10)  mhpme3_ff (.*, .en(wr_mhpme3_r), .din(event_r[9:0]), .dout(mhpme3[9:0]));
+   mcu_rvdffe #(10)  mhpme3_ff (.*, .en(wr_mhpme3_r), .din(event_r[9:0]), .dout(mhpme3[9:0]));
    // ----------------------------------------------------------------------
    // MHPME4(RW)
    // [9:0] : Hardware Performance Monitor Event 4
    localparam MHPME4        = 12'h324;
 
    assign wr_mhpme4_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MHPME4);
-   rvdffe #(10)  mhpme4_ff (.*, .en(wr_mhpme4_r), .din(event_r[9:0]), .dout(mhpme4[9:0]));
+   mcu_rvdffe #(10)  mhpme4_ff (.*, .en(wr_mhpme4_r), .din(event_r[9:0]), .dout(mhpme4[9:0]));
    // ----------------------------------------------------------------------
    // MHPME5(RW)
    // [9:0] : Hardware Performance Monitor Event 5
    localparam MHPME5        = 12'h325;
 
    assign wr_mhpme5_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MHPME5);
-   rvdffe #(10)  mhpme5_ff (.*, .en(wr_mhpme5_r), .din(event_r[9:0]), .dout(mhpme5[9:0]));
+   mcu_rvdffe #(10)  mhpme5_ff (.*, .en(wr_mhpme5_r), .din(event_r[9:0]), .dout(mhpme5[9:0]));
    // ----------------------------------------------------------------------
    // MHPME6(RW)
    // [9:0] : Hardware Performance Monitor Event 6
    localparam MHPME6        = 12'h326;
 
    assign wr_mhpme6_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MHPME6);
-   rvdffe #(10)  mhpme6_ff (.*, .en(wr_mhpme6_r), .din(event_r[9:0]), .dout(mhpme6[9:0]));
+   mcu_rvdffe #(10)  mhpme6_ff (.*, .en(wr_mhpme6_r), .din(event_r[9:0]), .dout(mhpme6[9:0]));
 
    //----------------------------------------------------------------------
    // Performance Monitor Counters section ends
@@ -2557,7 +2557,7 @@ else
    localparam MCOUNTEREN                = 12'h306;
 
    assign wr_mcounteren_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MCOUNTEREN);
-   rvdffs #(6) mcounteren_ff (.*, .clk(csr_wr_clk), .en(wr_mcounteren_r), .din({dec_csr_wrdata_r[6:2], dec_csr_wrdata_r[0]}), .dout(mcounteren));
+   mcu_rvdffs #(6) mcounteren_ff (.*, .clk(csr_wr_clk), .en(wr_mcounteren_r), .din({dec_csr_wrdata_r[6:2], dec_csr_wrdata_r[0]}), .dout(mcounteren));
 
 `endif
 
@@ -2574,7 +2574,7 @@ else
    localparam MCOUNTINHIBIT             = 12'h320;
 
    assign wr_mcountinhibit_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MCOUNTINHIBIT);
-   rvdffs #(6)  mcountinhibit_ff (.*, .clk(csr_wr_clk), .en(wr_mcountinhibit_r), .din({dec_csr_wrdata_r[6:2], dec_csr_wrdata_r[0]}), .dout({mcountinhibit[6:2], mcountinhibit[0]}));
+   mcu_rvdffs #(6)  mcountinhibit_ff (.*, .clk(csr_wr_clk), .en(wr_mcountinhibit_r), .din({dec_csr_wrdata_r[6:2], dec_csr_wrdata_r[0]}), .dout({mcountinhibit[6:2], mcountinhibit[0]}));
    assign mcountinhibit[1] = 1'b0;
 
    //--------------------------------------------------------------------------------
@@ -2594,7 +2594,7 @@ else
 
 
   // skid buffer for ints, reduces trace port count by 1
-   rvdffie #(.WIDTH(6), .OVERRIDE(1))  traceskidff (.*,  .clk(clk),
+   mcu_rvdffie #(.WIDTH(6), .OVERRIDE(1))  traceskidff (.*,  .clk(clk),
                         .din ({dec_tlu_exc_cause_wb1_raw[4:0],
                                dec_tlu_int_valid_wb1_raw}),
                         .dout({dec_tlu_exc_cause_wb2[4:0],
@@ -2788,8 +2788,8 @@ import mcu_el2_pkg::*;
 
    assign mitcnt0_ns[31:0]  = wr_mitcnt0_r ? dec_csr_wrdata_r[31:0] : mit0_match_ns ? 'b0 : mitcnt0_inc[31:0];
 
-   rvdffe #(24) mitcnt0_ffb      (.*, .clk(free_l2clk), .en(wr_mitcnt0_r | (mitcnt0_inc_ok & mitcnt0_inc_cout) | mit0_match_ns), .din(mitcnt0_ns[31:8]), .dout(mitcnt0[31:8]));
-   rvdffe #(8)  mitcnt0_ffa      (.*, .clk(free_l2clk), .en(wr_mitcnt0_r | mitcnt0_inc_ok | mit0_match_ns),                       .din(mitcnt0_ns[7:0]), .dout(mitcnt0[7:0]));
+   mcu_rvdffe #(24) mitcnt0_ffb      (.*, .clk(free_l2clk), .en(wr_mitcnt0_r | (mitcnt0_inc_ok & mitcnt0_inc_cout) | mit0_match_ns), .din(mitcnt0_ns[31:8]), .dout(mitcnt0[31:8]));
+   mcu_rvdffe #(8)  mitcnt0_ffa      (.*, .clk(free_l2clk), .en(wr_mitcnt0_r | mitcnt0_inc_ok | mit0_match_ns),                       .din(mitcnt0_ns[7:0]), .dout(mitcnt0[7:0]));
 
    // ----------------------------------------------------------------------
    // MITCNT1 (RW)
@@ -2811,8 +2811,8 @@ import mcu_el2_pkg::*;
 
    assign mitcnt1_ns[31:0]  = wr_mitcnt1_r ? dec_csr_wrdata_r[31:0] : mit1_match_ns ? 'b0 : mitcnt1_inc[31:0];
 
-   rvdffe #(24) mitcnt1_ffb      (.*, .clk(free_l2clk), .en(wr_mitcnt1_r | (mitcnt1_inc_ok & mitcnt1_inc_cout) | mit1_match_ns), .din(mitcnt1_ns[31:8]), .dout(mitcnt1[31:8]));
-   rvdffe #(8)  mitcnt1_ffa      (.*, .clk(free_l2clk), .en(wr_mitcnt1_r | mitcnt1_inc_ok | mit1_match_ns),                       .din(mitcnt1_ns[7:0]), .dout(mitcnt1[7:0]));
+   mcu_rvdffe #(24) mitcnt1_ffb      (.*, .clk(free_l2clk), .en(wr_mitcnt1_r | (mitcnt1_inc_ok & mitcnt1_inc_cout) | mit1_match_ns), .din(mitcnt1_ns[31:8]), .dout(mitcnt1[31:8]));
+   mcu_rvdffe #(8)  mitcnt1_ffa      (.*, .clk(free_l2clk), .en(wr_mitcnt1_r | mitcnt1_inc_ok | mit1_match_ns),                       .din(mitcnt1_ns[7:0]), .dout(mitcnt1[7:0]));
 
 
    // ----------------------------------------------------------------------
@@ -2823,7 +2823,7 @@ import mcu_el2_pkg::*;
 
    assign wr_mitb0_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MITB0);
 
-   rvdffe #(32) mitb0_ff      (.*, .en(wr_mitb0_r), .din(~dec_csr_wrdata_r[31:0]), .dout(mitb0_b[31:0]));
+   mcu_rvdffe #(32) mitb0_ff      (.*, .en(wr_mitb0_r), .din(~dec_csr_wrdata_r[31:0]), .dout(mitb0_b[31:0]));
    assign mitb0[31:0] = ~mitb0_b[31:0];
 
    // ----------------------------------------------------------------------
@@ -2834,7 +2834,7 @@ import mcu_el2_pkg::*;
 
    assign wr_mitb1_r = dec_csr_wen_r_mod & (dec_csr_wraddr_r[11:0] == MITB1);
 
-   rvdffe #(32) mitb1_ff      (.*, .en(wr_mitb1_r), .din(~dec_csr_wrdata_r[31:0]), .dout(mitb1_b[31:0]));
+   mcu_rvdffe #(32) mitb1_ff      (.*, .en(wr_mitb1_r), .din(~dec_csr_wrdata_r[31:0]), .dout(mitb1_b[31:0]));
    assign mitb1[31:0] = ~mitb1_b[31:0];
 
    // ----------------------------------------------------------------------
@@ -2850,7 +2850,7 @@ import mcu_el2_pkg::*;
    assign mitctl0_ns[2:0] = wr_mitctl0_r ? {dec_csr_wrdata_r[2:0]} : {mitctl0[2:0]};
 
    assign mitctl0_0_b_ns = ~mitctl0_ns[0];
-   rvdffs #(3) mitctl0_ff      (.*, .clk(csr_wr_clk), .en(wr_mitctl0_r), .din({mitctl0_ns[2:1], mitctl0_0_b_ns}), .dout({mitctl0[2:1], mitctl0_0_b}));
+   mcu_rvdffs #(3) mitctl0_ff      (.*, .clk(csr_wr_clk), .en(wr_mitctl0_r), .din({mitctl0_ns[2:1], mitctl0_0_b_ns}), .dout({mitctl0[2:1], mitctl0_0_b}));
    assign mitctl0[0] = ~mitctl0_0_b;
 
    // ----------------------------------------------------------------------
@@ -2867,7 +2867,7 @@ import mcu_el2_pkg::*;
    assign mitctl1_ns[3:0] = wr_mitctl1_r ? {dec_csr_wrdata_r[3:0]} : {mitctl1[3:0]};
 
    assign mitctl1_0_b_ns = ~mitctl1_ns[0];
-   rvdffs #(4) mitctl1_ff      (.*, .clk(csr_wr_clk), .en(wr_mitctl1_r), .din({mitctl1_ns[3:1], mitctl1_0_b_ns}), .dout({mitctl1[3:1], mitctl1_0_b}));
+   mcu_rvdffs #(4) mitctl1_ff      (.*, .clk(csr_wr_clk), .en(wr_mitctl1_r), .din({mitctl1_ns[3:1], mitctl1_0_b_ns}), .dout({mitctl1[3:1], mitctl1_0_b}));
    assign mitctl1[0] = ~mitctl1_0_b;
    assign dec_timer_read_d = csr_mitcnt1 | csr_mitcnt0 | csr_mitb1 | csr_mitb0 | csr_mitctl0 | csr_mitctl1;
    assign dec_timer_rddata_d[31:0] = ( ({32{csr_mitcnt0}}      & mitcnt0[31:0]) |
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_trigger.sv b/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_trigger.sv
index f558d6e..67deb85 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_trigger.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/dec/mcu_el2_dec_trigger.sv
@@ -40,7 +40,7 @@ import mcu_el2_pkg::*;
    for (genvar i=0; i<4; i++) begin : genblock
       assign dec_i0_match_data[i][31:0] = ({32{~trigger_pkt_any[i].select & trigger_pkt_any[i].execute}} & {dec_i0_pc_d[31:1], trigger_pkt_any[i].tdata2[0]});      // select=0; do a PC match
 
-      rvmaskandmatch trigger_i0_match (.mask(trigger_pkt_any[i].tdata2[31:0]), .data(dec_i0_match_data[i][31:0]), .masken(trigger_pkt_any[i].match), .match(dec_i0_trigger_data_match[i]));
+      mcu_rvmaskandmatch trigger_i0_match (.mask(trigger_pkt_any[i].tdata2[31:0]), .data(dec_i0_match_data[i][31:0]), .masken(trigger_pkt_any[i].match), .match(dec_i0_trigger_data_match[i]));
 
       assign dec_i0_trigger_match_d[i] = trigger_pkt_any[i].execute & trigger_pkt_any[i].m & dec_i0_trigger_data_match[i];
    end
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/exu/mcu_el2_exu.sv b/src/riscv_core/veer_el2/rtl/rev1p0/exu/mcu_el2_exu.sv
index 8d0160c..4506321 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/exu/mcu_el2_exu.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/exu/mcu_el2_exu.sv
@@ -157,22 +157,22 @@ import mcu_el2_pkg::*;
 
 
 
-   rvdffpcie #(31)                       i_flush_path_x_ff    (.*, .clk(clk),        .en ( x_data_en     ),  .din ( i0_flush_path_d[31:1]         ),  .dout( i0_flush_path_x[31:1]      ) );
-   rvdffe #(32)                          i_csr_rs1_x_ff       (.*, .clk(clk),        .en ( x_data_en_q1  ),  .din ( i0_rs1_d[31:0]                ),  .dout( exu_csr_rs1_x[31:0]        ) );
-   rvdffppe #($bits(mcu_el2_predict_pkt_t)) i_predictpacket_x_ff (.*, .clk(clk),        .en ( x_data_en     ),  .din ( i0_predict_p_d                ),  .dout( i0_predict_p_x             ) );
-   rvdffe #(PREDPIPESIZE)                i_predpipe_x_ff      (.*, .clk(clk),        .en ( x_data_en_q2  ),  .din ( predpipe_d                    ),  .dout( predpipe_x                 ) );
-   rvdffe #(PREDPIPESIZE)                i_predpipe_r_ff      (.*, .clk(clk),        .en ( r_data_en_q2  ),  .din ( predpipe_x                    ),  .dout( predpipe_r                 ) );
+   mcu_rvdffpcie #(31)                       i_flush_path_x_ff    (.*, .clk(clk),        .en ( x_data_en     ),  .din ( i0_flush_path_d[31:1]         ),  .dout( i0_flush_path_x[31:1]      ) );
+   mcu_rvdffe #(32)                          i_csr_rs1_x_ff       (.*, .clk(clk),        .en ( x_data_en_q1  ),  .din ( i0_rs1_d[31:0]                ),  .dout( exu_csr_rs1_x[31:0]        ) );
+   mcu_rvdffppe #($bits(mcu_el2_predict_pkt_t)) i_predictpacket_x_ff (.*, .clk(clk),        .en ( x_data_en     ),  .din ( i0_predict_p_d                ),  .dout( i0_predict_p_x             ) );
+   mcu_rvdffe #(PREDPIPESIZE)                i_predpipe_x_ff      (.*, .clk(clk),        .en ( x_data_en_q2  ),  .din ( predpipe_d                    ),  .dout( predpipe_x                 ) );
+   mcu_rvdffe #(PREDPIPESIZE)                i_predpipe_r_ff      (.*, .clk(clk),        .en ( r_data_en_q2  ),  .din ( predpipe_x                    ),  .dout( predpipe_r                 ) );
 
-   rvdffe #(4+mcu_pt.BHT_GHR_SIZE)          i_x_ff               (.*, .clk(clk),        .en ( x_ctl_en      ),  .din ({i0_valid_d,i0_taken_d,i0_flush_upper_d,i0_pred_correct_upper_d,ghr_x_ns[mcu_pt.BHT_GHR_SIZE-1:0]} ),
+   mcu_rvdffe #(4+mcu_pt.BHT_GHR_SIZE)          i_x_ff               (.*, .clk(clk),        .en ( x_ctl_en      ),  .din ({i0_valid_d,i0_taken_d,i0_flush_upper_d,i0_pred_correct_upper_d,ghr_x_ns[mcu_pt.BHT_GHR_SIZE-1:0]} ),
                                                                                                             .dout({i0_valid_x,i0_taken_x,i0_flush_upper_x,i0_pred_correct_upper_x,ghr_x[mcu_pt.BHT_GHR_SIZE-1:0]}    ) );
 
-   rvdffppe #($bits(mcu_el2_predict_pkt_t)+1) i_r_ff0         (.*, .clk(clk),        .en ( r_ctl_en      ),  .din ({i0_pred_correct_upper_x, i0_predict_p_x}),
+   mcu_rvdffppe #($bits(mcu_el2_predict_pkt_t)+1) i_r_ff0         (.*, .clk(clk),        .en ( r_ctl_en      ),  .din ({i0_pred_correct_upper_x, i0_predict_p_x}),
                                                                                                           .dout({i0_pred_correct_upper_r, i0_pp_r       }) );
 
-   rvdffpcie #(31)                      i_flush_r_ff         (.*, .clk(clk),        .en ( r_data_en     ),  .din ( i0_flush_path_x[31:1]         ),  .dout( i0_flush_path_upper_r[31:1]) );
-   rvdffpcie #(31)                      i_npc_r_ff           (.*, .clk(clk),        .en ( r_data_en     ),  .din ( pred_correct_npc_x[31:1]      ),  .dout( pred_correct_npc_r[31:1]   ) );
+   mcu_rvdffpcie #(31)                      i_flush_r_ff         (.*, .clk(clk),        .en ( r_data_en     ),  .din ( i0_flush_path_x[31:1]         ),  .dout( i0_flush_path_upper_r[31:1]) );
+   mcu_rvdffpcie #(31)                      i_npc_r_ff           (.*, .clk(clk),        .en ( r_data_en     ),  .din ( pred_correct_npc_x[31:1]      ),  .dout( pred_correct_npc_r[31:1]   ) );
 
-   rvdffie #(mcu_pt.BHT_GHR_SIZE+2,1)       i_misc_ff            (.*, .clk(clk),                                .din ({ghr_d_ns[mcu_pt.BHT_GHR_SIZE-1:0], mul_p.valid, dec_i0_branch_d}),
+   mcu_rvdffie #(mcu_pt.BHT_GHR_SIZE+2,1)       i_misc_ff            (.*, .clk(clk),                                .din ({ghr_d_ns[mcu_pt.BHT_GHR_SIZE-1:0], mul_p.valid, dec_i0_branch_d}),
                                                                                                             .dout({ghr_d[mcu_pt.BHT_GHR_SIZE-1:0]   , mul_valid_x, i0_branch_x}) );
 
 
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/exu/mcu_el2_exu_alu_ctl.sv b/src/riscv_core/veer_el2/rtl/rev1p0/exu/mcu_el2_exu_alu_ctl.sv
index 87bad99..a2d1392 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/exu/mcu_el2_exu_alu_ctl.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/exu/mcu_el2_exu_alu_ctl.sv
@@ -206,8 +206,8 @@ import mcu_el2_pkg::*;
 
 
 
-   rvdffpcie #(31) i_pc_ff      (.*, .clk(clk), .en(enable),              .din(pc_in[31:1]),    .dout(pc_ff[31:1]));   // any PC is run through here - doesn't have to be alu
-   rvdffe    #(32) i_result_ff  (.*, .clk(clk), .en(enable & valid_in),   .din(result[31:0]),   .dout(result_ff[31:0]));
+   mcu_rvdffpcie #(31) i_pc_ff      (.*, .clk(clk), .en(enable),              .din(pc_in[31:1]),    .dout(pc_ff[31:1]));   // any PC is run through here - doesn't have to be alu
+   mcu_rvdffe    #(32) i_result_ff  (.*, .clk(clk), .en(enable & valid_in),   .din(result[31:0]),   .dout(result_ff[31:0]));
 
 
 
@@ -512,7 +512,7 @@ import mcu_el2_pkg::*;
    // for a conditional br pcout[] will be the opposite of the branch prediction
    // for jal or pcall, it will be the link address pc+2 or pc+4
 
-   rvbradder ibradder (
+   mcu_rvbradder ibradder (
                      .pc     ( pc_in[31:1]    ),
                      .offset ( brimm_in[12:1] ),
                      .dout   ( pcout[31:1]    ));
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/exu/mcu_el2_exu_div_ctl.sv b/src/riscv_core/veer_el2/rtl/rev1p0/exu/mcu_el2_exu_div_ctl.sv
index 25a712a..72c073e 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/exu/mcu_el2_exu_div_ctl.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/exu/mcu_el2_exu_div_ctl.sv
@@ -199,7 +199,7 @@ module mcu_el2_exu_div_existing_1bit_cheapshortq
 
 
 
-   rvdffe #(23) i_misc_ff        (.*, .clk(clk), .en(div_clken),   .din ({valid_in & ~cancel,
+   mcu_rvdffe #(23) i_misc_ff        (.*, .clk(clk), .en(div_clken),   .din ({valid_in & ~cancel,
                                                                           finish   & ~cancel,
                                                                           run_in,
                                                                           count_in[5:0],
@@ -226,13 +226,13 @@ module mcu_el2_exu_div_existing_1bit_cheapshortq
                                                                           shortq_shift_xx[3:0]}));
 
 
-   rvdffe #(33) mff              (.*, .clk(clk), .en(valid_in),    .din({signed_in & divisor_in[31], divisor_in[31:0]}),   .dout(m_ff[32:0]));
-   rvdffe #(33) qff              (.*, .clk(clk), .en(qff_enable),  .din(q_in[32:0]),                                       .dout(q_ff[32:0]));
-   rvdffe #(33) aff              (.*, .clk(clk), .en(aff_enable),  .din(a_in[32:0]),                                       .dout(a_ff[32:0]));
+   mcu_rvdffe #(33) mff              (.*, .clk(clk), .en(valid_in),    .din({signed_in & divisor_in[31], divisor_in[31:0]}),   .dout(m_ff[32:0]));
+   mcu_rvdffe #(33) qff              (.*, .clk(clk), .en(qff_enable),  .din(q_in[32:0]),                                       .dout(q_ff[32:0]));
+   mcu_rvdffe #(33) aff              (.*, .clk(clk), .en(aff_enable),  .din(a_in[32:0]),                                       .dout(a_ff[32:0]));
 
-   rvtwoscomp #(32) i_dividend_comp (.din(q_ff[31:0]),    .dout(dividend_comp[31:0]));
-   rvtwoscomp #(32) i_q_ff_comp     (.din(q_ff[31:0]),    .dout(q_ff_comp[31:0]));
-   rvtwoscomp #(32) i_a_ff_comp     (.din(a_ff[31:0]),    .dout(a_ff_comp[31:0]));
+   mcu_rvtwoscomp #(32) i_dividend_comp (.din(q_ff[31:0]),    .dout(dividend_comp[31:0]));
+   mcu_rvtwoscomp #(32) i_q_ff_comp     (.din(q_ff[31:0]),    .dout(q_ff_comp[31:0]));
+   mcu_rvtwoscomp #(32) i_a_ff_comp     (.din(a_ff[31:0]),    .dout(a_ff_comp[31:0]));
 
 
    assign valid_x                 = valid_ff_x & ~cancel;
@@ -504,13 +504,13 @@ module mcu_el2_exu_div_new_1bit_fullshortq
 
 
 
-   rvdffe #(19) i_misc_ff        (.*, .clk(clk), .en(misc_enable),    .din ({valid_ff_in, control_in[2:0], by_zero_case,    shortq_enable,    shortq_shift[4:0],    finish,    count_in[6:0]}),
+   mcu_rvdffe #(19) i_misc_ff        (.*, .clk(clk), .en(misc_enable),    .din ({valid_ff_in, control_in[2:0], by_zero_case,    shortq_enable,    shortq_shift[4:0],    finish,    count_in[6:0]}),
                                                                       .dout({valid_ff,    control_ff[2:0], by_zero_case_ff, shortq_enable_ff, shortq_shift_ff[4:0], finish_ff, count_ff[6:0]}));
 
-   rvdffe #(32) i_a_ff           (.*, .clk(clk), .en(a_enable),       .din(a_in[31:0]),           .dout(a_ff[31:0]));
-   rvdffe #(33) i_b_ff           (.*, .clk(clk), .en(b_enable),       .din(b_in[32:0]),           .dout(b_ff[32:0]));
-   rvdffe #(32) i_r_ff           (.*, .clk(clk), .en(rq_enable),      .din(r_in[31:0]),           .dout(r_ff[31:0]));
-   rvdffe #(32) i_q_ff           (.*, .clk(clk), .en(rq_enable),      .din(q_in[31:0]),           .dout(q_ff[31:0]));
+   mcu_rvdffe #(32) i_a_ff           (.*, .clk(clk), .en(a_enable),       .din(a_in[31:0]),           .dout(a_ff[31:0]));
+   mcu_rvdffe #(33) i_b_ff           (.*, .clk(clk), .en(b_enable),       .din(b_in[32:0]),           .dout(b_ff[32:0]));
+   mcu_rvdffe #(32) i_r_ff           (.*, .clk(clk), .en(rq_enable),      .din(r_in[31:0]),           .dout(r_ff[31:0]));
+   mcu_rvdffe #(32) i_q_ff           (.*, .clk(clk), .en(rq_enable),      .din(q_in[31:0]),           .dout(q_ff[31:0]));
 
 
 
@@ -590,7 +590,7 @@ module mcu_el2_exu_div_new_1bit_fullshortq
    assign twos_comp_in[31:0]     = ( {32{twos_comp_q_sel}} & q_ff[31:0] ) |
                                    ( {32{twos_comp_b_sel}} & b_ff[31:0] );
 
-   rvtwoscomp #(32) i_twos_comp  (.din(twos_comp_in[31:0]), .dout(twos_comp_out[31:0]));
+   mcu_rvtwoscomp #(32) i_twos_comp  (.din(twos_comp_in[31:0]), .dout(twos_comp_out[31:0]));
 
 
 
@@ -766,13 +766,13 @@ module mcu_el2_exu_div_new_2bit_fullshortq
 
 
 
-   rvdffe #(18) i_misc_ff        (.*, .clk(clk), .en(misc_enable),    .din ({valid_ff_in, control_in[2:0], by_zero_case,    shortq_enable,    shortq_shift[4:1],    finish,    count_in[6:0]}),
+   mcu_rvdffe #(18) i_misc_ff        (.*, .clk(clk), .en(misc_enable),    .din ({valid_ff_in, control_in[2:0], by_zero_case,    shortq_enable,    shortq_shift[4:1],    finish,    count_in[6:0]}),
                                                                       .dout({valid_ff,    control_ff[2:0], by_zero_case_ff, shortq_enable_ff, shortq_shift_ff[4:1], finish_ff, count_ff[6:0]}));
 
-   rvdffe #(32) i_a_ff           (.*, .clk(clk), .en(a_enable),       .din(a_in[31:0]),           .dout(a_ff[31:0]));
-   rvdffe #(33) i_b_ff           (.*, .clk(clk), .en(b_enable),       .din(b_in[32:0]),           .dout(b_ff[32:0]));
-   rvdffe #(32) i_r_ff           (.*, .clk(clk), .en(rq_enable),      .din(r_in[31:0]),           .dout(r_ff[31:0]));
-   rvdffe #(32) i_q_ff           (.*, .clk(clk), .en(rq_enable),      .din(q_in[31:0]),           .dout(q_ff[31:0]));
+   mcu_rvdffe #(32) i_a_ff           (.*, .clk(clk), .en(a_enable),       .din(a_in[31:0]),           .dout(a_ff[31:0]));
+   mcu_rvdffe #(33) i_b_ff           (.*, .clk(clk), .en(b_enable),       .din(b_in[32:0]),           .dout(b_ff[32:0]));
+   mcu_rvdffe #(32) i_r_ff           (.*, .clk(clk), .en(rq_enable),      .din(r_in[31:0]),           .dout(r_ff[31:0]));
+   mcu_rvdffe #(32) i_q_ff           (.*, .clk(clk), .en(rq_enable),      .din(q_in[31:0]),           .dout(q_ff[31:0]));
 
 
 
@@ -864,7 +864,7 @@ module mcu_el2_exu_div_new_2bit_fullshortq
    assign twos_comp_in[31:0]     = ( {32{twos_comp_q_sel}} & q_ff[31:0] ) |
                                    ( {32{twos_comp_b_sel}} & b_ff[31:0] );
 
-   rvtwoscomp #(32) i_twos_comp  (.din(twos_comp_in[31:0]), .dout(twos_comp_out[31:0]));
+   mcu_rvtwoscomp #(32) i_twos_comp  (.din(twos_comp_in[31:0]), .dout(twos_comp_out[31:0]));
 
 
 
@@ -1048,13 +1048,13 @@ module mcu_el2_exu_div_new_3bit_fullshortq
 
 
 
-   rvdffe #(19) i_misc_ff        (.*, .clk(clk), .en(misc_enable),    .din ({valid_ff_in, control_in[2:0], by_zero_case,    shortq_enable,    shortq_shift[4:0],    finish,    count_in[6:0]}),
+   mcu_rvdffe #(19) i_misc_ff        (.*, .clk(clk), .en(misc_enable),    .din ({valid_ff_in, control_in[2:0], by_zero_case,    shortq_enable,    shortq_shift[4:0],    finish,    count_in[6:0]}),
                                                                       .dout({valid_ff,    control_ff[2:0], by_zero_case_ff, shortq_enable_ff, shortq_shift_ff[4:0], finish_ff, count_ff[6:0]}));
 
-   rvdffe #(33) i_a_ff           (.*, .clk(clk), .en(a_enable),       .din(a_in[32:0]),           .dout(a_ff[32:0]));
-   rvdffe #(33) i_b_ff           (.*, .clk(clk), .en(b_enable),       .din(b_in[32:0]),           .dout(b_ff[32:0]));
-   rvdffe #(33) i_r_ff           (.*, .clk(clk), .en(rq_enable),      .din(r_in[32:0]),           .dout(r_ff[32:0]));
-   rvdffe #(32) i_q_ff           (.*, .clk(clk), .en(rq_enable),      .din(q_in[31:0]),           .dout(q_ff[31:0]));
+   mcu_rvdffe #(33) i_a_ff           (.*, .clk(clk), .en(a_enable),       .din(a_in[32:0]),           .dout(a_ff[32:0]));
+   mcu_rvdffe #(33) i_b_ff           (.*, .clk(clk), .en(b_enable),       .din(b_in[32:0]),           .dout(b_ff[32:0]));
+   mcu_rvdffe #(33) i_r_ff           (.*, .clk(clk), .en(rq_enable),      .din(r_in[32:0]),           .dout(r_ff[32:0]));
+   mcu_rvdffe #(32) i_q_ff           (.*, .clk(clk), .en(rq_enable),      .din(q_in[31:0]),           .dout(q_ff[31:0]));
 
 
 
@@ -1162,7 +1162,7 @@ module mcu_el2_exu_div_new_3bit_fullshortq
    assign twos_comp_in[31:0]     = ( {32{twos_comp_q_sel}} & q_ff[31:0] ) |
                                    ( {32{twos_comp_b_sel}} & b_ff[31:0] );
 
-   rvtwoscomp #(32) i_twos_comp  (.din(twos_comp_in[31:0]), .dout(twos_comp_out[31:0]));
+   mcu_rvtwoscomp #(32) i_twos_comp  (.din(twos_comp_in[31:0]), .dout(twos_comp_out[31:0]));
 
 
 
@@ -1391,13 +1391,13 @@ module mcu_el2_exu_div_new_4bit_fullshortq
 
 
 
-   rvdffe #(19) i_misc_ff        (.*, .clk(clk), .en(misc_enable),     .din ({valid_ff_in, control_in[2:0], by_zero_case,    shortq_enable,    shortq_shift[4:0],    finish,    count_in[6:0]}),
+   mcu_rvdffe #(19) i_misc_ff        (.*, .clk(clk), .en(misc_enable),     .din ({valid_ff_in, control_in[2:0], by_zero_case,    shortq_enable,    shortq_shift[4:0],    finish,    count_in[6:0]}),
                                                                        .dout({valid_ff,    control_ff[2:0], by_zero_case_ff, shortq_enable_ff, shortq_shift_ff[4:0], finish_ff, count_ff[6:0]}));
 
-   rvdffe #(32) i_a_ff           (.*, .clk(clk), .en(a_enable),        .din(a_in[31:0]),           .dout(a_ff[31:0]));
-   rvdffe #(33) i_b_ff           (.*, .clk(clk), .en(b_enable),        .din(b_in[32:0]),           .dout(b_ff[32:0]));
-   rvdffe #(33) i_r_ff           (.*, .clk(clk), .en(rq_enable),       .din(r_in[32:0]),           .dout(r_ff[32:0]));
-   rvdffe #(32) i_q_ff           (.*, .clk(clk), .en(rq_enable),       .din(q_in[31:0]),           .dout(q_ff[31:0]));
+   mcu_rvdffe #(32) i_a_ff           (.*, .clk(clk), .en(a_enable),        .din(a_in[31:0]),           .dout(a_ff[31:0]));
+   mcu_rvdffe #(33) i_b_ff           (.*, .clk(clk), .en(b_enable),        .din(b_in[32:0]),           .dout(b_ff[32:0]));
+   mcu_rvdffe #(33) i_r_ff           (.*, .clk(clk), .en(rq_enable),       .din(r_in[32:0]),           .dout(r_ff[32:0]));
+   mcu_rvdffe #(32) i_q_ff           (.*, .clk(clk), .en(rq_enable),       .din(q_in[31:0]),           .dout(q_ff[31:0]));
 
 
 
@@ -1569,7 +1569,7 @@ module mcu_el2_exu_div_new_4bit_fullshortq
    assign twos_comp_in[31:0]     = ( {32{twos_comp_q_sel}} & q_ff[31:0] ) |
                                    ( {32{twos_comp_b_sel}} & b_ff[31:0] );
 
-   rvtwoscomp #(32) i_twos_comp  (.din(twos_comp_in[31:0]), .dout(twos_comp_out[31:0]));
+   mcu_rvtwoscomp #(32) i_twos_comp  (.din(twos_comp_in[31:0]), .dout(twos_comp_out[31:0]));
 
 
 
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/exu/mcu_el2_exu_mul_ctl.sv b/src/riscv_core/veer_el2/rtl/rev1p0/exu/mcu_el2_exu_mul_ctl.sv
index 36adc8b..d3abecc 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/exu/mcu_el2_exu_mul_ctl.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/exu/mcu_el2_exu_mul_ctl.sv
@@ -177,8 +177,8 @@ import mcu_el2_pkg::*;
    logic signed [32:0]  rs1_x;
    logic signed [32:0]  rs2_x;
 
-   rvdffe #(34) i_a_x_ff         (.*, .clk(clk),  .din({mul_p.low,rs1_ext_in[32:0]}),        .dout({low_x,rs1_x[32:0]}),                 .en(mul_x_enable));
-   rvdffe #(33) i_b_x_ff         (.*, .clk(clk),  .din(           rs2_ext_in[32:0] ),        .dout(       rs2_x[32:0] ),                 .en(mul_x_enable));
+   mcu_rvdffe #(34) i_a_x_ff         (.*, .clk(clk),  .din({mul_p.low,rs1_ext_in[32:0]}),        .dout({low_x,rs1_x[32:0]}),                 .en(mul_x_enable));
+   mcu_rvdffe #(33) i_b_x_ff         (.*, .clk(clk),  .din(           rs2_ext_in[32:0] ),        .dout(       rs2_x[32:0] ),                 .en(mul_x_enable));
 
 
    assign prod_x[65:0]           =  rs1_x  *  rs2_x;
@@ -723,7 +723,7 @@ import mcu_el2_pkg::*;
 
 
 
-   rvdffe #(33) i_bitmanip_ff    (.*, .clk(clk),  .din({bitmanip_sel_d,bitmanip_d[31:0]}),   .dout({bitmanip_sel_x,bitmanip_x[31:0]}),   .en(bit_x_enable));
+   mcu_rvdffe #(33) i_bitmanip_ff    (.*, .clk(clk),  .din({bitmanip_sel_d,bitmanip_d[31:0]}),   .dout({bitmanip_sel_x,bitmanip_x[31:0]}),   .en(bit_x_enable));
 
 
 
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu.sv b/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu.sv
index 8cc3ee1..6391434 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu.sv
@@ -343,7 +343,7 @@ import mcu_el2_pkg::*;
    logic        exu_flush_final_d1;
    assign mppc_ns[31:1] = `EXU.i0_flush_upper_x ? `EXU.exu_i0_pc_x : `EXU.dec_i0_pc_d;
    assign mppc_ns[0] = 1'b0;
-   rvdff #(33)  junk_ff (.*, .clk(active_clk), .din({mppc_ns[31:0], exu_flush_final}), .dout({mppc[31:0], exu_flush_final_d1}));
+   mcu_rvdff #(33)  junk_ff (.*, .clk(active_clk), .din({mppc_ns[31:0], exu_flush_final}), .dout({mppc[31:0], exu_flush_final_d1}));
    logic  tmp_bnk;
    assign tmp_bnk = bpred.bp.btb_sel_f[1];
 
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_aln_ctl.sv b/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_aln_ctl.sv
index a9e5f72..f0af1be 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_aln_ctl.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_aln_ctl.sv
@@ -204,28 +204,28 @@ import mcu_el2_pkg::*;
 
    assign error_stall_in = (error_stall | ifu_async_error_start) & ~exu_flush_final;
 
-   rvdff #(.WIDTH(7))  bundle1ff (.*,
+   mcu_rvdff #(.WIDTH(7))  bundle1ff (.*,
                                   .clk(active_clk),
                                   .din ({wrptr_in[1:0],rdptr_in[1:0],q2off_in,q1off_in,q0off_in}),
                                   .dout({wrptr[1:0],   rdptr[1:0],   q2off,   q1off,   q0off})
                                   );
 
-   rvdffie #(.WIDTH(7),.OVERRIDE(1))  bundle2ff (.*,
+   mcu_rvdffie #(.WIDTH(7),.OVERRIDE(1))  bundle2ff (.*,
                                                  .din ({error_stall_in,f2val_in[1:0],f1val_in[1:0],f0val_in[1:0]}),
                                                  .dout({error_stall,   f2val[1:0],   f1val[1:0],   f0val[1:0]   })
                                                  );
 
 if(mcu_pt.BTB_ENABLE==1) begin : genblock1
-   rvdffe #(BRDATA_SIZE)  brdata2ff   (.*, .clk(clk), .en(qwen[2]),        .din(brdata_in[BRDATA_SIZE-1:0]), .dout(brdata2[BRDATA_SIZE-1:0]));
-   rvdffe #(BRDATA_SIZE)  brdata1ff   (.*, .clk(clk), .en(qwen[1]),        .din(brdata_in[BRDATA_SIZE-1:0]), .dout(brdata1[BRDATA_SIZE-1:0]));
-   rvdffe #(BRDATA_SIZE)  brdata0ff   (.*, .clk(clk), .en(qwen[0]),        .din(brdata_in[BRDATA_SIZE-1:0]), .dout(brdata0[BRDATA_SIZE-1:0]));
-   rvdffe #(MSIZE)        misc2ff     (.*, .clk(clk), .en(qwen[2]),        .din(misc_data_in[MHI:0]),        .dout(misc2[MHI:0]));
-   rvdffe #(MSIZE)        misc1ff     (.*, .clk(clk), .en(qwen[1]),        .din(misc_data_in[MHI:0]),        .dout(misc1[MHI:0]));
-   rvdffe #(MSIZE)        misc0ff     (.*, .clk(clk), .en(qwen[0]),        .din(misc_data_in[MHI:0]),        .dout(misc0[MHI:0]));
+   mcu_rvdffe #(BRDATA_SIZE)  brdata2ff   (.*, .clk(clk), .en(qwen[2]),        .din(brdata_in[BRDATA_SIZE-1:0]), .dout(brdata2[BRDATA_SIZE-1:0]));
+   mcu_rvdffe #(BRDATA_SIZE)  brdata1ff   (.*, .clk(clk), .en(qwen[1]),        .din(brdata_in[BRDATA_SIZE-1:0]), .dout(brdata1[BRDATA_SIZE-1:0]));
+   mcu_rvdffe #(BRDATA_SIZE)  brdata0ff   (.*, .clk(clk), .en(qwen[0]),        .din(brdata_in[BRDATA_SIZE-1:0]), .dout(brdata0[BRDATA_SIZE-1:0]));
+   mcu_rvdffe #(MSIZE)        misc2ff     (.*, .clk(clk), .en(qwen[2]),        .din(misc_data_in[MHI:0]),        .dout(misc2[MHI:0]));
+   mcu_rvdffe #(MSIZE)        misc1ff     (.*, .clk(clk), .en(qwen[1]),        .din(misc_data_in[MHI:0]),        .dout(misc1[MHI:0]));
+   mcu_rvdffe #(MSIZE)        misc0ff     (.*, .clk(clk), .en(qwen[0]),        .din(misc_data_in[MHI:0]),        .dout(misc0[MHI:0]));
 end
 else begin : genblock1
 
-   rvdffie #((MSIZE*3)+(BRDATA_SIZE*3))    miscff      (.*,
+   mcu_rvdffie #((MSIZE*3)+(BRDATA_SIZE*3))    miscff      (.*,
                                                         .din({qwen[2] ? {misc_data_in[MHI:0], brdata_in[BRDATA_SIZE-1:0]} : {misc2[MHI:0], brdata2[BRDATA_SIZE-1:0]},
                                                               qwen[1] ? {misc_data_in[MHI:0], brdata_in[BRDATA_SIZE-1:0]} : {misc1[MHI:0], brdata1[BRDATA_SIZE-1:0]},
                                                               qwen[0] ? {misc_data_in[MHI:0], brdata_in[BRDATA_SIZE-1:0]} : {misc0[MHI:0], brdata0[BRDATA_SIZE-1:0]}}),
@@ -237,13 +237,13 @@ end
 
   logic [31:1] q2pc, q1pc, q0pc;
 
-   rvdffe #(31)           q2pcff        (.*, .clk(clk), .en(qwen[2]),        .din(ifu_fetch_pc[31:1]),     .dout(q2pc[31:1]));
-   rvdffe #(31)           q1pcff        (.*, .clk(clk), .en(qwen[1]),        .din(ifu_fetch_pc[31:1]),     .dout(q1pc[31:1]));
-   rvdffe #(31)           q0pcff        (.*, .clk(clk), .en(qwen[0]),        .din(ifu_fetch_pc[31:1]),     .dout(q0pc[31:1]));
+   mcu_rvdffe #(31)           q2pcff        (.*, .clk(clk), .en(qwen[2]),        .din(ifu_fetch_pc[31:1]),     .dout(q2pc[31:1]));
+   mcu_rvdffe #(31)           q1pcff        (.*, .clk(clk), .en(qwen[1]),        .din(ifu_fetch_pc[31:1]),     .dout(q1pc[31:1]));
+   mcu_rvdffe #(31)           q0pcff        (.*, .clk(clk), .en(qwen[0]),        .din(ifu_fetch_pc[31:1]),     .dout(q0pc[31:1]));
 
-   rvdffe #(32)           q2ff        (.*, .clk(clk), .en(qwen[2]),        .din(ifu_fetch_data_f[31:0]),     .dout(q2[31:0]));
-   rvdffe #(32)           q1ff        (.*, .clk(clk), .en(qwen[1]),        .din(ifu_fetch_data_f[31:0]),     .dout(q1[31:0]));
-   rvdffe #(32)           q0ff        (.*, .clk(clk), .en(qwen[0]),        .din(ifu_fetch_data_f[31:0]),     .dout(q0[31:0]));
+   mcu_rvdffe #(32)           q2ff        (.*, .clk(clk), .en(qwen[2]),        .din(ifu_fetch_data_f[31:0]),     .dout(q2[31:0]));
+   mcu_rvdffe #(32)           q1ff        (.*, .clk(clk), .en(qwen[1]),        .din(ifu_fetch_data_f[31:0]),     .dout(q1[31:0]));
+   mcu_rvdffe #(32)           q0ff        (.*, .clk(clk), .en(qwen[0]),        .din(ifu_fetch_data_f[31:0]),     .dout(q0[31:0]));
 
 
    // new queue control logic
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_bp_ctl.sv b/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_bp_ctl.sv
index b6990f3..9767ad2 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_bp_ctl.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_bp_ctl.sv
@@ -351,7 +351,7 @@ logic exu_flush_final_d1;
                                                ({2{fetch_start_f[1]}} & {tag_match_way1_expanded_p1_f[0], tag_match_way1_expanded_f[1]}) );
 
 
-   rvdffe #(LRU_SIZE) btb_lru_ff (.*, .en(ifc_fetch_req_f | exu_mp_valid),
+   mcu_rvdffe #(LRU_SIZE) btb_lru_ff (.*, .en(ifc_fetch_req_f | exu_mp_valid),
                                     .din(btb_lru_b0_ns[(LRU_SIZE)-1:0]),
                                    .dout(btb_lru_b0_f[(LRU_SIZE)-1:0]));
 
@@ -464,7 +464,7 @@ logic exu_flush_final_d1;
                                          ({mcu_pt.BHT_GHR_SIZE{~exu_flush_final_d1 & ifc_fetch_req_f & ic_hit_f & ~leak_one_f_d1}} & merged_ghr[mcu_pt.BHT_GHR_SIZE-1:0]) |
                                          ({mcu_pt.BHT_GHR_SIZE{~exu_flush_final_d1 & ~(ifc_fetch_req_f & ic_hit_f & ~leak_one_f_d1)}} & fghr[mcu_pt.BHT_GHR_SIZE-1:0]));
 
-   rvdffie #(.WIDTH(mcu_pt.BHT_GHR_SIZE+3),.OVERRIDE(1)) fetchghr (.*,
+   mcu_rvdffie #(.WIDTH(mcu_pt.BHT_GHR_SIZE+3),.OVERRIDE(1)) fetchghr (.*,
                                           .din ({exu_flush_final, exu_mp_way, leak_one_f, fghr_ns[mcu_pt.BHT_GHR_SIZE-1:0]}),
                                           .dout({exu_flush_final_d1, exu_mp_way_f, leak_one_f_d1, fghr[mcu_pt.BHT_GHR_SIZE-1:0]}));
 
@@ -513,7 +513,7 @@ assign use_fa_plus = (~bht_dir_f[0] & ~fetch_start_f[0] & ~btb_rd_pc4_f);
    assign bp_total_branch_offset_f =  bloc_f[1] ^ btb_rd_pc4_f;
 
    logic [31:2] adder_pc_in_f, ifc_fetch_adder_prior;
-   rvdfflie #(.WIDTH(30), .LEFT(19)) faddrf_ff (.*, .en(ifc_fetch_req_f & ~ifu_bp_hit_taken_f & ic_hit_f), .din(ifc_fetch_addr_f[31:2]), .dout(ifc_fetch_adder_prior[31:2]));
+   mcu_rvdfflie #(.WIDTH(30), .LEFT(19)) faddrf_ff (.*, .en(ifc_fetch_req_f & ~ifu_bp_hit_taken_f & ic_hit_f), .din(ifc_fetch_addr_f[31:2]), .dout(ifc_fetch_adder_prior[31:2]));
 
 
    assign ifu_bp_poffset_f[11:0] = btb_rd_tgt_f[11:0];
@@ -522,7 +522,7 @@ assign use_fa_plus = (~bht_dir_f[0] & ~fetch_start_f[0] & ~btb_rd_pc4_f);
                                    ({30{ btb_fg_crossing_f}} & ifc_fetch_adder_prior[31:2]) |
                                    ({30{~btb_fg_crossing_f & ~use_fa_plus}} & ifc_fetch_addr_f[31:2]));
 
-   rvbradder predtgt_addr (.pc({adder_pc_in_f[31:2], bp_total_branch_offset_f}),
+   mcu_rvbradder predtgt_addr (.pc({adder_pc_in_f[31:2], bp_total_branch_offset_f}),
                          .offset(btb_rd_tgt_f[11:0]),
                          .dout(bp_btb_target_adder_f[31:1])
                          );
@@ -535,7 +535,7 @@ assign use_fa_plus = (~bht_dir_f[0] & ~fetch_start_f[0] & ~btb_rd_pc4_f);
    // Return Stack
    // ----------------------------------------------------------------------
 
-   rvbradder rs_addr (.pc({adder_pc_in_f[31:2], bp_total_branch_offset_f}),
+   mcu_rvbradder rs_addr (.pc({adder_pc_in_f[31:2], bp_total_branch_offset_f}),
                     .offset({11'b0,  ~btb_rd_pc4_f}),
                     .dout(bp_rs_call_target_f[31:1])
                          );
@@ -564,7 +564,7 @@ assign use_fa_plus = (~bht_dir_f[0] & ~fetch_start_f[0] & ~btb_rd_pc4_f);
                                     ({32{rs_pop}}  & rets_out[i+1][31:0]) );
          assign rsenable[i] = rs_push | rs_pop;
       end
-      rvdffe #(32) rets_ff (.*, .en(rsenable[i]), .din(rets_in[i][31:0]), .dout(rets_out[i][31:0]));
+      mcu_rvdffe #(32) rets_ff (.*, .en(rsenable[i]), .din(rets_in[i][31:0]), .dout(rets_out[i][31:0]));
 
    end : retstack
 
@@ -652,13 +652,13 @@ assign use_fa_plus = (~bht_dir_f[0] & ~fetch_start_f[0] & ~btb_rd_pc4_f);
 
       for (j=0 ; j<LRU_SIZE ; j++) begin : BTB_FLOPS
          // Way 0
-         rvdffe #(17+mcu_pt.BTB_BTAG_SIZE) btb_bank0_way0 (.*,
+         mcu_rvdffe #(17+mcu_pt.BTB_BTAG_SIZE) btb_bank0_way0 (.*,
                     .en(((btb_wr_addr[mcu_pt.BTB_ADDR_HI:mcu_pt.BTB_ADDR_LO] == j) & btb_wr_en_way0)),
                     .din        (btb_wr_data[BTB_DWIDTH-1:0]),
                     .dout       (btb_bank0_rd_data_way0_out[j]));
 
          // Way 1
-         rvdffe #(17+mcu_pt.BTB_BTAG_SIZE) btb_bank0_way1 (.*,
+         mcu_rvdffe #(17+mcu_pt.BTB_BTAG_SIZE) btb_bank0_way1 (.*,
                     .en(((btb_wr_addr[mcu_pt.BTB_ADDR_HI:mcu_pt.BTB_ADDR_LO] == j) & btb_wr_en_way1)),
                     .din        (btb_wr_data[BTB_DWIDTH-1:0]),
                     .dout       (btb_bank0_rd_data_way1_out[j]));
@@ -793,7 +793,7 @@ end // if (!mcu_pt.BTB_FULLYA)
       assign wr0_en[j] = ((btb_fa_wr_addr0[BTB_FA_INDEX:0] == j) & (exu_mp_valid_write & ~exu_mp_pkt.way)) |
                          ((dec_fa_error_index == j) & dec_tlu_error_wb);
 
-      rvdffe #(BTB_DWIDTH) btb_fa (.*, .clk(clk),
+      mcu_rvdffe #(BTB_DWIDTH) btb_fa (.*, .clk(clk),
                                    .en  (wr0_en[j]),
                                    .din (btb_wr_data[BTB_DWIDTH-1:0]),
                                    .dout(btbdata[j]));
@@ -813,7 +813,7 @@ end // if (!mcu_pt.BTB_FULLYA)
    assign write_used = btb_used_reset | ifu_bp_hit_taken_f | exu_mp_valid_write | dec_tlu_error_wb;
 
 
-   rvdffe #(mcu_pt.BTB_SIZE) btb_usedf (.*, .clk(clk),
+   mcu_rvdffe #(mcu_pt.BTB_SIZE) btb_usedf (.*, .clk(clk),
                     .en  (write_used),
                     .din (btb_used_ns[mcu_pt.BTB_SIZE-1:0]),
                     .dout(btb_used[mcu_pt.BTB_SIZE-1:0]));
@@ -857,7 +857,7 @@ end // block: fa
 
 
 
-          rvdffs_fpga #(2) bht_bank (.*,
+          mcu_rvdffs_fpga #(2) bht_bank (.*,
                     .clk        (bht_bank_clk[i][k]),
                     .en         (bank_sel),
                     .rawclk     (clk),
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_ic_mem.sv b/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_ic_mem.sv
index c34b522..1a2b02e 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_ic_mem.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_ic_mem.sv
@@ -232,7 +232,7 @@ import mcu_el2_pkg::*;
    assign ic_rw_addr_bank_q[1] = ic_rw_addr_q[mcu_pt.ICACHE_INDEX_HI:mcu_pt.ICACHE_DATA_INDEX_LO];
 
 
-   rvdffie #(.WIDTH(int'(mcu_pt.ICACHE_TAG_INDEX_LO+mcu_pt.ICACHE_BANKS_WAY+mcu_pt.ICACHE_NUM_WAYS)),.OVERRIDE(1)) miscff
+   mcu_rvdffie #(.WIDTH(int'(mcu_pt.ICACHE_TAG_INDEX_LO+mcu_pt.ICACHE_BANKS_WAY+mcu_pt.ICACHE_NUM_WAYS)),.OVERRIDE(1)) miscff
             (.*,
              .din({ ic_b_rden[mcu_pt.ICACHE_BANKS_WAY-1:0],   ic_rw_addr_q[mcu_pt.ICACHE_TAG_INDEX_LO-1:1], ic_debug_rd_way_en[mcu_pt.ICACHE_NUM_WAYS-1:0],   ic_debug_rd_en}),
              .dout({ic_b_rden_ff[mcu_pt.ICACHE_BANKS_WAY-1:0],ic_rw_addr_ff[mcu_pt.ICACHE_TAG_INDEX_LO-1:1],ic_debug_rd_way_en_ff[mcu_pt.ICACHE_NUM_WAYS-1:0],ic_debug_rd_en_ff})
@@ -250,7 +250,7 @@ import mcu_el2_pkg::*;
     logic [mcu_pt.ICACHE_NUM_WAYS-1:0][mcu_pt.ICACHE_BANKS_WAY-1:0]                                 any_addr_match_up;
 
 `define mcu_el2_IC_DATA_SRAM(depth,width)                                                                               \
-           ram_``depth``x``width ic_bank_sb_way_data (                                                               \
+           mcu_ram_``depth``x``width ic_bank_sb_way_data (                                                               \
                                      .ME(ic_bank_way_clken_final_up[i][k]),                                          \
                                      .WE (ic_b_sb_wren[k][i]),                                                       \
                                      .D  (ic_sb_wr_data[k][``width-1:0]),                                            \
@@ -272,7 +272,7 @@ import mcu_el2_pkg::*;
                                     );  \
 if (mcu_pt.ICACHE_BYPASS_ENABLE == 1) begin \
                  assign wrptr_in_up[i][k] = (wrptr_up[i][k] == (mcu_pt.ICACHE_NUM_BYPASS-1)) ? '0 : (wrptr_up[i][k] + 1'd1);                                    \
-                 rvdffs  #(mcu_pt.ICACHE_NUM_BYPASS_WIDTH)  wrptr_ff(.*, .clk(active_clk),  .en(|write_bypass_en_up[i][k]), .din (wrptr_in_up[i][k]), .dout(wrptr_up[i][k])) ;     \
+                 mcu_rvdffs  #(mcu_pt.ICACHE_NUM_BYPASS_WIDTH)  wrptr_ff(.*, .clk(active_clk),  .en(|write_bypass_en_up[i][k]), .din (wrptr_in_up[i][k]), .dout(wrptr_up[i][k])) ;     \
                  assign ic_b_sram_en_up[i][k]              = ic_bank_way_clken[k][i];                             \
                  assign ic_b_read_en_up[i][k]              =  ic_b_sram_en_up[i][k] &   ic_b_sb_rden[k][i];       \
                  assign ic_b_write_en_up[i][k]             =  ic_b_sram_en_up[i][k] &   ic_b_sb_wren[k][i];       \
@@ -297,11 +297,11 @@ if (mcu_pt.ICACHE_BYPASS_ENABLE == 1) begin \
                                                                                                                                                     \
                    assign write_bypass_en_up[i][k][l] = ic_b_read_en_up[i][k]  &  ~any_addr_match_up[i][k] & (wrptr_up[i][k] == l);                 \
                                                                                                                                                     \
-                   rvdff  #(1)  write_bypass_ff (.*, .clk(active_clk),                                                                 .din(write_bypass_en_up[i][k][l]), .dout(write_bypass_en_ff_up[i][k][l])) ; \
-                   rvdffs #(1)  index_val_ff    (.*, .clk(active_clk), .en(write_bypass_en_up[i][k][l] | ic_b_clear_en_up[i][k][l]),   .din(~ic_b_clear_en_up[i][k][l]),  .dout(index_valid_up[i][k][l])) ;       \
-                   rvdff  #(1)  sel_hold_ff     (.*, .clk(active_clk),                                                                 .din(sel_bypass_up[i][k][l]),      .dout(sel_bypass_ff_up[i][k][l])) ;     \
-                   rvdffe #((31-mcu_pt.ICACHE_DATA_INDEX_LO+1)) ic_addr_index    (.*, .en(write_bypass_en_up[i][k][l]),    .din (ic_b_rw_addr_up[i][k]), .dout(wb_index_hold_up[i][k][l]));         \
-                   rvdffe #(``width)                             rd_data_hold_ff  (.*, .en(write_bypass_en_ff_up[i][k][l]), .din (wb_dout_pre_up[i][k]),  .dout(wb_dout_hold_up[i][k][l]));     \
+                   mcu_rvdff  #(1)  write_bypass_ff (.*, .clk(active_clk),                                                                 .din(write_bypass_en_up[i][k][l]), .dout(write_bypass_en_ff_up[i][k][l])) ; \
+                   mcu_rvdffs #(1)  index_val_ff    (.*, .clk(active_clk), .en(write_bypass_en_up[i][k][l] | ic_b_clear_en_up[i][k][l]),   .din(~ic_b_clear_en_up[i][k][l]),  .dout(index_valid_up[i][k][l])) ;       \
+                   mcu_rvdff  #(1)  sel_hold_ff     (.*, .clk(active_clk),                                                                 .din(sel_bypass_up[i][k][l]),      .dout(sel_bypass_ff_up[i][k][l])) ;     \
+                   mcu_rvdffe #((31-mcu_pt.ICACHE_DATA_INDEX_LO+1)) ic_addr_index    (.*, .en(write_bypass_en_up[i][k][l]),    .din (ic_b_rw_addr_up[i][k]), .dout(wb_index_hold_up[i][k][l]));         \
+                   mcu_rvdffe #(``width)                             rd_data_hold_ff  (.*, .en(write_bypass_en_ff_up[i][k][l]), .din (wb_dout_pre_up[i][k]),  .dout(wb_dout_hold_up[i][k][l]));     \
                 end                                                                                                                       \
                 always_comb begin                                                                                                         \
                  any_bypass_up[i][k] = '0;                                                                                                \
@@ -401,7 +401,7 @@ if (mcu_pt.ICACHE_BYPASS_ENABLE == 1) begin \
 // SRAM macros
 
 `define mcu_el2_PACKED_IC_DATA_SRAM(depth,width,waywidth)                                                                                                 \
-            ram_be_``depth``x``width  ic_bank_sb_way_data (                                                                                           \
+            mcu_ram_be_``depth``x``width  ic_bank_sb_way_data (                                                                                           \
                             .CLK   (clk),                                                                                                             \
                             .WE    (|ic_b_sb_wren[k]),                                                    // OR of all the ways in the bank           \
                             .WEM   (ic_b_sb_bit_en_vec[k]),                                               // 284 bits of bit enables                  \
@@ -427,7 +427,7 @@ if (mcu_pt.ICACHE_BYPASS_ENABLE == 1) begin \
                                                                                                                                                                                                       \
                  assign wrptr_in[k] = (wrptr[k] == (mcu_pt.ICACHE_NUM_BYPASS-1)) ? '0 : (wrptr[k] + 1'd1);                                                                                                \
                                                                                                                                                                                                       \
-                 rvdffs  #(mcu_pt.ICACHE_NUM_BYPASS_WIDTH)  wrptr_ff(.*, .clk(active_clk), .en(|write_bypass_en[k]), .din (wrptr_in[k]), .dout(wrptr[k])) ;                                                                       \
+                 mcu_rvdffs  #(mcu_pt.ICACHE_NUM_BYPASS_WIDTH)  wrptr_ff(.*, .clk(active_clk), .en(|write_bypass_en[k]), .din (wrptr_in[k]), .dout(wrptr[k])) ;                                                                       \
                                                                                                                                                                                                       \
                  assign ic_b_sram_en[k]              = |ic_bank_way_clken[k];                                                                                                                         \
                                                                                                                                                                                                       \
@@ -460,12 +460,12 @@ if (mcu_pt.ICACHE_BYPASS_ENABLE == 1) begin \
                                                                                                                                                                                                       \
                    assign write_bypass_en[k][l] = ic_b_read_en[k]  &  ~any_addr_match[k] & (wrptr[k] == l);                                                                                           \
                                                                                                                                                                                                       \
-                   rvdff  #(1)  write_bypass_ff (.*, .clk(active_clk),                                                     .din(write_bypass_en[k][l]), .dout(write_bypass_en_ff[k][l])) ;                            \
-                   rvdffs #(1)  index_val_ff    (.*, .clk(active_clk), .en(write_bypass_en[k][l] | ic_b_clear_en[k][l]),   .din(~ic_b_clear_en[k][l]),  .dout(index_valid[k][l])) ;                                   \
-                   rvdff  #(1)  sel_hold_ff     (.*, .clk(active_clk),                                                     .din(sel_bypass[k][l]),      .dout(sel_bypass_ff[k][l])) ;                                 \
+                   mcu_rvdff  #(1)  write_bypass_ff (.*, .clk(active_clk),                                                     .din(write_bypass_en[k][l]), .dout(write_bypass_en_ff[k][l])) ;                            \
+                   mcu_rvdffs #(1)  index_val_ff    (.*, .clk(active_clk), .en(write_bypass_en[k][l] | ic_b_clear_en[k][l]),   .din(~ic_b_clear_en[k][l]),  .dout(index_valid[k][l])) ;                                   \
+                   mcu_rvdff  #(1)  sel_hold_ff     (.*, .clk(active_clk),                                                     .din(sel_bypass[k][l]),      .dout(sel_bypass_ff[k][l])) ;                                 \
                                                                                                                                                                                                       \
-                   rvdffe #((31-mcu_pt.ICACHE_DATA_INDEX_LO+1)) ic_addr_index    (.*, .en(write_bypass_en[k][l]),    .din (ic_b_rw_addr[k]),      .dout(wb_index_hold[k][l]));                            \
-                   rvdffe #((``waywidth*mcu_pt.ICACHE_NUM_WAYS))        rd_data_hold_ff  (.*, .en(write_bypass_en_ff[k][l]), .din (wb_packeddout_pre[k]), .dout(wb_packeddout_hold[k][l]));                       \
+                   mcu_rvdffe #((31-mcu_pt.ICACHE_DATA_INDEX_LO+1)) ic_addr_index    (.*, .en(write_bypass_en[k][l]),    .din (ic_b_rw_addr[k]),      .dout(wb_index_hold[k][l]));                            \
+                   mcu_rvdffe #((``waywidth*mcu_pt.ICACHE_NUM_WAYS))        rd_data_hold_ff  (.*, .en(write_bypass_en_ff[k][l]), .din (wb_packeddout_pre[k]), .dout(wb_packeddout_hold[k][l]));                       \
                                                                                                                                                                                                       \
                 end // block: BYPASS                                                                                                                                                                  \
                                                                                                                                                                                                       \
@@ -713,7 +713,7 @@ if (mcu_pt.ICACHE_BYPASS_ENABLE == 1) begin \
     assign bank_check_en[i]    = |ic_rd_hit[mcu_pt.ICACHE_NUM_WAYS-1:0] & ((i==0) | (~ic_cacheline_wrap_ff & (ic_b_rden_ff[mcu_pt.ICACHE_BANKS_WAY-1:0] == {mcu_pt.ICACHE_BANKS_WAY{1'b1}})));  // always check the lower address bank, and drop the upper address bank on a CL wrap
     assign wb_dout_ecc_bank[i] = wb_dout_ecc[(71*i)+70:(71*i)];
 
-   rvecc_decode_64  ecc_decode_64 (
+   mcu_rvecc_decode_64  ecc_decode_64 (
                            .en               (bank_check_en[i]),
                            .din              (wb_dout_ecc_bank[i][63 : 0]),                // [134:71],  [63:0]
                            .ecc_in           (wb_dout_ecc_bank[i][70 : 64]),               // [141:135] [70:64]
@@ -769,7 +769,7 @@ else  begin : ECC0_MUX
   for (genvar i=0; i < mcu_pt.ICACHE_BANKS_WAY ; i++) begin : ic_par_error
     assign bank_check_en[i]    = |ic_rd_hit[mcu_pt.ICACHE_NUM_WAYS-1:0] & ((i==0) | (~ic_cacheline_wrap_ff & (ic_b_rden_ff[mcu_pt.ICACHE_BANKS_WAY-1:0] == {mcu_pt.ICACHE_BANKS_WAY{1'b1}})));  // always check the lower address bank, and drop the upper address bank on a CL wrap
      for (genvar j=0; j<4; j++)  begin : parity
-      rveven_paritycheck pchk (
+      mcu_rveven_paritycheck pchk (
                            .data_in   (wb_dout_ecc_bank[i][16*(j+1)-1: 16*j]),
                            .parity_in (wb_dout_ecc_bank[i][64+j]),
                            .parity_err(ic_parerr_bank[i][j] )
@@ -855,12 +855,12 @@ import mcu_el2_pkg::*;
    assign  ic_tag_wren [mcu_pt.ICACHE_NUM_WAYS-1:0]  = ic_wr_en[mcu_pt.ICACHE_NUM_WAYS-1:0] & {mcu_pt.ICACHE_NUM_WAYS{(ic_rw_addr[mcu_pt.ICACHE_BEAT_ADDR_HI:4] == {mcu_pt.ICACHE_BEAT_BITS-1{1'b1}})}} ;
    assign  ic_tag_clken[mcu_pt.ICACHE_NUM_WAYS-1:0]  = {mcu_pt.ICACHE_NUM_WAYS{ic_rd_en | clk_override}} | ic_wr_en[mcu_pt.ICACHE_NUM_WAYS-1:0] | ic_debug_wr_way_en[mcu_pt.ICACHE_NUM_WAYS-1:0] | ic_debug_rd_way_en[mcu_pt.ICACHE_NUM_WAYS-1:0];
 
-   rvdff #(1) rd_en_ff (.*, .clk(active_clk),
+   mcu_rvdff #(1) rd_en_ff (.*, .clk(active_clk),
                     .din (ic_rd_en),
                     .dout(ic_rd_en_ff)) ;
 
 
-   rvdffie #(32-mcu_pt.ICACHE_TAG_LO) adr_ff (.*,
+   mcu_rvdffie #(32-mcu_pt.ICACHE_TAG_LO) adr_ff (.*,
                                           .din ({ic_rw_addr[31:mcu_pt.ICACHE_TAG_LO]}),
                                           .dout({ic_rw_addr_ff[31:mcu_pt.ICACHE_TAG_LO]})
                                           );
@@ -878,7 +878,7 @@ import mcu_el2_pkg::*;
 
 if (mcu_pt.ICACHE_TAG_LO == 11) begin: SMALLEST
  if (mcu_pt.ICACHE_ECC) begin : ECC1_W
-           rvecc_encode  tag_ecc_encode (
+           mcu_rvecc_encode  tag_ecc_encode (
                                   .din    ({{mcu_pt.ICACHE_TAG_LO{1'b0}}, ic_rw_addr[31:mcu_pt.ICACHE_TAG_LO]}),
                                   .ecc_out({ ic_tag_ecc[6:0]}));
 
@@ -888,7 +888,7 @@ if (mcu_pt.ICACHE_TAG_LO == 11) begin: SMALLEST
  end
 
  else begin : ECC0_W
-           rveven_paritygen #(32-mcu_pt.ICACHE_TAG_LO) pargen  (.data_in   (ic_rw_addr[31:mcu_pt.ICACHE_TAG_LO]),
+           mcu_rveven_paritygen #(32-mcu_pt.ICACHE_TAG_LO) pargen  (.data_in   (ic_rw_addr[31:mcu_pt.ICACHE_TAG_LO]),
                                                  .parity_out(ic_tag_parity));
 
    assign  ic_tag_wr_data[21:0] = (ic_debug_wr_en & ic_debug_tag_array) ?
@@ -901,7 +901,7 @@ end // block: SMALLEST
 
 else begin: OTHERS
   if(mcu_pt.ICACHE_ECC) begin :ECC1_W
-           rvecc_encode  tag_ecc_encode (
+           mcu_rvecc_encode  tag_ecc_encode (
                                   .din    ({{mcu_pt.ICACHE_TAG_LO{1'b0}}, ic_rw_addr[31:mcu_pt.ICACHE_TAG_LO]}),
                                   .ecc_out({ ic_tag_ecc[6:0]}));
 
@@ -912,7 +912,7 @@ else begin: OTHERS
   end
   else  begin :ECC0_W
    logic   ic_tag_parity ;
-           rveven_paritygen #(32-mcu_pt.ICACHE_TAG_LO) pargen  (.data_in   (ic_rw_addr[31:mcu_pt.ICACHE_TAG_LO]),
+           mcu_rveven_paritygen #(32-mcu_pt.ICACHE_TAG_LO) pargen  (.data_in   (ic_rw_addr[31:mcu_pt.ICACHE_TAG_LO]),
                                                  .parity_out(ic_tag_parity));
    assign  ic_tag_wr_data[21:0] = (ic_debug_wr_en & ic_debug_tag_array) ?
                                   {ic_debug_wr_data[64], ic_debug_wr_data[31:11]} :
@@ -926,7 +926,7 @@ end // block: OTHERS
                                                 ic_debug_addr[mcu_pt.ICACHE_INDEX_HI: mcu_pt.ICACHE_TAG_INDEX_LO] :
                                                 ic_rw_addr[mcu_pt.ICACHE_INDEX_HI: mcu_pt.ICACHE_TAG_INDEX_LO] ;
 
-   rvdff #(mcu_pt.ICACHE_NUM_WAYS) tag_rd_wy_ff (.*, .clk(active_clk),
+   mcu_rvdff #(mcu_pt.ICACHE_NUM_WAYS) tag_rd_wy_ff (.*, .clk(active_clk),
                     .din ({ic_debug_rd_way_en[mcu_pt.ICACHE_NUM_WAYS-1:0]}),
                     .dout({ic_debug_rd_way_en_ff[mcu_pt.ICACHE_NUM_WAYS-1:0]}));
 
@@ -959,7 +959,7 @@ end // block: OTHERS
     logic [mcu_pt.ICACHE_NUM_WAYS-1:0]        ic_tag_clken_final;
 
       `define mcu_el2_IC_TAG_SRAM(depth,width)                                                                                                      \
-                                  ram_``depth``x``width  ic_way_tag (                                                                           \
+                                  mcu_ram_``depth``x``width  ic_way_tag (                                                                           \
                                 .ME(ic_tag_clken_final[i]),                                                                                     \
                                 .WE (ic_tag_wren_q[i]),                                                                                         \
                                 .D  (ic_tag_wr_data[``width-1:0]),                                                                              \
@@ -989,7 +989,7 @@ end // block: OTHERS
                                                                                                                                                                                                       \
                  assign wrptr_in[i] = (wrptr[i] == (mcu_pt.ICACHE_TAG_NUM_BYPASS-1)) ? '0 : (wrptr[i] + 1'd1);                                                                                            \
                                                                                                                                                                                                       \
-                 rvdffs  #(mcu_pt.ICACHE_TAG_NUM_BYPASS_WIDTH)  wrptr_ff(.*, .clk(active_clk), .en(|write_bypass_en[i]), .din (wrptr_in[i]), .dout(wrptr[i])) ;                                           \
+                 mcu_rvdffs  #(mcu_pt.ICACHE_TAG_NUM_BYPASS_WIDTH)  wrptr_ff(.*, .clk(active_clk), .en(|write_bypass_en[i]), .din (wrptr_in[i]), .dout(wrptr[i])) ;                                           \
                                                                                                                                                                                                       \
                  assign ic_b_sram_en[i]              = ic_tag_clken[i];                                                                                                                               \
                                                                                                                                                                                                       \
@@ -1019,12 +1019,12 @@ end // block: OTHERS
                                                                                                                                                                                                       \
                    assign write_bypass_en[i][l] = ic_b_read_en[i]  &  ~any_addr_match[i] & (wrptr[i] == l);                                                                                           \
                                                                                                                                                                                                       \
-                   rvdff  #(1)  write_bypass_ff (.*, .clk(active_clk),                                                     .din(write_bypass_en[i][l]), .dout(write_bypass_en_ff[i][l])) ;                            \
-                   rvdffs #(1)  index_val_ff    (.*, .clk(active_clk), .en(write_bypass_en[i][l] | ic_b_clear_en[i][l]),         .din(~ic_b_clear_en[i][l]),  .dout(index_valid[i][l])) ;                             \
-                   rvdff  #(1)  sel_hold_ff     (.*, .clk(active_clk),                                                     .din(sel_bypass[i][l]),      .dout(sel_bypass_ff[i][l])) ;                                 \
+                   mcu_rvdff  #(1)  write_bypass_ff (.*, .clk(active_clk),                                                     .din(write_bypass_en[i][l]), .dout(write_bypass_en_ff[i][l])) ;                            \
+                   mcu_rvdffs #(1)  index_val_ff    (.*, .clk(active_clk), .en(write_bypass_en[i][l] | ic_b_clear_en[i][l]),         .din(~ic_b_clear_en[i][l]),  .dout(index_valid[i][l])) ;                             \
+                   mcu_rvdff  #(1)  sel_hold_ff     (.*, .clk(active_clk),                                                     .din(sel_bypass[i][l]),      .dout(sel_bypass_ff[i][l])) ;                                 \
                                                                                                                                                                                                       \
-                   rvdffe #(.WIDTH(mcu_pt.ICACHE_INDEX_HI-mcu_pt.ICACHE_TAG_INDEX_LO+1),.OVERRIDE(1))  ic_addr_index   (.*, .en(write_bypass_en[i][l]),    .din (ic_b_rw_addr[i]),        .dout(wb_index_hold[i][l]));   \
-                   rvdffe #(``width)                                                           rd_data_hold_ff (.*, .en(write_bypass_en_ff[i][l]), .din (ic_tag_data_raw_pre[i][``width-1:0]), .dout(wb_dout_hold[i][l]));            \
+                   mcu_rvdffe #(.WIDTH(mcu_pt.ICACHE_INDEX_HI-mcu_pt.ICACHE_TAG_INDEX_LO+1),.OVERRIDE(1))  ic_addr_index   (.*, .en(write_bypass_en[i][l]),    .din (ic_b_rw_addr[i]),        .dout(wb_index_hold[i][l]));   \
+                   mcu_rvdffe #(``width)                                                           rd_data_hold_ff (.*, .en(write_bypass_en_ff[i][l]), .din (ic_tag_data_raw_pre[i][``width-1:0]), .dout(wb_dout_hold[i][l]));            \
                                                                                                                                                                                                       \
                 end // block: BYPASS                                                                                                                                                                  \
                                                                                                                                                                                                       \
@@ -1078,7 +1078,7 @@ end // block: OTHERS
          assign w_tout[i][31:mcu_pt.ICACHE_TAG_LO] = ic_tag_data_raw[i][31-mcu_pt.ICACHE_TAG_LO:0] ;
          assign w_tout[i][36:32]              = ic_tag_data_raw[i][25:21] ;
 
-         rvecc_decode  ecc_decode (
+         mcu_rvecc_decode  ecc_decode (
                            .en(~dec_tlu_core_ecc_disable & ic_rd_en_ff),
                            .sed_ded ( 1'b1 ),    // 1 : means only detection
                            .din({11'b0,ic_tag_data_raw[i][20:0]}),
@@ -1122,7 +1122,7 @@ end // block: OTHERS
          assign w_tout[i][31:mcu_pt.ICACHE_TAG_LO] = ic_tag_data_raw[i][31-mcu_pt.ICACHE_TAG_LO:0] ;
          assign w_tout[i][32]                 = ic_tag_data_raw[i][21] ;
 
-         rveven_paritycheck #(32-mcu_pt.ICACHE_TAG_LO) parcheck(.data_in   (w_tout[i][31:mcu_pt.ICACHE_TAG_LO]),
+         mcu_rveven_paritycheck #(32-mcu_pt.ICACHE_TAG_LO) parcheck(.data_in   (w_tout[i][31:mcu_pt.ICACHE_TAG_LO]),
                                                    .parity_in (w_tout[i][32]),
                                                    .parity_err(ic_tag_way_perr[i]));
       end // else: !if(mcu_pt.ICACHE_ECC)
@@ -1161,7 +1161,7 @@ end // block: OTHERS
     logic                                ic_tag_clken_final;
 
 `define mcu_el2_IC_TAG_PACKED_SRAM(depth,width)                                                               \
-                  ram_be_``depth``x``width  ic_way_tag (                                                   \
+                  mcu_ram_be_``depth``x``width  ic_way_tag (                                                   \
                                 .ME  ( ic_tag_clken_final),                                                \
                                 .WE  (|ic_tag_wren_q[mcu_pt.ICACHE_NUM_WAYS-1:0]),                             \
                                 .WEM (ic_tag_wren_biten_vec[``width-1:0]),                                 \
@@ -1190,7 +1190,7 @@ end // block: OTHERS
                                                                                                                                                                                                       \
                  assign wrptr_in = (wrptr == (mcu_pt.ICACHE_TAG_NUM_BYPASS-1)) ? '0 : (wrptr + 1'd1);                                                                                                     \
                                                                                                                                                                                                       \
-                 rvdffs  #(mcu_pt.ICACHE_TAG_NUM_BYPASS_WIDTH)  wrptr_ff(.*, .clk(active_clk), .en(|write_bypass_en), .din (wrptr_in), .dout(wrptr)) ;                                                    \
+                 mcu_rvdffs  #(mcu_pt.ICACHE_TAG_NUM_BYPASS_WIDTH)  wrptr_ff(.*, .clk(active_clk), .en(|write_bypass_en), .din (wrptr_in), .dout(wrptr)) ;                                                    \
                                                                                                                                                                                                       \
                  assign ic_b_sram_en              = |ic_tag_clken;                                                                                                                                    \
                                                                                                                                                                                                       \
@@ -1220,12 +1220,12 @@ end // block: OTHERS
                                                                                                                                                                                                       \
                    assign write_bypass_en[l] = ic_b_read_en  &  ~any_addr_match & (wrptr == l);                                                                                                       \
                                                                                                                                                                                                       \
-                   rvdff  #(1)  write_bypass_ff (.*, .clk(active_clk),                                                     .din(write_bypass_en[l]), .dout(write_bypass_en_ff[l])) ;                                  \
-                   rvdffs #(1)  index_val_ff    (.*, .clk(active_clk), .en(write_bypass_en[l] | ic_b_clear_en[l]),         .din(~ic_b_clear_en[l]),  .dout(index_valid[l])) ;                                         \
-                   rvdff  #(1)  sel_hold_ff     (.*, .clk(active_clk),                                                     .din(sel_bypass[l]),      .dout(sel_bypass_ff[l])) ;                                               \
+                   mcu_rvdff  #(1)  write_bypass_ff (.*, .clk(active_clk),                                                     .din(write_bypass_en[l]), .dout(write_bypass_en_ff[l])) ;                                  \
+                   mcu_rvdffs #(1)  index_val_ff    (.*, .clk(active_clk), .en(write_bypass_en[l] | ic_b_clear_en[l]),         .din(~ic_b_clear_en[l]),  .dout(index_valid[l])) ;                                         \
+                   mcu_rvdff  #(1)  sel_hold_ff     (.*, .clk(active_clk),                                                     .din(sel_bypass[l]),      .dout(sel_bypass_ff[l])) ;                                               \
                                                                                                                                                                                                       \
-                   rvdffe #(.WIDTH(mcu_pt.ICACHE_INDEX_HI-mcu_pt.ICACHE_TAG_INDEX_LO+1),.OVERRIDE(1)) ic_addr_index    (.*, .en(write_bypass_en[l]),    .din (ic_b_rw_addr),               .dout(wb_index_hold[l]));          \
-                   rvdffe #(``width)                                                          rd_data_hold_ff  (.*, .en(write_bypass_en_ff[l]), .din (ic_tag_data_raw_packed_pre[``width-1:0]), .dout(wb_packeddout_hold[l]));        \
+                   mcu_rvdffe #(.WIDTH(mcu_pt.ICACHE_INDEX_HI-mcu_pt.ICACHE_TAG_INDEX_LO+1),.OVERRIDE(1)) ic_addr_index    (.*, .en(write_bypass_en[l]),    .din (ic_b_rw_addr),               .dout(wb_index_hold[l]));          \
+                   mcu_rvdffe #(``width)                                                          rd_data_hold_ff  (.*, .en(write_bypass_en_ff[l]), .din (ic_tag_data_raw_packed_pre[``width-1:0]), .dout(wb_packeddout_hold[l]));        \
                                                                                                                                                                                                       \
                 end // block: BYPASS                                                                                                                                                                  \
                                                                                                                                                                                                       \
@@ -1330,7 +1330,7 @@ end // block: OTHERS
           assign ic_tag_data_raw[i]  = ic_tag_data_raw_packed[(26*i)+25:26*i];
           assign w_tout[i][31:mcu_pt.ICACHE_TAG_LO] = ic_tag_data_raw[i][31-mcu_pt.ICACHE_TAG_LO:0] ;
           assign w_tout[i][36:32]              = ic_tag_data_raw[i][25:21] ;
-          rvecc_decode  ecc_decode (
+          mcu_rvecc_decode  ecc_decode (
                            .en(~dec_tlu_core_ecc_disable & ic_rd_en_ff),
                            .sed_ded ( 1'b1 ),    // 1 : means only detection
                            .din({11'b0,ic_tag_data_raw[i][20:0]}),
@@ -1432,7 +1432,7 @@ end // block: OTHERS
           assign w_tout[i][36:33]              = '0 ;
 
 
-          rveven_paritycheck #(32-mcu_pt.ICACHE_TAG_LO) parcheck(.data_in   (w_tout[i][31:mcu_pt.ICACHE_TAG_LO]),
+          mcu_rveven_paritycheck #(32-mcu_pt.ICACHE_TAG_LO) parcheck(.data_in   (w_tout[i][31:mcu_pt.ICACHE_TAG_LO]),
                                                    .parity_in (w_tout[i][32]),
                                                    .parity_err(ic_tag_way_perr[i]));
       end
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_iccm_mem.sv b/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_iccm_mem.sv
index 2c17eb2..fc88337 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_iccm_mem.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_iccm_mem.sv
@@ -83,7 +83,7 @@ import mcu_el2_pkg::*;
    //   assign      flip_in = (iccm_rw_addr[3:2] != 2'b00);    // dont flip when bank0 - this is to make some progress in DMA streaming cases
    //   assign      flip_en = iccm_rden;
    //
-   //   rvdffs #(1) flipmatch  (.*,
+   //   mcu_rvdffs #(1) flipmatch  (.*,
    //                   .clk(clk),
    //                   .din(flip_in),
    //                   .en(flip_en),
@@ -127,12 +127,12 @@ import mcu_el2_pkg::*;
     assign sel_red0[i]  = (redundant_valid[0]  & (((iccm_rw_addr[mcu_pt.ICCM_BITS-1:2] == redundant_address[0][mcu_pt.ICCM_BITS-1:2]) & (iccm_rw_addr[3:2] == i)) |
                                                  ((addr_bank_inc[mcu_pt.ICCM_BITS-1:2]== redundant_address[0][mcu_pt.ICCM_BITS-1:2]) & (addr_bank_inc[3:2] == i))));
 
-   rvdff #(1) selred0  (.*,
+   mcu_rvdff #(1) selred0  (.*,
                    .clk(active_clk),
                    .din(sel_red0[i]),
                    .dout(sel_red0_q[i]));
 
-   rvdff #(1) selred1  (.*,
+   mcu_rvdff #(1) selred1  (.*,
                    .clk(active_clk),
                    .din(sel_red1[i]),
                    .dout(sel_red1_q[i]));
@@ -152,31 +152,31 @@ import mcu_el2_pkg::*;
    assign redundant_lru_en         = iccm_buf_correct_ecc | (((|sel_red0[mcu_pt.ICCM_NUM_BANKS-1:0]) | (|sel_red1[mcu_pt.ICCM_NUM_BANKS-1:0])) & iccm_rden & iccm_correction_state);
    assign redundant_lru_in        = iccm_buf_correct_ecc ? ~redundant_lru : (|sel_red0[mcu_pt.ICCM_NUM_BANKS-1:0]) ? 1'b1 : 1'b0;
 
-   rvdffs #() red_lru  (.*,                               // LRU flop for the redundant replacements
+   mcu_rvdffs #() red_lru  (.*,                               // LRU flop for the redundant replacements
                    .clk(active_clk),
                    .en(redundant_lru_en),
                    .din(redundant_lru_in),
                    .dout(redundant_lru));
 
-    rvdffs #(mcu_pt.ICCM_BITS-2) r0_address  (.*,                 // Redundant Row 0 address
+    mcu_rvdffs #(mcu_pt.ICCM_BITS-2) r0_address  (.*,                 // Redundant Row 0 address
                    .clk(active_clk),
                    .en(r0_addr_en),
                    .din(iccm_rw_addr[mcu_pt.ICCM_BITS-1:2]),
                    .dout(redundant_address[0][mcu_pt.ICCM_BITS-1:2]));
 
-   rvdffs #(mcu_pt.ICCM_BITS-2) r1_address  (.*,                   // Redundant Row 0 address
+   mcu_rvdffs #(mcu_pt.ICCM_BITS-2) r1_address  (.*,                   // Redundant Row 0 address
                    .clk(active_clk),
                    .en(r1_addr_en),
                    .din(iccm_rw_addr[mcu_pt.ICCM_BITS-1:2]),
                    .dout(redundant_address[1][mcu_pt.ICCM_BITS-1:2]));
 
-    rvdffs #(1) r0_valid  (.*,
+    mcu_rvdffs #(1) r0_valid  (.*,
                    .clk(active_clk),                                  // Redundant Row 0 Valid
                    .en(r0_addr_en),
                    .din(1'b1),
                    .dout(redundant_valid[0]));
 
-   rvdffs #(1) r1_valid  (.*,                                   // Redundant Row 1 Valid
+   mcu_rvdffs #(1) r1_valid  (.*,                                   // Redundant Row 1 Valid
                    .clk(active_clk),
                    .en(r1_addr_en),
                    .din(1'b1),
@@ -193,7 +193,7 @@ import mcu_el2_pkg::*;
 
     assign redundant_data0_in[38:0] = (((iccm_rw_addr[2] == redundant_address[0][2]) & iccm_rw_addr[2]) | (redundant_address[0][2] & (iccm_wr_size[1:0] == 2'b11))) ? iccm_wr_data[77:39]  : iccm_wr_data[38:0];
 
-    rvdffs #(39) r0_data  (.*,                                 // Redundant Row 1 data
+    mcu_rvdffs #(39) r0_data  (.*,                                 // Redundant Row 1 data
                    .clk(active_clk),
                    .en(redundant_data0_en),
                    .din(redundant_data0_in[38:0]),
@@ -204,15 +204,15 @@ import mcu_el2_pkg::*;
 
    assign redundant_data1_in[38:0] = (((iccm_rw_addr[2] == redundant_address[1][2]) & iccm_rw_addr[2]) | (redundant_address[1][2] & (iccm_wr_size[1:0] == 2'b11))) ? iccm_wr_data[77:39]  : iccm_wr_data[38:0];
 
-    rvdffs #(39) r1_data  (.*,                                  // Redundant Row 1 data
+    mcu_rvdffs #(39) r1_data  (.*,                                  // Redundant Row 1 data
                    .clk(active_clk),
                    .en(redundant_data1_en),
                    .din(redundant_data1_in[38:0]),
                    .dout(redundant_data[1][38:0]));
 
 
-   rvdffs  #(mcu_pt.ICCM_BANK_HI)   rd_addr_lo_ff (.*, .clk(active_clk), .din(iccm_rw_addr [mcu_pt.ICCM_BANK_HI:1]), .dout(iccm_rd_addr_lo_q[mcu_pt.ICCM_BANK_HI:1]), .en(1'b1));   // bit 0 of address is always 0
-   rvdffs  #(mcu_pt.ICCM_BANK_BITS) rd_addr_hi_ff (.*, .clk(active_clk), .din(addr_bank_inc[mcu_pt.ICCM_BANK_HI:2]), .dout(iccm_rd_addr_hi_q[mcu_pt.ICCM_BANK_HI:2]), .en(1'b1));
+   mcu_rvdffs  #(mcu_pt.ICCM_BANK_HI)   rd_addr_lo_ff (.*, .clk(active_clk), .din(iccm_rw_addr [mcu_pt.ICCM_BANK_HI:1]), .dout(iccm_rd_addr_lo_q[mcu_pt.ICCM_BANK_HI:1]), .en(1'b1));   // bit 0 of address is always 0
+   mcu_rvdffs  #(mcu_pt.ICCM_BANK_BITS) rd_addr_hi_ff (.*, .clk(active_clk), .din(addr_bank_inc[mcu_pt.ICCM_BANK_HI:2]), .dout(iccm_rd_addr_hi_q[mcu_pt.ICCM_BANK_HI:2]), .en(1'b1));
 
    assign iccm_rd_data_pre[63:0] = {iccm_bank_dout_fn[iccm_rd_addr_hi_q][31:0], iccm_bank_dout_fn[iccm_rd_addr_lo_q[mcu_pt.ICCM_BANK_HI:2]][31:0]};
    assign iccm_data[63:0]        = 64'({16'b0, (iccm_rd_data_pre[63:0] >> (16*iccm_rd_addr_lo_q[1]))});
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_ifc_ctl.sv b/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_ifc_ctl.sv
index 3d72f18..dff76f0 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_ifc_ctl.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_ifc_ctl.sv
@@ -198,7 +198,7 @@ end
    assign idle     = state      == IDLE  ;
    assign wfm      = state      == WFM   ;
 
-   rvdffie #(10) fbwrite_ff (.*, .clk(free_l2clk),
+   mcu_rvdffie #(10) fbwrite_ff (.*, .clk(free_l2clk),
                           .din( {dma_iccm_stall_any, miss_f, ifc_fetch_req_bf, next_state[1:0], fb_full_f_ns, fb_write_ns[3:0]}),
                           .dout({dma_iccm_stall_any_f, miss_a, ifc_fetch_req_f, state[1:0], fb_full_f, fb_write_f[3:0]}));
 
@@ -211,13 +211,13 @@ end
 
    assign ifc_fetch_addr_bf[31:1] = fetch_addr_bf[31:1];
 
-   rvdffpcie #(31) faddrf1_ff  (.*, .en(fetch_bf_en), .din(fetch_addr_bf[31:1]), .dout(ifc_fetch_addr_f[31:1]));
+   mcu_rvdffpcie #(31) faddrf1_ff  (.*, .en(fetch_bf_en), .din(fetch_addr_bf[31:1]), .dout(ifc_fetch_addr_f[31:1]));
 
 
  if (mcu_pt.ICCM_ENABLE)  begin : genblock2
    logic iccm_acc_in_region_bf;
    logic iccm_acc_in_range_bf;
-   rvrangecheck #( .CCM_SADR    (mcu_pt.ICCM_SADR),
+   mcu_rvrangecheck #( .CCM_SADR    (mcu_pt.ICCM_SADR),
                    .CCM_SIZE    (mcu_pt.ICCM_SIZE) ) iccm_rangecheck (
                                      .addr     ({ifc_fetch_addr_bf[31:1],1'b0}) ,
                                      .in_range (iccm_acc_in_range_bf) ,
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_mem_ctl.sv b/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_mem_ctl.sv
index 100cf5e..1a4bb4a 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_mem_ctl.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/ifu/mcu_el2_ifu_mem_ctl.sv
@@ -532,7 +532,7 @@ import mcu_el2_pkg::*;
          end
       endcase
    end
-   rvdffs #(($bits(miss_state_t))) miss_state_ff (.clk(active_clk), .din(miss_nxtstate), .dout({miss_state}), .en(miss_state_en),   .*);
+   mcu_rvdffs #(($bits(miss_state_t))) miss_state_ff (.clk(active_clk), .din(miss_nxtstate), .dout({miss_state}), .en(miss_state_en),   .*);
 
   logic    sel_hold_imb     ;
 
@@ -561,10 +561,10 @@ import mcu_el2_pkg::*;
    assign uncacheable_miss_scnd_in   = sel_hold_imb_scnd ? uncacheable_miss_scnd_ff : ifc_fetch_uncacheable_bf ;
 
 
-   rvdff_fpga #(1)  unc_miss_scnd_ff    (.*, .clk(fetch_bf_f_c1_clk), .clken(fetch_bf_f_c1_clken), .rawclk(clk), .din (uncacheable_miss_scnd_in), .dout(uncacheable_miss_scnd_ff));
-   rvdffpcie #(31) imb_f_scnd_ff       (.*, .en(fetch_bf_f_c1_clken),  .din ({imb_scnd_in[31:1]}), .dout({imb_scnd_ff[31:1]}));
-   rvdff_fpga #(mcu_pt.ICACHE_STATUS_BITS)  mb_rep_wayf2_scnd_ff (.*, .clk(fetch_bf_f_c1_clk), .clken(fetch_bf_f_c1_clken), .rawclk(clk), .din ({way_status_mb_scnd_in[mcu_pt.ICACHE_STATUS_BITS-1:0]}), .dout({way_status_mb_scnd_ff[mcu_pt.ICACHE_STATUS_BITS-1:0]}));
-   rvdff_fpga #(mcu_pt.ICACHE_NUM_WAYS)     mb_tagv_scnd_ff      (.*, .clk(fetch_bf_f_c1_clk), .clken(fetch_bf_f_c1_clken), .rawclk(clk), .din ({tagv_mb_scnd_in[mcu_pt.ICACHE_NUM_WAYS-1:0]}), .dout({tagv_mb_scnd_ff[mcu_pt.ICACHE_NUM_WAYS-1:0]}));
+   mcu_rvdff_fpga #(1)  unc_miss_scnd_ff    (.*, .clk(fetch_bf_f_c1_clk), .clken(fetch_bf_f_c1_clken), .rawclk(clk), .din (uncacheable_miss_scnd_in), .dout(uncacheable_miss_scnd_ff));
+   mcu_rvdffpcie #(31) imb_f_scnd_ff       (.*, .en(fetch_bf_f_c1_clken),  .din ({imb_scnd_in[31:1]}), .dout({imb_scnd_ff[31:1]}));
+   mcu_rvdff_fpga #(mcu_pt.ICACHE_STATUS_BITS)  mb_rep_wayf2_scnd_ff (.*, .clk(fetch_bf_f_c1_clk), .clken(fetch_bf_f_c1_clken), .rawclk(clk), .din ({way_status_mb_scnd_in[mcu_pt.ICACHE_STATUS_BITS-1:0]}), .dout({way_status_mb_scnd_ff[mcu_pt.ICACHE_STATUS_BITS-1:0]}));
+   mcu_rvdff_fpga #(mcu_pt.ICACHE_NUM_WAYS)     mb_tagv_scnd_ff      (.*, .clk(fetch_bf_f_c1_clk), .clken(fetch_bf_f_c1_clken), .rawclk(clk), .din ({tagv_mb_scnd_in[mcu_pt.ICACHE_NUM_WAYS-1:0]}), .dout({tagv_mb_scnd_ff[mcu_pt.ICACHE_NUM_WAYS-1:0]}));
 
 
 
@@ -606,34 +606,34 @@ import mcu_el2_pkg::*;
 
 
 
-   rvdffpcie #(31) ifu_fetch_addr_f_ff (.*, .en(fetch_bf_f_c1_clken), .din ({ifc_fetch_addr_bf[31:1]}), .dout({ifu_fetch_addr_int_f[31:1]}));
+   mcu_rvdffpcie #(31) ifu_fetch_addr_f_ff (.*, .en(fetch_bf_f_c1_clken), .din ({ifc_fetch_addr_bf[31:1]}), .dout({ifu_fetch_addr_int_f[31:1]}));
 
    assign vaddr_f[mcu_pt.ICACHE_BEAT_ADDR_HI:1] = ifu_fetch_addr_int_f[mcu_pt.ICACHE_BEAT_ADDR_HI:1] ;
 
-   rvdffpcie #(31) imb_f_ff        (.*, .en(fetch_bf_f_c1_clken), .din (imb_in[31:1]), .dout(imb_ff[31:1]));
-   rvdff_fpga #(1) unc_miss_ff     (.*, .clk(fetch_bf_f_c1_clk), .clken(fetch_bf_f_c1_clken), .rawclk(clk),  .din ( uncacheable_miss_in),               .dout( uncacheable_miss_ff));
+   mcu_rvdffpcie #(31) imb_f_ff        (.*, .en(fetch_bf_f_c1_clken), .din (imb_in[31:1]), .dout(imb_ff[31:1]));
+   mcu_rvdff_fpga #(1) unc_miss_ff     (.*, .clk(fetch_bf_f_c1_clk), .clken(fetch_bf_f_c1_clken), .rawclk(clk),  .din ( uncacheable_miss_in),               .dout( uncacheable_miss_ff));
 
 
    assign miss_addr_in[31:mcu_pt.ICACHE_BEAT_ADDR_HI+1]      = (~miss_pending                    ) ? imb_ff[31:mcu_pt.ICACHE_BEAT_ADDR_HI+1] :
                                                            (                scnd_miss_req_q  ) ? imb_scnd_ff[31:mcu_pt.ICACHE_BEAT_ADDR_HI+1] : miss_addr[31:mcu_pt.ICACHE_BEAT_ADDR_HI+1] ;
 
 
-   rvdfflie #(.WIDTH(31-mcu_pt.ICACHE_BEAT_ADDR_HI),.LEFT(31-mcu_pt.ICACHE_BEAT_ADDR_HI-8)) miss_f_ff       (.*, .en(bus_ifu_bus_clk_en | ic_act_miss_f | dec_tlu_force_halt), .din ({miss_addr_in[31:mcu_pt.ICACHE_BEAT_ADDR_HI+1]}), .dout({miss_addr[31:mcu_pt.ICACHE_BEAT_ADDR_HI+1]}));
+   mcu_rvdfflie #(.WIDTH(31-mcu_pt.ICACHE_BEAT_ADDR_HI),.LEFT(31-mcu_pt.ICACHE_BEAT_ADDR_HI-8)) miss_f_ff       (.*, .en(bus_ifu_bus_clk_en | ic_act_miss_f | dec_tlu_force_halt), .din ({miss_addr_in[31:mcu_pt.ICACHE_BEAT_ADDR_HI+1]}), .dout({miss_addr[31:mcu_pt.ICACHE_BEAT_ADDR_HI+1]}));
 
 
 
 
 
-   rvdff_fpga #(mcu_pt.ICACHE_STATUS_BITS)  mb_rep_wayf2_ff (.*, .clk(fetch_bf_f_c1_clk),  .clken(fetch_bf_f_c1_clken), .rawclk(clk),  .din ({way_status_mb_in[mcu_pt.ICACHE_STATUS_BITS-1:0]}), .dout({way_status_mb_ff[mcu_pt.ICACHE_STATUS_BITS-1:0]}));
-   rvdff_fpga #(mcu_pt.ICACHE_NUM_WAYS)     mb_tagv_ff      (.*, .clk(fetch_bf_f_c1_clk),  .clken(fetch_bf_f_c1_clken), .rawclk(clk),  .din ({tagv_mb_in[mcu_pt.ICACHE_NUM_WAYS-1:0]}), .dout({tagv_mb_ff[mcu_pt.ICACHE_NUM_WAYS-1:0]}));
+   mcu_rvdff_fpga #(mcu_pt.ICACHE_STATUS_BITS)  mb_rep_wayf2_ff (.*, .clk(fetch_bf_f_c1_clk),  .clken(fetch_bf_f_c1_clken), .rawclk(clk),  .din ({way_status_mb_in[mcu_pt.ICACHE_STATUS_BITS-1:0]}), .dout({way_status_mb_ff[mcu_pt.ICACHE_STATUS_BITS-1:0]}));
+   mcu_rvdff_fpga #(mcu_pt.ICACHE_NUM_WAYS)     mb_tagv_ff      (.*, .clk(fetch_bf_f_c1_clk),  .clken(fetch_bf_f_c1_clken), .rawclk(clk),  .din ({tagv_mb_in[mcu_pt.ICACHE_NUM_WAYS-1:0]}), .dout({tagv_mb_ff[mcu_pt.ICACHE_NUM_WAYS-1:0]}));
 
    assign ifc_fetch_req_qual_bf  = ifc_fetch_req_bf  & ~((miss_state == CRIT_WRD_RDY) & flush_final_f) & ~stream_miss_f ;// & ~exu_flush_final ;
 
    assign ifc_fetch_req_f       = ifc_fetch_req_f_raw & ~exu_flush_final ;
 
-   rvdff_fpga #(1) ifu_iccm_acc_ff     (.*, .clk(fetch_bf_f_c1_clk), .clken(fetch_bf_f_c1_clken), .rawclk(clk),   .din(ifc_iccm_access_bf),      .dout(ifc_iccm_access_f));
-   rvdff_fpga #(1) ifu_iccm_reg_acc_ff (.*, .clk(fetch_bf_f_c1_clk), .clken(fetch_bf_f_c1_clken), .rawclk(clk),   .din(ifc_region_acc_fault_final_bf), .dout(ifc_region_acc_fault_final_f));
-   rvdff_fpga #(1) rgn_acc_ff          (.*, .clk(fetch_bf_f_c1_clk), .clken(fetch_bf_f_c1_clken), .rawclk(clk),   .din(ifc_region_acc_fault_bf),       .dout(ifc_region_acc_fault_f));
+   mcu_rvdff_fpga #(1) ifu_iccm_acc_ff     (.*, .clk(fetch_bf_f_c1_clk), .clken(fetch_bf_f_c1_clken), .rawclk(clk),   .din(ifc_iccm_access_bf),      .dout(ifc_iccm_access_f));
+   mcu_rvdff_fpga #(1) ifu_iccm_reg_acc_ff (.*, .clk(fetch_bf_f_c1_clk), .clken(fetch_bf_f_c1_clken), .rawclk(clk),   .din(ifc_region_acc_fault_final_bf), .dout(ifc_region_acc_fault_final_f));
+   mcu_rvdff_fpga #(1) rgn_acc_ff          (.*, .clk(fetch_bf_f_c1_clk), .clken(fetch_bf_f_c1_clken), .rawclk(clk),   .din(ifc_region_acc_fault_bf),       .dout(ifc_region_acc_fault_f));
 
 
    assign ifu_ic_req_addr_f[31:3]  = {miss_addr[31:mcu_pt.ICACHE_BEAT_ADDR_HI+1] , ic_req_addr_bits_hi_3[mcu_pt.ICACHE_BEAT_ADDR_HI:3] };
@@ -659,10 +659,10 @@ if (mcu_pt.ICACHE_ECC == 1) begin: icache_ecc_1
    logic [141:0]     ic_wr_16bytes_data ;
    logic [70:0]      ifu_ic_debug_rd_data_in   ;
 
-                rvecc_encode_64  ic_ecc_encode_64_bus (
+                mcu_rvecc_encode_64  ic_ecc_encode_64_bus (
                            .din    (ifu_bus_rdata_ff[63:0]),
                            .ecc_out(ic_wr_ecc[6:0]));
-                rvecc_encode_64  ic_ecc_encode_64_buff (
+                mcu_rvecc_encode_64  ic_ecc_encode_64_buff (
                            .din    (ic_miss_buff_half[63:0]),
                            .ecc_out(ic_miss_buff_ecc[6:0]));
 
@@ -679,7 +679,7 @@ if (mcu_pt.ICACHE_ECC == 1) begin: icache_ecc_1
   assign ifu_ic_debug_rd_data_in[70:0] = ic_debug_ict_array_sel_ff ? {2'b0,ictag_debug_rd_data[25:21],32'b0,ictag_debug_rd_data[20:0],{7-mcu_pt.ICACHE_STATUS_BITS{1'b0}}, way_status[mcu_pt.ICACHE_STATUS_BITS-1:0],3'b0,ic_debug_tag_val_rd_out} :
                                                                      ic_debug_rd_data[70:0];
 
-  rvdffe #(71) ifu_debug_data_ff (.*,
+  mcu_rvdffe #(71) ifu_debug_data_ff (.*,
                                   .en (debug_data_clken),
                                   .din ({
                                          ifu_ic_debug_rd_data_in[70:0]
@@ -700,9 +700,9 @@ else begin : icache_parity_1
    logic [135:0] ic_wr_16bytes_data ;
    logic [70:0]  ifu_ic_debug_rd_data_in   ;
     for (genvar i=0 ; i < 4 ; i++) begin : DATA_PGEN
-       rveven_paritygen #(16) par_bus  (.data_in   (ifu_bus_rdata_ff[((16*i)+15):(16*i)]),
+       mcu_rveven_paritygen #(16) par_bus  (.data_in   (ifu_bus_rdata_ff[((16*i)+15):(16*i)]),
                                       .parity_out(ic_wr_parity[i]));
-       rveven_paritygen #(16) par_buff  (.data_in   (ic_miss_buff_half[((16*i)+15):(16*i)]),
+       mcu_rveven_paritygen #(16) par_buff  (.data_in   (ic_miss_buff_half[((16*i)+15):(16*i)]),
                                       .parity_out(ic_miss_buff_parity[i]));
     end
 
@@ -721,7 +721,7 @@ else begin : icache_parity_1
    assign ifu_ic_debug_rd_data_in[70:0] = ic_debug_ict_array_sel_ff ? {6'b0,ictag_debug_rd_data[21],32'b0,ictag_debug_rd_data[20:0],{7-mcu_pt.ICACHE_STATUS_BITS{1'b0}},way_status[mcu_pt.ICACHE_STATUS_BITS-1:0],3'b0,ic_debug_tag_val_rd_out} :
                                                                       ic_debug_rd_data[70:0] ;
 
-   rvdffe #(71) ifu_debug_data_ff (.*,
+   mcu_rvdffe #(71) ifu_debug_data_ff (.*,
                                    .en (debug_data_clken),
                                    .din ({
                                           ifu_ic_debug_rd_data_in[70:0]
@@ -805,13 +805,13 @@ assign two_byte_instr    =  (ic_data_f[1:0] != 2'b11 )  ;
 
         assign write_fill_data[i]        =   bus_ifu_wr_en & (  (mcu_pt.IFU_BUS_TAG)'(i)  == ifu_bus_rsp_tag[mcu_pt.IFU_BUS_TAG-1:0]);
 
-        rvdffe #(32) byp_data_0_ff (.*,
+        mcu_rvdffe #(32) byp_data_0_ff (.*,
                                     .en (write_fill_data[i]),
                                     .din (ic_miss_buff_data_in[31:0]),
                                     .dout(ic_miss_buff_data[i*2][31:0])
                                     );
 
-        rvdffe #(32) byp_data_1_ff (.*,
+        mcu_rvdffe #(32) byp_data_1_ff (.*,
                                     .en (write_fill_data[i]),
                                     .din (ic_miss_buff_data_in[63:32]),
                                     .dout(ic_miss_buff_data[i*2+1][31:0])
@@ -819,14 +819,14 @@ assign two_byte_instr    =  (ic_data_f[1:0] != 2'b11 )  ;
 
         assign ic_miss_buff_data_valid_in[i]  = write_fill_data[i] ? 1'b1  : (ic_miss_buff_data_valid[i]  & ~ic_act_miss_f) ;
 
-        rvdff #(1) byp_data_valid_ff (.*,
+        mcu_rvdff #(1) byp_data_valid_ff (.*,
                   .clk (active_clk),
                   .din (ic_miss_buff_data_valid_in[i]),
                   .dout(ic_miss_buff_data_valid[i]));
 
         assign ic_miss_buff_data_error_in[i]  = write_fill_data[i] ? bus_ifu_wr_data_error  : (ic_miss_buff_data_error[i]  & ~ic_act_miss_f) ;
 
-        rvdff #(1) byp_data_error_ff (.*,
+        mcu_rvdff #(1) byp_data_error_ff (.*,
                   .clk (active_clk),
                   .din (ic_miss_buff_data_error_in[i] ),
                   .dout(ic_miss_buff_data_error[i]));
@@ -973,7 +973,7 @@ assign ic_miss_buff_half[63:0]    = {ic_miss_buff_data[{other_tag,1'b1}],ic_miss
     endcase
    end
 
-   rvdffs #(($bits(perr_state_t))) perr_state_ff (.clk(active_clk), .din(perr_nxtstate), .dout({perr_state}), .en(perr_state_en),   .*);
+   mcu_rvdffs #(($bits(perr_state_t))) perr_state_ff (.clk(active_clk), .din(perr_nxtstate), .dout({perr_state}), .en(perr_state_en),   .*);
 
    //////////////////////////////////// Create stop fetch State Machine /////////////////////////
    //////////////////////////////////// Create stop fetch State Machine /////////////////////////
@@ -1021,7 +1021,7 @@ assign ic_miss_buff_half[63:0]    = {ic_miss_buff_data[{other_tag,1'b1}],ic_miss
          end
       endcase
    end
-   rvdffs #(($bits(err_stop_state_t))) err_stop_state_ff (.clk(active_clk), .din(err_stop_nxtstate), .dout({err_stop_state}), .en(err_stop_state_en),   .*);
+   mcu_rvdffs #(($bits(err_stop_state_t))) err_stop_state_ff (.clk(active_clk), .din(err_stop_nxtstate), .dout({err_stop_state}), .en(err_stop_state_en),   .*);
 
 
 
@@ -1041,7 +1041,7 @@ assign ic_miss_buff_half[63:0]    = {ic_miss_buff_data[{other_tag,1'b1}],ic_miss
 
    assign  ifc_bus_ic_req_ff_in  = (ic_act_miss_f | bus_cmd_req_hold | ifu_bus_cmd_valid) & ~dec_tlu_force_halt & ~((bus_cmd_beat_count== {mcu_pt.ICACHE_BEAT_BITS{1'b1}}) & ifu_bus_cmd_valid & ifu_bus_cmd_ready & miss_pending);
 
-   rvdff_fpga #(1) bus_ic_req_ff2(.*, .clk(busclk_force), .clken(bus_ifu_bus_clk_en | dec_tlu_force_halt), .rawclk(clk), .din(ifc_bus_ic_req_ff_in), .dout(ifu_bus_cmd_valid));
+   mcu_rvdff_fpga #(1) bus_ic_req_ff2(.*, .clk(busclk_force), .clken(bus_ifu_bus_clk_en | dec_tlu_force_halt), .rawclk(clk), .din(ifc_bus_ic_req_ff_in), .dout(ifu_bus_cmd_valid));
 
    assign    bus_cmd_req_in  = (ic_act_miss_f | bus_cmd_req_hold) & ~bus_cmd_sent & ~dec_tlu_force_halt ; // hold until first command sent
 
@@ -1086,12 +1086,12 @@ assign ic_miss_buff_half[63:0]    = {ic_miss_buff_data[{other_tag,1'b1}],ic_miss
    assign ifu_bus_rvalid_unq      =  ifu_axi_rvalid ;
    assign ifu_bus_arvalid         =  ifu_axi_arvalid ;
 
-   rvdff_fpga #(1)               bus_rdy_ff      (.*, .clk(busclk),  .clken(bus_ifu_bus_clk_en), .rawclk(clk), .din(ifu_bus_arready_unq),            .dout(ifu_bus_arready_unq_ff));
-   rvdff_fpga #(1)               bus_rsp_vld_ff  (.*, .clk(busclk),  .clken(bus_ifu_bus_clk_en), .rawclk(clk), .din(ifu_bus_rvalid_unq),             .dout(ifu_bus_rvalid_unq_ff));
-   rvdff_fpga #(1)               bus_cmd_ff      (.*, .clk(busclk),  .clken(bus_ifu_bus_clk_en), .rawclk(clk), .din(ifu_bus_arvalid),                .dout(ifu_bus_arvalid_ff));
-   rvdff_fpga #(2)               bus_rsp_cmd_ff  (.*, .clk(busclk),  .clken(bus_ifu_bus_clk_en), .rawclk(clk), .din(ifu_axi_rresp[1:0]),             .dout(ifu_bus_rresp_ff[1:0]));
-   rvdff_fpga #(mcu_pt.IFU_BUS_TAG)  bus_rsp_tag_ff  (.*, .clk(busclk),  .clken(bus_ifu_bus_clk_en), .rawclk(clk), .din(ifu_axi_rid[mcu_pt.IFU_BUS_TAG-1:0]),.dout(ifu_bus_rid_ff[mcu_pt.IFU_BUS_TAG-1:0]));
-   rvdffe #(64)                  bus_data_ff     (.*, .clk(clk),     .din(ifu_axi_rdata[63:0]),            .dout(ifu_bus_rdata_ff[63:0]), .en(ifu_bus_clk_en & ifu_axi_rvalid));
+   mcu_rvdff_fpga #(1)               bus_rdy_ff      (.*, .clk(busclk),  .clken(bus_ifu_bus_clk_en), .rawclk(clk), .din(ifu_bus_arready_unq),            .dout(ifu_bus_arready_unq_ff));
+   mcu_rvdff_fpga #(1)               bus_rsp_vld_ff  (.*, .clk(busclk),  .clken(bus_ifu_bus_clk_en), .rawclk(clk), .din(ifu_bus_rvalid_unq),             .dout(ifu_bus_rvalid_unq_ff));
+   mcu_rvdff_fpga #(1)               bus_cmd_ff      (.*, .clk(busclk),  .clken(bus_ifu_bus_clk_en), .rawclk(clk), .din(ifu_bus_arvalid),                .dout(ifu_bus_arvalid_ff));
+   mcu_rvdff_fpga #(2)               bus_rsp_cmd_ff  (.*, .clk(busclk),  .clken(bus_ifu_bus_clk_en), .rawclk(clk), .din(ifu_axi_rresp[1:0]),             .dout(ifu_bus_rresp_ff[1:0]));
+   mcu_rvdff_fpga #(mcu_pt.IFU_BUS_TAG)  bus_rsp_tag_ff  (.*, .clk(busclk),  .clken(bus_ifu_bus_clk_en), .rawclk(clk), .din(ifu_axi_rid[mcu_pt.IFU_BUS_TAG-1:0]),.dout(ifu_bus_rid_ff[mcu_pt.IFU_BUS_TAG-1:0]));
+   mcu_rvdffe #(64)                  bus_data_ff     (.*, .clk(clk),     .din(ifu_axi_rdata[63:0]),            .dout(ifu_bus_rdata_ff[63:0]), .en(ifu_bus_clk_en & ifu_axi_rvalid));
 
    assign ifu_bus_cmd_ready = ifu_axi_arready ;
    assign ifu_bus_rsp_valid = ifu_axi_rvalid ;
@@ -1138,7 +1138,7 @@ assign ic_miss_buff_half[63:0]    = {ic_miss_buff_data[{other_tag,1'b1}],ic_miss
                                                            ( bus_cmd_sent                    ) ? (bus_rd_addr_count[mcu_pt.ICACHE_BEAT_BITS-1:0] + 3'b001) :
                                                                                                   bus_rd_addr_count[mcu_pt.ICACHE_BEAT_BITS-1:0];
 
-   rvdff_fpga #(mcu_pt.ICACHE_BEAT_BITS)  bus_rd_addr_ff (.*,  .clk(busclk_reset),  .clken (bus_ifu_bus_clk_en | ic_act_miss_f | dec_tlu_force_halt), .rawclk(clk), .din ({bus_new_rd_addr_count[mcu_pt.ICACHE_BEAT_BITS-1:0]}), .dout({bus_rd_addr_count[mcu_pt.ICACHE_BEAT_BITS-1:0]}));
+   mcu_rvdff_fpga #(mcu_pt.ICACHE_BEAT_BITS)  bus_rd_addr_ff (.*,  .clk(busclk_reset),  .clken (bus_ifu_bus_clk_en | ic_act_miss_f | dec_tlu_force_halt), .rawclk(clk), .din ({bus_new_rd_addr_count[mcu_pt.ICACHE_BEAT_BITS-1:0]}), .dout({bus_rd_addr_count[mcu_pt.ICACHE_BEAT_BITS-1:0]}));
 
 
 
@@ -1162,7 +1162,7 @@ assign ic_miss_buff_half[63:0]    = {ic_miss_buff_data[{other_tag,1'b1}],ic_miss
 
 
 
-   rvdffs_fpga #(mcu_pt.ICACHE_BEAT_BITS)  bus_cmd_beat_ff (.*, .clk(busclk_reset), .clken (bus_ifu_bus_clk_en | ic_act_miss_f | dec_tlu_force_halt), .rawclk(clk), .en (bus_cmd_beat_en), .din ({bus_new_cmd_beat_count[mcu_pt.ICACHE_BEAT_BITS-1:0]}),
+   mcu_rvdffs_fpga #(mcu_pt.ICACHE_BEAT_BITS)  bus_cmd_beat_ff (.*, .clk(busclk_reset), .clken (bus_ifu_bus_clk_en | ic_act_miss_f | dec_tlu_force_halt), .rawclk(clk), .en (bus_cmd_beat_en), .din ({bus_new_cmd_beat_count[mcu_pt.ICACHE_BEAT_BITS-1:0]}),
                     .dout({bus_cmd_beat_count[mcu_pt.ICACHE_BEAT_BITS-1:0]}));
 
 
@@ -1174,7 +1174,7 @@ assign ic_miss_buff_half[63:0]    = {ic_miss_buff_data[{other_tag,1'b1}],ic_miss
    assign  bus_ifu_wr_en_ff_wo_err  =  ifu_bus_rvalid_ff & miss_pending &  ~uncacheable_miss_ff;
 
 
-   rvdffie #(10) misc_ff
+   mcu_rvdffie #(10) misc_ff
        ( .*,
          .clk(free_l2clk),
          .din( {ic_act_miss_f,        ifu_wr_cumulative_err,exu_flush_final,  ic_crit_wd_rdy_new_in,bus_ifu_bus_clk_en,   scnd_miss_req_in,bus_cmd_req_in,  last_data_recieved_in,
@@ -1183,7 +1183,7 @@ ifc_dma_access_ok_d,   dma_iccm_req}),
 ifc_dma_access_ok_prev,dma_iccm_req_f})
          );
 
-   rvdffie #(.WIDTH(mcu_pt.ICACHE_BEAT_BITS+5),.OVERRIDE(1)) misc1_ff
+   mcu_rvdffie #(.WIDTH(mcu_pt.ICACHE_BEAT_BITS+5),.OVERRIDE(1)) misc1_ff
        ( .*,
          .clk(free_l2clk),
          .din( {reset_ic_in,sel_mb_addr,   bus_new_data_beat_count[mcu_pt.ICACHE_BEAT_BITS-1:0],ifc_region_acc_fault_memory_bf,ic_debug_rd_en,       ic_debug_rd_en_ff}),
@@ -1239,11 +1239,11 @@ ifc_dma_access_ok_prev,dma_iccm_req_f})
          assign iccm_dma_rden      =  (ifc_dma_access_q_ok & dma_iccm_req & ~dma_mem_write)                     ;
          assign iccm_wr_size[2:0]  =  {3{dma_iccm_req}}    & dma_mem_sz[2:0] ;
 
-         rvecc_encode  iccm_ecc_encode0 (
+         mcu_rvecc_encode  iccm_ecc_encode0 (
                            .din(dma_mem_wdata[31:0]),
                            .ecc_out(dma_mem_ecc[6:0]));
 
-         rvecc_encode  iccm_ecc_encode1 (
+         mcu_rvecc_encode  iccm_ecc_encode1 (
                            .din(dma_mem_wdata[63:32]),
                            .ecc_out(dma_mem_ecc[13:7]));
 
@@ -1254,8 +1254,8 @@ ifc_dma_access_ok_prev,dma_iccm_req_f})
          assign iccm_dma_rdata_in[63:0]      = iccm_dma_ecc_error_in ? {2{dma_mem_addr[31:0]}} : {iccm_dma_rdata_1_muxed[31:0], iccm_corrected_data[0]};
          assign iccm_dma_ecc_error_in   =   |(iccm_double_ecc_error[1:0]);
 
-         rvdffe    #(64) dma_data_ff      (.*, .clk(clk), .en(iccm_dma_rvalid_in),  .din(iccm_dma_rdata_in[63:0]), .dout(iccm_dma_rdata[63:0]));
-         rvdffie   #(11) dma_misc_bits    (.*, .clk(free_l2clk), .din({dma_mem_tag[2:0],
+         mcu_rvdffe    #(64) dma_data_ff      (.*, .clk(clk), .en(iccm_dma_rvalid_in),  .din(iccm_dma_rdata_in[63:0]), .dout(iccm_dma_rdata[63:0]));
+         mcu_rvdffie   #(11) dma_misc_bits    (.*, .clk(free_l2clk), .din({dma_mem_tag[2:0],
                                                                        dma_mem_tag_ff[2:0],
                                                                        dma_mem_addr[3:2],
                                                                        iccm_dma_rden,
@@ -1288,7 +1288,7 @@ ifc_dma_access_ok_prev,dma_iccm_req_f})
    assign iccm_rdmux_data[77:0] = iccm_rd_data_ecc[77:0];
    for (genvar i=0; i < 2 ; i++) begin : ICCM_ECC_CHECK
       assign iccm_ecc_word_enable[i] = ((|ic_fetch_val_shift_right[(2*i+1):(2*i)] & ~exu_flush_final & sel_iccm_data) | iccm_dma_rvalid_in) & ~dec_tlu_core_ecc_disable;
-   rvecc_decode  ecc_decode (
+   mcu_rvecc_decode  ecc_decode (
                            .en(iccm_ecc_word_enable[i]),
                            .sed_ded ( 1'b0 ),    // 1 : means only detection
                            .din(iccm_rdmux_data[(39*i+31):(39*i)]),
@@ -1311,13 +1311,13 @@ end
   assign iccm_error_start                =  iccm_rd_ecc_single_err;
   assign iccm_ecc_corr_index_in[mcu_pt.ICCM_BITS-1:2] = iccm_single_ecc_error[0] ? iccm_rw_addr_f[mcu_pt.ICCM_BITS-1:2] : iccm_rw_addr_f[mcu_pt.ICCM_BITS-1:2] + 1'b1 ;
 
-   rvdffie #(mcu_pt.ICCM_BITS-1) iccm_index_f   (.*, .clk(free_l2clk), .din({iccm_rw_addr[mcu_pt.ICCM_BITS-1:2],
+   mcu_rvdffie #(mcu_pt.ICCM_BITS-1) iccm_index_f   (.*, .clk(free_l2clk), .din({iccm_rw_addr[mcu_pt.ICCM_BITS-1:2],
                                                                          iccm_rd_ecc_single_err_hold_in
                                                                                                        }),
                                                                   .dout({iccm_rw_addr_f[mcu_pt.ICCM_BITS-1:2],
                                                                          iccm_rd_ecc_single_err_ff}));
 
-   rvdffe #((39+(mcu_pt.ICCM_BITS-2)))      ecc_dat0_ff  (
+   mcu_rvdffe #((39+(mcu_pt.ICCM_BITS-2)))      ecc_dat0_ff  (
                                                       .clk(clk),
                                                       .din({iccm_corrected_ecc_f_mux[6:0],  iccm_corrected_data_f_mux[31:0],iccm_ecc_corr_index_in[mcu_pt.ICCM_BITS-1:2]}),
                                                       .dout({iccm_ecc_corr_data_ff[38:0]   ,iccm_ecc_corr_index_ff[mcu_pt.ICCM_BITS-1:2]}),
@@ -1408,9 +1408,9 @@ if (mcu_pt.ICACHE_ENABLE == 1 ) begin: icache_enabled
          assign way_status_new_w_debug[mcu_pt.ICACHE_STATUS_BITS-1:0]  = (ic_debug_wr_en  & ic_debug_tag_array) ? (mcu_pt.ICACHE_STATUS_BITS == 1) ? ic_debug_wr_data[4] : ic_debug_wr_data[6:4] :
                                                 way_status_new[mcu_pt.ICACHE_STATUS_BITS-1:0] ;
 
-   rvdffe #(.WIDTH(mcu_pt.ICACHE_INDEX_HI-mcu_pt.ICACHE_TAG_INDEX_LO+1),.OVERRIDE(1)) perr_dat_ff    (.din(ifu_ic_rw_int_addr_ff[mcu_pt.ICACHE_INDEX_HI:mcu_pt.ICACHE_TAG_INDEX_LO]), .dout(perr_ic_index_ff[mcu_pt.ICACHE_INDEX_HI : mcu_pt.ICACHE_TAG_INDEX_LO]), .en(perr_sb_write_status),  .*);
+   mcu_rvdffe #(.WIDTH(mcu_pt.ICACHE_INDEX_HI-mcu_pt.ICACHE_TAG_INDEX_LO+1),.OVERRIDE(1)) perr_dat_ff    (.din(ifu_ic_rw_int_addr_ff[mcu_pt.ICACHE_INDEX_HI:mcu_pt.ICACHE_TAG_INDEX_LO]), .dout(perr_ic_index_ff[mcu_pt.ICACHE_INDEX_HI : mcu_pt.ICACHE_TAG_INDEX_LO]), .en(perr_sb_write_status),  .*);
                                           
-   rvdffie #(.WIDTH(mcu_pt.ICACHE_TAG_LO-mcu_pt.ICACHE_TAG_INDEX_LO+1+mcu_pt.ICACHE_STATUS_BITS),.OVERRIDE(1))  status_misc_ff
+   mcu_rvdffie #(.WIDTH(mcu_pt.ICACHE_TAG_LO-mcu_pt.ICACHE_TAG_INDEX_LO+1+mcu_pt.ICACHE_STATUS_BITS),.OVERRIDE(1))  status_misc_ff
      (.*,
       .clk(free_l2clk),
       .din({ ifu_status_wr_addr_w_debug[mcu_pt.ICACHE_INDEX_HI:mcu_pt.ICACHE_TAG_INDEX_LO], way_status_wr_en_w_debug, way_status_new_w_debug[mcu_pt.ICACHE_STATUS_BITS-1:0]}),
@@ -1430,7 +1430,7 @@ if (mcu_pt.ICACHE_ENABLE == 1 ) begin: icache_enabled
 
 
       for (genvar j=0 ; j<8 ; j++) begin : WAY_STATUS
-         rvdffs_fpga #(mcu_pt.ICACHE_STATUS_BITS) ic_way_status (.*,
+         mcu_rvdffs_fpga #(mcu_pt.ICACHE_STATUS_BITS) ic_way_status (.*,
                    .clk(way_status_clk[i]),
                    .clken(way_status_clken[i]),
                    .rawclk(clk),
@@ -1456,7 +1456,7 @@ if (mcu_pt.ICACHE_ENABLE == 1 ) begin: icache_enabled
 
          assign ic_valid_w_debug = (ic_debug_wr_en & ic_debug_tag_array) ? ic_debug_wr_data[0] : ic_valid;
 
-         rvdffie #(mcu_pt.ICACHE_TAG_LO-mcu_pt.ICACHE_TAG_INDEX_LO+mcu_pt.ICACHE_NUM_WAYS+1) tag_addr_ff (.*,
+         mcu_rvdffie #(mcu_pt.ICACHE_TAG_LO-mcu_pt.ICACHE_TAG_INDEX_LO+mcu_pt.ICACHE_NUM_WAYS+1) tag_addr_ff (.*,
                                                                                               .clk(free_l2clk),
                                                                                               .din({ifu_ic_rw_int_addr_w_debug[mcu_pt.ICACHE_INDEX_HI:mcu_pt.ICACHE_TAG_INDEX_LO],
                                                                                                     ifu_tag_wren_w_debug[mcu_pt.ICACHE_NUM_WAYS-1:0],
@@ -1490,7 +1490,7 @@ if (mcu_pt.ICACHE_ENABLE == 1 ) begin: icache_enabled
 
 
       for (genvar k=0 ; k<32 ; k++) begin : TAG_VALID
-         rvdffs_fpga #(1) ic_way_tagvalid_dup (.*,
+         mcu_rvdffs_fpga #(1) ic_way_tagvalid_dup (.*,
                    .clk(tag_valid_clk[i][j]),
                    .clken(tag_valid_clken[i][j]),
                    .rawclk(clk),
@@ -1602,7 +1602,7 @@ end
  assign ifu_pmu_bus_trxn_in  = bus_cmd_sent ;
  assign ifu_pmu_bus_busy_in  = ifu_bus_arvalid_ff & ~ifu_bus_arready_ff & miss_pending ;
 
-   rvdffie #(9) ifu_pmu_sigs_ff (.*,
+   mcu_rvdffie #(9) ifu_pmu_sigs_ff (.*,
                     .clk (free_l2clk),
                     .din ({ifc_fetch_uncacheable_bf, ifc_fetch_req_qual_bf, dma_sb_err_state, dec_tlu_fence_i_wb,
                            ifu_pmu_ic_miss_in,
@@ -1640,7 +1640,7 @@ assign ic_debug_tag_wr_en[mcu_pt.ICACHE_NUM_WAYS-1:0] = {mcu_pt.ICACHE_NUM_WAYS{
 
 assign ic_debug_ict_array_sel_in      =  ic_debug_rd_en & ic_debug_tag_array ;
 
-rvdff_fpga #(01+mcu_pt.ICACHE_NUM_WAYS) ifu_debug_sel_ff (.*, .clk (debug_c1_clk),
+mcu_rvdff_fpga #(01+mcu_pt.ICACHE_NUM_WAYS) ifu_debug_sel_ff (.*, .clk (debug_c1_clk),
                     .clken(debug_c1_clken), .rawclk(clk),
                     .din ({ic_debug_ict_array_sel_in,
                            ic_debug_way[mcu_pt.ICACHE_NUM_WAYS-1:0]
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/lib/mcu_ahb_to_axi4.sv b/src/riscv_core/veer_el2/rtl/rev1p0/lib/mcu_ahb_to_axi4.sv
index 6c11d71..f5a8e63 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/lib/mcu_ahb_to_axi4.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/lib/mcu_ahb_to_axi4.sv
@@ -161,7 +161,7 @@ import mcu_el2_pkg::*;
      endcase
    end // always_comb begin
 
-    rvdffs_fpga #($bits(state_t)) state_reg (.*, .din(buf_nxtstate), .dout({buf_state}), .en(buf_state_en), .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk));
+    mcu_rvdffs_fpga #($bits(state_t)) state_reg (.*, .din(buf_nxtstate), .dout({buf_state}), .en(buf_state_en), .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk));
 
    assign master_wstrb[7:0]   = ({8{ahb_hsize_q[2:0] == 3'b0}}  & (8'b1    << ahb_haddr_q[2:0])) |
                                 ({8{ahb_hsize_q[2:0] == 3'b1}}  & (8'b11   << ahb_haddr_q[2:0])) |
@@ -186,19 +186,19 @@ import mcu_el2_pkg::*;
                              (ahb_hresp_q & ~ahb_hready_q);
 
    // Buffer signals - needed for the read data and ECC error response
-   rvdff_fpga  #(.WIDTH(64)) buf_rdata_ff     (.din(axi_rdata[63:0]),   .dout(buf_rdata[63:0]), .clk(buf_rdata_clk), .clken(buf_rdata_clk_en), .rawclk(clk), .*);
-   rvdff_fpga  #(.WIDTH(1))  buf_read_error_ff(.din(buf_read_error_in), .dout(buf_read_error),  .clk(bus_clk),       .clken(bus_clk_en),       .rawclk(clk), .*);          // buf_read_error will be high only one cycle
+   mcu_rvdff_fpga  #(.WIDTH(64)) buf_rdata_ff     (.din(axi_rdata[63:0]),   .dout(buf_rdata[63:0]), .clk(buf_rdata_clk), .clken(buf_rdata_clk_en), .rawclk(clk), .*);
+   mcu_rvdff_fpga  #(.WIDTH(1))  buf_read_error_ff(.din(buf_read_error_in), .dout(buf_read_error),  .clk(bus_clk),       .clken(bus_clk_en),       .rawclk(clk), .*);          // buf_read_error will be high only one cycle
 
    // All the Master signals are captured before presenting it to the command buffer. We check for Hresp before sending it to the cmd buffer.
-   rvdff_fpga #(.WIDTH(1))  hresp_ff  (.din(ahb_hresp),          .dout(ahb_hresp_q),       .clk(bus_clk),      .clken(bus_clk_en),      .rawclk(clk), .*);
-   rvdff_fpga #(.WIDTH(1))  hready_ff (.din(ahb_hready),         .dout(ahb_hready_q),      .clk(bus_clk),      .clken(bus_clk_en),      .rawclk(clk), .*);
-   rvdff_fpga #(.WIDTH(2))  htrans_ff (.din(ahb_htrans_in[1:0]), .dout(ahb_htrans_q[1:0]), .clk(bus_clk),      .clken(bus_clk_en),      .rawclk(clk), .*);
-   rvdff_fpga #(.WIDTH(3))  hsize_ff  (.din(ahb_hsize[2:0]),     .dout(ahb_hsize_q[2:0]),  .clk(ahb_addr_clk), .clken(ahb_addr_clk_en), .rawclk(clk), .*);
-   rvdff_fpga #(.WIDTH(1))  hwrite_ff (.din(ahb_hwrite),         .dout(ahb_hwrite_q),      .clk(ahb_addr_clk), .clken(ahb_addr_clk_en), .rawclk(clk), .*);
-   rvdff_fpga #(.WIDTH(32)) haddr_ff  (.din(ahb_haddr[31:0]),    .dout(ahb_haddr_q[31:0]), .clk(ahb_addr_clk), .clken(ahb_addr_clk_en), .rawclk(clk), .*);
+   mcu_rvdff_fpga #(.WIDTH(1))  hresp_ff  (.din(ahb_hresp),          .dout(ahb_hresp_q),       .clk(bus_clk),      .clken(bus_clk_en),      .rawclk(clk), .*);
+   mcu_rvdff_fpga #(.WIDTH(1))  hready_ff (.din(ahb_hready),         .dout(ahb_hready_q),      .clk(bus_clk),      .clken(bus_clk_en),      .rawclk(clk), .*);
+   mcu_rvdff_fpga #(.WIDTH(2))  htrans_ff (.din(ahb_htrans_in[1:0]), .dout(ahb_htrans_q[1:0]), .clk(bus_clk),      .clken(bus_clk_en),      .rawclk(clk), .*);
+   mcu_rvdff_fpga #(.WIDTH(3))  hsize_ff  (.din(ahb_hsize[2:0]),     .dout(ahb_hsize_q[2:0]),  .clk(ahb_addr_clk), .clken(ahb_addr_clk_en), .rawclk(clk), .*);
+   mcu_rvdff_fpga #(.WIDTH(1))  hwrite_ff (.din(ahb_hwrite),         .dout(ahb_hwrite_q),      .clk(ahb_addr_clk), .clken(ahb_addr_clk_en), .rawclk(clk), .*);
+   mcu_rvdff_fpga #(.WIDTH(32)) haddr_ff  (.din(ahb_haddr[31:0]),    .dout(ahb_haddr_q[31:0]), .clk(ahb_addr_clk), .clken(ahb_addr_clk_en), .rawclk(clk), .*);
 
    // Address check  dccm
-   rvrangecheck #(.CCM_SADR(mcu_pt.DCCM_SADR),
+   mcu_rvrangecheck #(.CCM_SADR(mcu_pt.DCCM_SADR),
                   .CCM_SIZE(mcu_pt.DCCM_SIZE)) addr_dccm_rangecheck (
       .addr(ahb_haddr_q[31:0]),
       .in_range(ahb_addr_in_dccm),
@@ -207,7 +207,7 @@ import mcu_el2_pkg::*;
 
    // Address check  iccm
    if (mcu_pt.ICCM_ENABLE == 1) begin: GenICCM
-      rvrangecheck #(.CCM_SADR(mcu_pt.ICCM_SADR),
+      mcu_rvrangecheck #(.CCM_SADR(mcu_pt.ICCM_SADR),
                      .CCM_SIZE(mcu_pt.ICCM_SIZE)) addr_iccm_rangecheck (
          .addr(ahb_haddr_q[31:0]),
          .in_range(ahb_addr_in_iccm),
@@ -219,7 +219,7 @@ import mcu_el2_pkg::*;
    end
 
    // PIC memory address check
-   rvrangecheck #(.CCM_SADR(mcu_pt.PIC_BASE_ADDR),
+   mcu_rvrangecheck #(.CCM_SADR(mcu_pt.PIC_BASE_ADDR),
                   .CCM_SIZE(mcu_pt.PIC_SIZE)) addr_pic_rangecheck (
       .addr(ahb_haddr_q[31:0]),
       .in_range(ahb_addr_in_pic),
@@ -230,12 +230,12 @@ import mcu_el2_pkg::*;
    assign cmdbuf_rst         = (((axi_awvalid & axi_awready) | (axi_arvalid & axi_arready)) & ~cmdbuf_wr_en) | (ahb_hresp & ~cmdbuf_write);
    assign cmdbuf_full        = (cmdbuf_vld & ~((axi_awvalid & axi_awready) | (axi_arvalid & axi_arready)));
 
-   rvdffsc_fpga #(.WIDTH(1))  cmdbuf_vldff      (.din(1'b1),              .dout(cmdbuf_vld),         .en(cmdbuf_wr_en), .clear(cmdbuf_rst), .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
-   rvdffs_fpga  #(.WIDTH(1))  cmdbuf_writeff    (.din(ahb_hwrite_q),      .dout(cmdbuf_write),       .en(cmdbuf_wr_en),                     .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
-   rvdffs_fpga  #(.WIDTH(2))  cmdbuf_sizeff     (.din(ahb_hsize_q[1:0]),  .dout(cmdbuf_size[1:0]),   .en(cmdbuf_wr_en),                     .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
-   rvdffs_fpga  #(.WIDTH(8))  cmdbuf_wstrbff    (.din(master_wstrb[7:0]), .dout(cmdbuf_wstrb[7:0]),  .en(cmdbuf_wr_en),                     .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
-   rvdffe       #(.WIDTH(32)) cmdbuf_addrff     (.din(ahb_haddr_q[31:0]), .dout(cmdbuf_addr[31:0]),  .en(cmdbuf_wr_en & bus_clk_en),        .clk(clk), .*);
-   rvdffe       #(.WIDTH(64)) cmdbuf_wdataff    (.din(ahb_hwdata[63:0]),  .dout(cmdbuf_wdata[63:0]), .en(cmdbuf_wr_en & bus_clk_en),        .clk(clk), .*);
+   mcu_rvdffsc_fpga #(.WIDTH(1))  cmdbuf_vldff      (.din(1'b1),              .dout(cmdbuf_vld),         .en(cmdbuf_wr_en), .clear(cmdbuf_rst), .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffs_fpga  #(.WIDTH(1))  cmdbuf_writeff    (.din(ahb_hwrite_q),      .dout(cmdbuf_write),       .en(cmdbuf_wr_en),                     .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffs_fpga  #(.WIDTH(2))  cmdbuf_sizeff     (.din(ahb_hsize_q[1:0]),  .dout(cmdbuf_size[1:0]),   .en(cmdbuf_wr_en),                     .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffs_fpga  #(.WIDTH(8))  cmdbuf_wstrbff    (.din(master_wstrb[7:0]), .dout(cmdbuf_wstrb[7:0]),  .en(cmdbuf_wr_en),                     .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffe       #(.WIDTH(32)) cmdbuf_addrff     (.din(ahb_haddr_q[31:0]), .dout(cmdbuf_addr[31:0]),  .en(cmdbuf_wr_en & bus_clk_en),        .clk(clk), .*);
+   mcu_rvdffe       #(.WIDTH(64)) cmdbuf_wdataff    (.din(ahb_hwdata[63:0]),  .dout(cmdbuf_wdata[63:0]), .en(cmdbuf_wr_en & bus_clk_en),        .clk(clk), .*);
 
    // AXI Write Command Channel
    assign axi_awvalid           = cmdbuf_vld & cmdbuf_write;
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/lib/mcu_axi4_to_ahb.sv b/src/riscv_core/veer_el2/rtl/rev1p0/lib/mcu_axi4_to_ahb.sv
index 8fbc060..2e47d23 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/lib/mcu_axi4_to_ahb.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/lib/mcu_axi4_to_ahb.sv
@@ -232,7 +232,7 @@ import mcu_el2_pkg::*;
    // Create bus synchronized version of force halt
    assign dec_tlu_force_halt_bus = dec_tlu_force_halt | dec_tlu_force_halt_bus_q;
    assign dec_tlu_force_halt_bus_ns = ~bus_clk_en & dec_tlu_force_halt_bus;
-   rvdff  #(.WIDTH(1))   force_halt_busff(.din(dec_tlu_force_halt_bus_ns), .dout(dec_tlu_force_halt_bus_q), .clk(free_clk), .*);
+   mcu_rvdff  #(.WIDTH(1))   force_halt_busff(.din(dec_tlu_force_halt_bus_ns), .dout(dec_tlu_force_halt_bus_q), .clk(free_clk), .*);
 
    // Write buffer
    assign wrbuf_en       = axi_awvalid & axi_awready & master_ready;
@@ -428,38 +428,38 @@ import mcu_el2_pkg::*;
    assign last_addr_en = (ahb_htrans[1:0] != 2'b0) & ahb_hready & ahb_hwrite ;
 
 
-   rvdffsc_fpga #(.WIDTH(1))   wrbuf_vldff     (.din(1'b1),              .dout(wrbuf_vld),          .en(wrbuf_en),      .clear(wrbuf_rst), .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
-   rvdffsc_fpga #(.WIDTH(1))   wrbuf_data_vldff(.din(1'b1),              .dout(wrbuf_data_vld),     .en(wrbuf_data_en), .clear(wrbuf_rst), .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
-   rvdffs_fpga  #(.WIDTH(TAG)) wrbuf_tagff     (.din(axi_awid[TAG-1:0]), .dout(wrbuf_tag[TAG-1:0]), .en(wrbuf_en),                         .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
-   rvdffs_fpga  #(.WIDTH(3))   wrbuf_sizeff    (.din(axi_awsize[2:0]),   .dout(wrbuf_size[2:0]),    .en(wrbuf_en),                         .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
-   rvdffe       #(.WIDTH(32))  wrbuf_addrff    (.din(axi_awaddr[31:0]),  .dout(wrbuf_addr[31:0]),   .en(wrbuf_en & bus_clk_en),            .clk(clk), .*);
-   rvdffe       #(.WIDTH(64))  wrbuf_dataff    (.din(axi_wdata[63:0]),   .dout(wrbuf_data[63:0]),   .en(wrbuf_data_en & bus_clk_en),       .clk(clk), .*);
-   rvdffs_fpga  #(.WIDTH(8))   wrbuf_byteenff  (.din(axi_wstrb[7:0]),    .dout(wrbuf_byteen[7:0]),  .en(wrbuf_data_en),                    .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffsc_fpga #(.WIDTH(1))   wrbuf_vldff     (.din(1'b1),              .dout(wrbuf_vld),          .en(wrbuf_en),      .clear(wrbuf_rst), .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffsc_fpga #(.WIDTH(1))   wrbuf_data_vldff(.din(1'b1),              .dout(wrbuf_data_vld),     .en(wrbuf_data_en), .clear(wrbuf_rst), .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffs_fpga  #(.WIDTH(TAG)) wrbuf_tagff     (.din(axi_awid[TAG-1:0]), .dout(wrbuf_tag[TAG-1:0]), .en(wrbuf_en),                         .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffs_fpga  #(.WIDTH(3))   wrbuf_sizeff    (.din(axi_awsize[2:0]),   .dout(wrbuf_size[2:0]),    .en(wrbuf_en),                         .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffe       #(.WIDTH(32))  wrbuf_addrff    (.din(axi_awaddr[31:0]),  .dout(wrbuf_addr[31:0]),   .en(wrbuf_en & bus_clk_en),            .clk(clk), .*);
+   mcu_rvdffe       #(.WIDTH(64))  wrbuf_dataff    (.din(axi_wdata[63:0]),   .dout(wrbuf_data[63:0]),   .en(wrbuf_data_en & bus_clk_en),       .clk(clk), .*);
+   mcu_rvdffs_fpga  #(.WIDTH(8))   wrbuf_byteenff  (.din(axi_wstrb[7:0]),    .dout(wrbuf_byteen[7:0]),  .en(wrbuf_data_en),                    .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
 
-   rvdffs_fpga #(.WIDTH(32))   last_bus_addrff (.din(ahb_haddr[31:0]),   .dout(last_bus_addr[31:0]), .en(last_addr_en), .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffs_fpga #(.WIDTH(32))   last_bus_addrff (.din(ahb_haddr[31:0]),   .dout(last_bus_addr[31:0]), .en(last_addr_en), .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
 
-   rvdffsc_fpga #(.WIDTH($bits(state_t))) buf_state_ff  (.din(buf_nxtstate),        .dout({buf_state}),      .en(buf_state_en), .clear(buf_rst), .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
-   rvdffs_fpga #(.WIDTH(1))               buf_writeff   (.din(buf_write_in),        .dout(buf_write),        .en(buf_wr_en),                     .clk(buf_clk), .clken(buf_clken),  .rawclk(clk), .*);
-   rvdffs_fpga #(.WIDTH(TAG))             buf_tagff     (.din(buf_tag_in[TAG-1:0]), .dout(buf_tag[TAG-1:0]), .en(buf_wr_en),                     .clk(buf_clk), .clken(buf_clken),  .rawclk(clk), .*);
-   rvdffe      #(.WIDTH(32))              buf_addrff    (.din(buf_addr_in[31:0]),   .dout(buf_addr[31:0]),   .en(buf_wr_en & bus_clk_en),        .clk(clk), .*);
-   rvdffs_fpga #(.WIDTH(2))               buf_sizeff    (.din(buf_size_in[1:0]),    .dout(buf_size[1:0]),    .en(buf_wr_en),                     .clk(buf_clk), .clken(buf_clken),  .rawclk(clk), .*);
-   rvdffs_fpga #(.WIDTH(1))               buf_alignedff (.din(buf_aligned_in),      .dout(buf_aligned),      .en(buf_wr_en),                     .clk(buf_clk), .clken(buf_clken),  .rawclk(clk), .*);
-   rvdffs_fpga #(.WIDTH(8))               buf_byteenff  (.din(buf_byteen_in[7:0]),  .dout(buf_byteen[7:0]),  .en(buf_wr_en),                     .clk(buf_clk), .clken(buf_clken),  .rawclk(clk), .*);
-   rvdffe      #(.WIDTH(64))              buf_dataff    (.din(buf_data_in[63:0]),   .dout(buf_data[63:0]),   .en(buf_data_wr_en & bus_clk_en),   .clk(clk), .*);
+   mcu_rvdffsc_fpga #(.WIDTH($bits(state_t))) buf_state_ff  (.din(buf_nxtstate),        .dout({buf_state}),      .en(buf_state_en), .clear(buf_rst), .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffs_fpga #(.WIDTH(1))               buf_writeff   (.din(buf_write_in),        .dout(buf_write),        .en(buf_wr_en),                     .clk(buf_clk), .clken(buf_clken),  .rawclk(clk), .*);
+   mcu_rvdffs_fpga #(.WIDTH(TAG))             buf_tagff     (.din(buf_tag_in[TAG-1:0]), .dout(buf_tag[TAG-1:0]), .en(buf_wr_en),                     .clk(buf_clk), .clken(buf_clken),  .rawclk(clk), .*);
+   mcu_rvdffe      #(.WIDTH(32))              buf_addrff    (.din(buf_addr_in[31:0]),   .dout(buf_addr[31:0]),   .en(buf_wr_en & bus_clk_en),        .clk(clk), .*);
+   mcu_rvdffs_fpga #(.WIDTH(2))               buf_sizeff    (.din(buf_size_in[1:0]),    .dout(buf_size[1:0]),    .en(buf_wr_en),                     .clk(buf_clk), .clken(buf_clken),  .rawclk(clk), .*);
+   mcu_rvdffs_fpga #(.WIDTH(1))               buf_alignedff (.din(buf_aligned_in),      .dout(buf_aligned),      .en(buf_wr_en),                     .clk(buf_clk), .clken(buf_clken),  .rawclk(clk), .*);
+   mcu_rvdffs_fpga #(.WIDTH(8))               buf_byteenff  (.din(buf_byteen_in[7:0]),  .dout(buf_byteen[7:0]),  .en(buf_wr_en),                     .clk(buf_clk), .clken(buf_clken),  .rawclk(clk), .*);
+   mcu_rvdffe      #(.WIDTH(64))              buf_dataff    (.din(buf_data_in[63:0]),   .dout(buf_data[63:0]),   .en(buf_data_wr_en & bus_clk_en),   .clk(clk), .*);
 
 
-   rvdffs_fpga #(.WIDTH(1))   slvbuf_writeff  (.din(buf_write),        .dout(slvbuf_write),        .en(slvbuf_wr_en),    .clk(buf_clk), .clken(buf_clken), .rawclk(clk), .*);
-   rvdffs_fpga #(.WIDTH(TAG)) slvbuf_tagff    (.din(buf_tag[TAG-1:0]), .dout(slvbuf_tag[TAG-1:0]), .en(slvbuf_wr_en),    .clk(buf_clk), .clken(buf_clken), .rawclk(clk), .*);
-   rvdffs_fpga #(.WIDTH(1))   slvbuf_errorff  (.din(slvbuf_error_in),  .dout(slvbuf_error),        .en(slvbuf_error_en), .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffs_fpga #(.WIDTH(1))   slvbuf_writeff  (.din(buf_write),        .dout(slvbuf_write),        .en(slvbuf_wr_en),    .clk(buf_clk), .clken(buf_clken), .rawclk(clk), .*);
+   mcu_rvdffs_fpga #(.WIDTH(TAG)) slvbuf_tagff    (.din(buf_tag[TAG-1:0]), .dout(slvbuf_tag[TAG-1:0]), .en(slvbuf_wr_en),    .clk(buf_clk), .clken(buf_clken), .rawclk(clk), .*);
+   mcu_rvdffs_fpga #(.WIDTH(1))   slvbuf_errorff  (.din(slvbuf_error_in),  .dout(slvbuf_error),        .en(slvbuf_error_en), .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
 
-   rvdffsc_fpga #(.WIDTH(1)) buf_cmd_doneff     (.din(1'b1),                  .dout(cmd_doneQ),              .en(cmd_done),            .clear(cmd_done_rst), .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
-   rvdffs_fpga #(.WIDTH(3))  buf_cmd_byte_ptrff (.din(buf_cmd_byte_ptr[2:0]), .dout(buf_cmd_byte_ptrQ[2:0]), .en(buf_cmd_byte_ptr_en),                       .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffsc_fpga #(.WIDTH(1)) buf_cmd_doneff     (.din(1'b1),                  .dout(cmd_doneQ),              .en(cmd_done),            .clear(cmd_done_rst), .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffs_fpga #(.WIDTH(3))  buf_cmd_byte_ptrff (.din(buf_cmd_byte_ptr[2:0]), .dout(buf_cmd_byte_ptrQ[2:0]), .en(buf_cmd_byte_ptr_en),                       .clk(bus_clk), .clken(bus_clk_en), .rawclk(clk), .*);
 
-   rvdff_fpga #(.WIDTH(1))  hready_ff (.din(ahb_hready),       .dout(ahb_hready_q),       .clk(bus_clk),       .clken(bus_clk_en),      .rawclk(clk), .*);
-   rvdff_fpga #(.WIDTH(2))  htrans_ff (.din(ahb_htrans[1:0]),  .dout(ahb_htrans_q[1:0]),  .clk(bus_clk),       .clken(bus_clk_en),      .rawclk(clk), .*);
-   rvdff_fpga #(.WIDTH(1))  hwrite_ff (.din(ahb_hwrite),       .dout(ahb_hwrite_q),       .clk(bus_clk),       .clken(bus_clk_en),      .rawclk(clk), .*);
-   rvdff_fpga #(.WIDTH(1))  hresp_ff  (.din(ahb_hresp),        .dout(ahb_hresp_q),        .clk(bus_clk),       .clken(bus_clk_en),      .rawclk(clk), .*);
-   rvdff_fpga #(.WIDTH(64)) hrdata_ff (.din(ahb_hrdata[63:0]), .dout(ahb_hrdata_q[63:0]), .clk(ahbm_data_clk), .clken(ahbm_data_clken), .rawclk(clk), .*);
+   mcu_rvdff_fpga #(.WIDTH(1))  hready_ff (.din(ahb_hready),       .dout(ahb_hready_q),       .clk(bus_clk),       .clken(bus_clk_en),      .rawclk(clk), .*);
+   mcu_rvdff_fpga #(.WIDTH(2))  htrans_ff (.din(ahb_htrans[1:0]),  .dout(ahb_htrans_q[1:0]),  .clk(bus_clk),       .clken(bus_clk_en),      .rawclk(clk), .*);
+   mcu_rvdff_fpga #(.WIDTH(1))  hwrite_ff (.din(ahb_hwrite),       .dout(ahb_hwrite_q),       .clk(bus_clk),       .clken(bus_clk_en),      .rawclk(clk), .*);
+   mcu_rvdff_fpga #(.WIDTH(1))  hresp_ff  (.din(ahb_hresp),        .dout(ahb_hresp_q),        .clk(bus_clk),       .clken(bus_clk_en),      .rawclk(clk), .*);
+   mcu_rvdff_fpga #(.WIDTH(64)) hrdata_ff (.din(ahb_hrdata[63:0]), .dout(ahb_hrdata_q[63:0]), .clk(ahbm_data_clk), .clken(ahbm_data_clken), .rawclk(clk), .*);
 
    // Clock headers
    // clock enables for ahbm addr/data
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/lib/mcu_beh_lib.sv b/src/riscv_core/veer_el2/rtl/rev1p0/lib/mcu_beh_lib.sv
index 3f45bbb..83df6d2 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/lib/mcu_beh_lib.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/lib/mcu_beh_lib.sv
@@ -188,7 +188,7 @@ else begin : genblock
 `ifdef MCU_RV_FPGA_OPTIMIZE
       mcu_rvdffs #(WIDTH) dff ( .* );
 `else
-      rvclkhdr clkhdr ( .* );
+      mcu_rvclkhdr clkhdr ( .* );
       mcu_rvdff #(WIDTH) dff (.*, .clk(l1clk));
 `endif
 
@@ -234,7 +234,7 @@ module mcu_rvdffpcie #( parameter WIDTH=31 )
 endmodule
 
 // format: { LEFT, EXTRA }
-// LEFT # of bits will be done with mcu_rvdffie, all else EXTRA with rvdffe
+// LEFT # of bits will be done with mcu_rvdffie, all else EXTRA with mcu_rvdffe
 module mcu_rvdfflie #( parameter WIDTH=16, LEFT=8 )
    (
      input  logic [WIDTH-1:0] din,
@@ -362,7 +362,7 @@ module mcu_rvdffie #( parameter WIDTH=1, OVERRIDE=0 )
 `ifdef MCU_RV_FPGA_OPTIMIZE
       mcu_rvdffs #(WIDTH) dff ( .* );
 `else
-      rvclkhdr clkhdr ( .* );
+      mcu_rvclkhdr clkhdr ( .* );
       mcu_rvdff #(WIDTH) dff (.*, .clk(l1clk));
 `endif
 
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu.sv b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu.sv
index a4746c7..bf6fbeb 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu.sv
@@ -395,8 +395,8 @@ import mcu_el2_pkg::*;
    );
 
    //Flops
-   rvdff #(3) dma_mem_tag_mff     (.*, .din(dma_mem_tag_d[2:0]), .dout(dma_mem_tag_m[2:0]), .clk(lsu_c1_m_clk));
-   rvdff #(2) lsu_raw_fwd_r_ff    (.*, .din({lsu_raw_fwd_hi_m, lsu_raw_fwd_lo_m}),     .dout({lsu_raw_fwd_hi_r, lsu_raw_fwd_lo_r}),     .clk(lsu_c2_r_clk));
+   mcu_rvdff #(3) dma_mem_tag_mff     (.*, .din(dma_mem_tag_d[2:0]), .dout(dma_mem_tag_m[2:0]), .clk(lsu_c1_m_clk));
+   mcu_rvdff #(2) lsu_raw_fwd_r_ff    (.*, .din({lsu_raw_fwd_hi_m, lsu_raw_fwd_lo_m}),     .dout({lsu_raw_fwd_hi_r, lsu_raw_fwd_lo_r}),     .clk(lsu_c2_r_clk));
 
 `ifdef MCU_RV_ASSERT_ON
    logic [1:0] store_data_bypass_sel;
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_addrcheck.sv b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_addrcheck.sv
index ca3f3a1..87c5bbe 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_addrcheck.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_addrcheck.sv
@@ -74,7 +74,7 @@ import mcu_el2_pkg::*;
 
    if (mcu_pt.DCCM_ENABLE == 1) begin: Gen_dccm_enable
       // Start address check
-      rvrangecheck #(.CCM_SADR(mcu_pt.DCCM_SADR),
+      mcu_rvrangecheck #(.CCM_SADR(mcu_pt.DCCM_SADR),
                      .CCM_SIZE(mcu_pt.DCCM_SIZE)) start_addr_dccm_rangecheck (
          .addr(start_addr_d[31:0]),
          .in_range(start_addr_in_dccm_d),
@@ -82,7 +82,7 @@ import mcu_el2_pkg::*;
       );
 
       // End address check
-      rvrangecheck #(.CCM_SADR(mcu_pt.DCCM_SADR),
+      mcu_rvrangecheck #(.CCM_SADR(mcu_pt.DCCM_SADR),
                      .CCM_SIZE(mcu_pt.DCCM_SIZE)) end_addr_dccm_rangecheck (
          .addr(end_addr_d[31:0]),
          .in_range(end_addr_in_dccm_d),
@@ -103,7 +103,7 @@ import mcu_el2_pkg::*;
 
    // PIC memory check
    // Start address check
-   rvrangecheck #(.CCM_SADR(mcu_pt.PIC_BASE_ADDR),
+   mcu_rvrangecheck #(.CCM_SADR(mcu_pt.PIC_BASE_ADDR),
                   .CCM_SIZE(mcu_pt.PIC_SIZE)) start_addr_pic_rangecheck (
       .addr(start_addr_d[31:0]),
       .in_range(start_addr_in_pic_d),
@@ -111,7 +111,7 @@ import mcu_el2_pkg::*;
    );
 
    // End address check
-   rvrangecheck #(.CCM_SADR(mcu_pt.PIC_BASE_ADDR),
+   mcu_rvrangecheck #(.CCM_SADR(mcu_pt.PIC_BASE_ADDR),
                   .CCM_SIZE(mcu_pt.PIC_SIZE)) end_addr_pic_rangecheck (
       .addr(end_addr_d[31:0]),
       .in_range(end_addr_in_pic_d),
@@ -233,6 +233,6 @@ import mcu_el2_pkg::*;
                                                                                 (end_addr_in_dccm_region_d   & ~end_addr_in_dccm_d)) & lsu_pkt_d.valid & lsu_pkt_d.fast_int;
    assign fir_nondccm_access_error_d = ~(start_addr_in_dccm_region_d & end_addr_in_dccm_region_d) & lsu_pkt_d.valid & lsu_pkt_d.fast_int;
 
-   rvdff #(.WIDTH(1))   is_sideeffects_mff (.din(is_sideeffects_d), .dout(is_sideeffects_m), .clk(lsu_c2_m_clk), .*);
+   mcu_rvdff #(.WIDTH(1))   is_sideeffects_mff (.din(is_sideeffects_d), .dout(is_sideeffects_m), .clk(lsu_c2_m_clk), .*);
 
 endmodule // mcu_el2_lsu_addrcheck
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_bus_buffer.sv b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_bus_buffer.sv
index 1bc4b0f..adedde8 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_bus_buffer.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_bus_buffer.sv
@@ -446,20 +446,20 @@ import mcu_el2_pkg::*;
                                                                                                         ibuf_data[(8*i)+7:(8*i)];
    end
 
-   rvdffsc #(.WIDTH(1))              ibuf_valid_ff     (.din(1'b1),                      .dout(ibuf_valid),      .en(ibuf_wr_en), .clear(ibuf_rst), .clk(lsu_free_c2_clk), .*);
-   rvdffs  #(.WIDTH(DEPTH_LOG2))     ibuf_tagff        (.din(ibuf_tag_in),               .dout(ibuf_tag),        .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
-   rvdffs  #(.WIDTH(DEPTH_LOG2))     ibuf_dualtagff    (.din(ibuf_dualtag_in),           .dout(ibuf_dualtag),    .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
-   rvdffs  #(.WIDTH(1))              ibuf_dualff       (.din(ldst_dual_r),               .dout(ibuf_dual),       .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
-   rvdffs  #(.WIDTH(1))              ibuf_samedwff     (.din(ldst_samedw_r),             .dout(ibuf_samedw),     .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
-   rvdffs  #(.WIDTH(1))              ibuf_nomergeff    (.din(no_dword_merge_r),          .dout(ibuf_nomerge),    .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
-   rvdffs  #(.WIDTH(1))              ibuf_sideeffectff (.din(is_sideeffects_r),          .dout(ibuf_sideeffect), .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
-   rvdffs  #(.WIDTH(1))              ibuf_unsignff     (.din(lsu_pkt_r.unsign),          .dout(ibuf_unsign),     .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
-   rvdffs  #(.WIDTH(1))              ibuf_writeff      (.din(lsu_pkt_r.store),           .dout(ibuf_write),      .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
-   rvdffs  #(.WIDTH(2))              ibuf_szff         (.din(ibuf_sz_in[1:0]),           .dout(ibuf_sz),         .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
-   rvdffe  #(.WIDTH(32))             ibuf_addrff       (.din(ibuf_addr_in[31:0]),        .dout(ibuf_addr),       .en(ibuf_wr_en),                                              .*);
-   rvdffs  #(.WIDTH(4))              ibuf_byteenff     (.din(ibuf_byteen_in[3:0]),       .dout(ibuf_byteen),     .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
-   rvdffe  #(.WIDTH(32))             ibuf_dataff       (.din(ibuf_data_in[31:0]),        .dout(ibuf_data),       .en(ibuf_wr_en),                                              .*);
-   rvdff   #(.WIDTH(TIMER_LOG2))     ibuf_timerff      (.din(ibuf_timer_in),             .dout(ibuf_timer),                                         .clk(lsu_free_c2_clk),     .*);
+   mcu_rvdffsc #(.WIDTH(1))              ibuf_valid_ff     (.din(1'b1),                      .dout(ibuf_valid),      .en(ibuf_wr_en), .clear(ibuf_rst), .clk(lsu_free_c2_clk), .*);
+   mcu_rvdffs  #(.WIDTH(DEPTH_LOG2))     ibuf_tagff        (.din(ibuf_tag_in),               .dout(ibuf_tag),        .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
+   mcu_rvdffs  #(.WIDTH(DEPTH_LOG2))     ibuf_dualtagff    (.din(ibuf_dualtag_in),           .dout(ibuf_dualtag),    .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
+   mcu_rvdffs  #(.WIDTH(1))              ibuf_dualff       (.din(ldst_dual_r),               .dout(ibuf_dual),       .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
+   mcu_rvdffs  #(.WIDTH(1))              ibuf_samedwff     (.din(ldst_samedw_r),             .dout(ibuf_samedw),     .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
+   mcu_rvdffs  #(.WIDTH(1))              ibuf_nomergeff    (.din(no_dword_merge_r),          .dout(ibuf_nomerge),    .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
+   mcu_rvdffs  #(.WIDTH(1))              ibuf_sideeffectff (.din(is_sideeffects_r),          .dout(ibuf_sideeffect), .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
+   mcu_rvdffs  #(.WIDTH(1))              ibuf_unsignff     (.din(lsu_pkt_r.unsign),          .dout(ibuf_unsign),     .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
+   mcu_rvdffs  #(.WIDTH(1))              ibuf_writeff      (.din(lsu_pkt_r.store),           .dout(ibuf_write),      .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
+   mcu_rvdffs  #(.WIDTH(2))              ibuf_szff         (.din(ibuf_sz_in[1:0]),           .dout(ibuf_sz),         .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
+   mcu_rvdffe  #(.WIDTH(32))             ibuf_addrff       (.din(ibuf_addr_in[31:0]),        .dout(ibuf_addr),       .en(ibuf_wr_en),                                              .*);
+   mcu_rvdffs  #(.WIDTH(4))              ibuf_byteenff     (.din(ibuf_byteen_in[3:0]),       .dout(ibuf_byteen),     .en(ibuf_wr_en),                   .clk(lsu_bus_ibuf_c1_clk), .*);
+   mcu_rvdffe  #(.WIDTH(32))             ibuf_dataff       (.din(ibuf_data_in[31:0]),        .dout(ibuf_data),       .en(ibuf_wr_en),                                              .*);
+   mcu_rvdff   #(.WIDTH(TIMER_LOG2))     ibuf_timerff      (.din(ibuf_timer_in),             .dout(ibuf_timer),                                         .clk(lsu_free_c2_clk),     .*);
 
 
    //------------------------------------------------------------------------------
@@ -527,23 +527,23 @@ import mcu_el2_pkg::*;
                           (ibuf_buf_byp & ldst_samedw_r & ldst_dual_r);
 
 
-   rvdff_fpga  #(.WIDTH(1))              obuf_wren_ff      (.din(obuf_wr_en),                  .dout(obuf_wr_enQ),                                        .clk(lsu_busm_clk),        .clken(lsu_busm_clken), .rawclk(clk),        .*);
-   rvdffsc     #(.WIDTH(1))              obuf_valid_ff     (.din(1'b1),                        .dout(obuf_valid),      .en(obuf_wr_en), .clear(obuf_rst), .clk(lsu_free_c2_clk),                                                  .*);
-   rvdffs      #(.WIDTH(1))              obuf_nosend_ff    (.din(obuf_nosend_in),              .dout(obuf_nosend),     .en(obuf_wr_en),                   .clk(lsu_free_c2_clk),                                                  .*);
-   rvdffs      #(.WIDTH(1))              obuf_rdrsp_pend_ff(.din(obuf_rdrsp_pend_in),          .dout(obuf_rdrsp_pend), .en(obuf_rdrsp_pend_en),           .clk(lsu_free_c2_clk),                                                  .*);
-   rvdff_fpga  #(.WIDTH(1))              obuf_cmd_done_ff  (.din(obuf_cmd_done_in),            .dout(obuf_cmd_done),                                      .clk(lsu_busm_clk),        .clken(lsu_busm_clken),        .rawclk(clk), .*);
-   rvdff_fpga  #(.WIDTH(1))              obuf_data_done_ff (.din(obuf_data_done_in),           .dout(obuf_data_done),                                     .clk(lsu_busm_clk),        .clken(lsu_busm_clken),        .rawclk(clk), .*);
-   rvdff_fpga  #(.WIDTH(mcu_pt.LSU_BUS_TAG)) obuf_rdrsp_tagff  (.din(obuf_rdrsp_tag_in),           .dout(obuf_rdrsp_tag),                                     .clk(lsu_busm_clk),        .clken(lsu_busm_clken),        .rawclk(clk), .*);
-   rvdffs_fpga #(.WIDTH(mcu_pt.LSU_BUS_TAG)) obuf_tag0ff       (.din(obuf_tag0_in),                .dout(obuf_tag0),       .en(obuf_wr_en),                   .clk(lsu_bus_obuf_c1_clk), .clken(lsu_bus_obuf_c1_clken), .rawclk(clk), .*);
-   rvdffs_fpga #(.WIDTH(mcu_pt.LSU_BUS_TAG)) obuf_tag1ff       (.din(obuf_tag1_in),                .dout(obuf_tag1),       .en(obuf_wr_en),                   .clk(lsu_bus_obuf_c1_clk), .clken(lsu_bus_obuf_c1_clken), .rawclk(clk), .*);
-   rvdffs_fpga #(.WIDTH(1))              obuf_mergeff      (.din(obuf_merge_in),               .dout(obuf_merge),      .en(obuf_wr_en),                   .clk(lsu_bus_obuf_c1_clk), .clken(lsu_bus_obuf_c1_clken), .rawclk(clk), .*);
-   rvdffs_fpga #(.WIDTH(1))              obuf_writeff      (.din(obuf_write_in),               .dout(obuf_write),      .en(obuf_wr_en),                   .clk(lsu_bus_obuf_c1_clk), .clken(lsu_bus_obuf_c1_clken), .rawclk(clk), .*);
-   rvdffs_fpga #(.WIDTH(1))              obuf_sideeffectff (.din(obuf_sideeffect_in),          .dout(obuf_sideeffect), .en(obuf_wr_en),                   .clk(lsu_bus_obuf_c1_clk), .clken(lsu_bus_obuf_c1_clken), .rawclk(clk), .*);
-   rvdffs_fpga #(.WIDTH(2))              obuf_szff         (.din(obuf_sz_in[1:0]),             .dout(obuf_sz),         .en(obuf_wr_en),                   .clk(lsu_bus_obuf_c1_clk), .clken(lsu_bus_obuf_c1_clken), .rawclk(clk), .*);
-   rvdffs_fpga #(.WIDTH(8))              obuf_byteenff     (.din(obuf_byteen_in[7:0]),         .dout(obuf_byteen),     .en(obuf_wr_en),                   .clk(lsu_bus_obuf_c1_clk), .clken(lsu_bus_obuf_c1_clken), .rawclk(clk), .*);
-   rvdffe     #(.WIDTH(32))              obuf_addrff       (.din(obuf_addr_in[31:0]),          .dout(obuf_addr),       .en(obuf_wr_en),                                                                                           .*);
-   rvdffe     #(.WIDTH(64))              obuf_dataff       (.din(obuf_data_in[63:0]),          .dout(obuf_data),       .en(obuf_wr_en),                                                                                           .*);
-   rvdff_fpga #(.WIDTH(TIMER_LOG2))      obuf_timerff      (.din(obuf_wr_timer_in),            .dout(obuf_wr_timer),                                      .clk(lsu_busm_clk),        .clken(lsu_busm_clken), .rawclk(clk),        .*);
+   mcu_rvdff_fpga  #(.WIDTH(1))              obuf_wren_ff      (.din(obuf_wr_en),                  .dout(obuf_wr_enQ),                                        .clk(lsu_busm_clk),        .clken(lsu_busm_clken), .rawclk(clk),        .*);
+   mcu_rvdffsc     #(.WIDTH(1))              obuf_valid_ff     (.din(1'b1),                        .dout(obuf_valid),      .en(obuf_wr_en), .clear(obuf_rst), .clk(lsu_free_c2_clk),                                                  .*);
+   mcu_rvdffs      #(.WIDTH(1))              obuf_nosend_ff    (.din(obuf_nosend_in),              .dout(obuf_nosend),     .en(obuf_wr_en),                   .clk(lsu_free_c2_clk),                                                  .*);
+   mcu_rvdffs      #(.WIDTH(1))              obuf_rdrsp_pend_ff(.din(obuf_rdrsp_pend_in),          .dout(obuf_rdrsp_pend), .en(obuf_rdrsp_pend_en),           .clk(lsu_free_c2_clk),                                                  .*);
+   mcu_rvdff_fpga  #(.WIDTH(1))              obuf_cmd_done_ff  (.din(obuf_cmd_done_in),            .dout(obuf_cmd_done),                                      .clk(lsu_busm_clk),        .clken(lsu_busm_clken),        .rawclk(clk), .*);
+   mcu_rvdff_fpga  #(.WIDTH(1))              obuf_data_done_ff (.din(obuf_data_done_in),           .dout(obuf_data_done),                                     .clk(lsu_busm_clk),        .clken(lsu_busm_clken),        .rawclk(clk), .*);
+   mcu_rvdff_fpga  #(.WIDTH(mcu_pt.LSU_BUS_TAG)) obuf_rdrsp_tagff  (.din(obuf_rdrsp_tag_in),           .dout(obuf_rdrsp_tag),                                     .clk(lsu_busm_clk),        .clken(lsu_busm_clken),        .rawclk(clk), .*);
+   mcu_rvdffs_fpga #(.WIDTH(mcu_pt.LSU_BUS_TAG)) obuf_tag0ff       (.din(obuf_tag0_in),                .dout(obuf_tag0),       .en(obuf_wr_en),                   .clk(lsu_bus_obuf_c1_clk), .clken(lsu_bus_obuf_c1_clken), .rawclk(clk), .*);
+   mcu_rvdffs_fpga #(.WIDTH(mcu_pt.LSU_BUS_TAG)) obuf_tag1ff       (.din(obuf_tag1_in),                .dout(obuf_tag1),       .en(obuf_wr_en),                   .clk(lsu_bus_obuf_c1_clk), .clken(lsu_bus_obuf_c1_clken), .rawclk(clk), .*);
+   mcu_rvdffs_fpga #(.WIDTH(1))              obuf_mergeff      (.din(obuf_merge_in),               .dout(obuf_merge),      .en(obuf_wr_en),                   .clk(lsu_bus_obuf_c1_clk), .clken(lsu_bus_obuf_c1_clken), .rawclk(clk), .*);
+   mcu_rvdffs_fpga #(.WIDTH(1))              obuf_writeff      (.din(obuf_write_in),               .dout(obuf_write),      .en(obuf_wr_en),                   .clk(lsu_bus_obuf_c1_clk), .clken(lsu_bus_obuf_c1_clken), .rawclk(clk), .*);
+   mcu_rvdffs_fpga #(.WIDTH(1))              obuf_sideeffectff (.din(obuf_sideeffect_in),          .dout(obuf_sideeffect), .en(obuf_wr_en),                   .clk(lsu_bus_obuf_c1_clk), .clken(lsu_bus_obuf_c1_clken), .rawclk(clk), .*);
+   mcu_rvdffs_fpga #(.WIDTH(2))              obuf_szff         (.din(obuf_sz_in[1:0]),             .dout(obuf_sz),         .en(obuf_wr_en),                   .clk(lsu_bus_obuf_c1_clk), .clken(lsu_bus_obuf_c1_clken), .rawclk(clk), .*);
+   mcu_rvdffs_fpga #(.WIDTH(8))              obuf_byteenff     (.din(obuf_byteen_in[7:0]),         .dout(obuf_byteen),     .en(obuf_wr_en),                   .clk(lsu_bus_obuf_c1_clk), .clken(lsu_bus_obuf_c1_clken), .rawclk(clk), .*);
+   mcu_rvdffe     #(.WIDTH(32))              obuf_addrff       (.din(obuf_addr_in[31:0]),          .dout(obuf_addr),       .en(obuf_wr_en),                                                                                           .*);
+   mcu_rvdffe     #(.WIDTH(64))              obuf_dataff       (.din(obuf_data_in[63:0]),          .dout(obuf_data),       .en(obuf_wr_en),                                                                                           .*);
+   mcu_rvdff_fpga #(.WIDTH(TIMER_LOG2))      obuf_timerff      (.din(obuf_wr_timer_in),            .dout(obuf_wr_timer),                                      .clk(lsu_busm_clk),        .clken(lsu_busm_clken), .rawclk(clk),        .*);
 
 
    //------------------------------------------------------------------------------
@@ -735,24 +735,24 @@ import mcu_el2_pkg::*;
          endcase
       end
 
-      rvdffs  #(.WIDTH($bits(state_t))) buf_state_ff     (.din(buf_nxtstate[i]),             .dout({buf_state[i]}),    .en(buf_state_en[i]),                                        .clk(lsu_bus_buf_c1_clk), .*);
-      rvdff   #(.WIDTH(DEPTH))          buf_ageff        (.din(buf_age_in[i]),               .dout(buf_ageQ[i]),                                                                    .clk(lsu_bus_buf_c1_clk), .*);
-      rvdff   #(.WIDTH(DEPTH))          buf_rspageff     (.din(buf_rspage_in[i]),            .dout(buf_rspageQ[i]),                                                                 .clk(lsu_bus_buf_c1_clk), .*);
-      rvdffs  #(.WIDTH(DEPTH_LOG2))     buf_dualtagff    (.din(buf_dualtag_in[i]),           .dout(buf_dualtag[i]),    .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
-      rvdffs  #(.WIDTH(1))              buf_dualff       (.din(buf_dual_in[i]),              .dout(buf_dual[i]),       .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
-      rvdffs  #(.WIDTH(1))              buf_samedwff     (.din(buf_samedw_in[i]),            .dout(buf_samedw[i]),     .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
-      rvdffs  #(.WIDTH(1))              buf_nomergeff    (.din(buf_nomerge_in[i]),           .dout(buf_nomerge[i]),    .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
-      rvdffs  #(.WIDTH(1))              buf_dualhiff     (.din(buf_dualhi_in[i]),            .dout(buf_dualhi[i]),     .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
-      rvdffs  #(.WIDTH(1))              buf_ldfwdff      (.din(buf_ldfwd_in[i]),             .dout(buf_ldfwd[i]),      .en(buf_ldfwd_en[i]),                                        .clk(lsu_bus_buf_c1_clk), .*);
-      rvdffs  #(.WIDTH(DEPTH_LOG2))     buf_ldfwdtagff   (.din(buf_ldfwdtag_in[i]),          .dout(buf_ldfwdtag[i]),   .en(buf_ldfwd_en[i]),                                        .clk(lsu_bus_buf_c1_clk), .*);
-      rvdffs  #(.WIDTH(1))              buf_sideeffectff (.din(buf_sideeffect_in[i]),        .dout(buf_sideeffect[i]), .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
-      rvdffs  #(.WIDTH(1))              buf_unsignff     (.din(buf_unsign_in[i]),            .dout(buf_unsign[i]),     .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
-      rvdffs  #(.WIDTH(1))              buf_writeff      (.din(buf_write_in[i]),             .dout(buf_write[i]),      .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
-      rvdffs  #(.WIDTH(2))              buf_szff         (.din(buf_sz_in[i]),                .dout(buf_sz[i]),         .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
-      rvdffe  #(.WIDTH(32))             buf_addrff       (.din(buf_addr_in[i][31:0]),        .dout(buf_addr[i]),       .en(buf_wr_en[i]),                                                                     .*);
-      rvdffs  #(.WIDTH(4))              buf_byteenff     (.din(buf_byteen_in[i][3:0]),       .dout(buf_byteen[i]),     .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
-      rvdffe  #(.WIDTH(32))             buf_dataff       (.din(buf_data_in[i][31:0]),        .dout(buf_data[i]),       .en(buf_data_en[i]),                                                                   .*);
-      rvdffsc #(.WIDTH(1))              buf_errorff      (.din(1'b1),                        .dout(buf_error[i]),      .en(buf_error_en[i]),                    .clear(buf_rst[i]), .clk(lsu_bus_buf_c1_clk), .*);
+      mcu_rvdffs  #(.WIDTH($bits(state_t))) buf_state_ff     (.din(buf_nxtstate[i]),             .dout({buf_state[i]}),    .en(buf_state_en[i]),                                        .clk(lsu_bus_buf_c1_clk), .*);
+      mcu_rvdff   #(.WIDTH(DEPTH))          buf_ageff        (.din(buf_age_in[i]),               .dout(buf_ageQ[i]),                                                                    .clk(lsu_bus_buf_c1_clk), .*);
+      mcu_rvdff   #(.WIDTH(DEPTH))          buf_rspageff     (.din(buf_rspage_in[i]),            .dout(buf_rspageQ[i]),                                                                 .clk(lsu_bus_buf_c1_clk), .*);
+      mcu_rvdffs  #(.WIDTH(DEPTH_LOG2))     buf_dualtagff    (.din(buf_dualtag_in[i]),           .dout(buf_dualtag[i]),    .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
+      mcu_rvdffs  #(.WIDTH(1))              buf_dualff       (.din(buf_dual_in[i]),              .dout(buf_dual[i]),       .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
+      mcu_rvdffs  #(.WIDTH(1))              buf_samedwff     (.din(buf_samedw_in[i]),            .dout(buf_samedw[i]),     .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
+      mcu_rvdffs  #(.WIDTH(1))              buf_nomergeff    (.din(buf_nomerge_in[i]),           .dout(buf_nomerge[i]),    .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
+      mcu_rvdffs  #(.WIDTH(1))              buf_dualhiff     (.din(buf_dualhi_in[i]),            .dout(buf_dualhi[i]),     .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
+      mcu_rvdffs  #(.WIDTH(1))              buf_ldfwdff      (.din(buf_ldfwd_in[i]),             .dout(buf_ldfwd[i]),      .en(buf_ldfwd_en[i]),                                        .clk(lsu_bus_buf_c1_clk), .*);
+      mcu_rvdffs  #(.WIDTH(DEPTH_LOG2))     buf_ldfwdtagff   (.din(buf_ldfwdtag_in[i]),          .dout(buf_ldfwdtag[i]),   .en(buf_ldfwd_en[i]),                                        .clk(lsu_bus_buf_c1_clk), .*);
+      mcu_rvdffs  #(.WIDTH(1))              buf_sideeffectff (.din(buf_sideeffect_in[i]),        .dout(buf_sideeffect[i]), .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
+      mcu_rvdffs  #(.WIDTH(1))              buf_unsignff     (.din(buf_unsign_in[i]),            .dout(buf_unsign[i]),     .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
+      mcu_rvdffs  #(.WIDTH(1))              buf_writeff      (.din(buf_write_in[i]),             .dout(buf_write[i]),      .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
+      mcu_rvdffs  #(.WIDTH(2))              buf_szff         (.din(buf_sz_in[i]),                .dout(buf_sz[i]),         .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
+      mcu_rvdffe  #(.WIDTH(32))             buf_addrff       (.din(buf_addr_in[i][31:0]),        .dout(buf_addr[i]),       .en(buf_wr_en[i]),                                                                     .*);
+      mcu_rvdffs  #(.WIDTH(4))              buf_byteenff     (.din(buf_byteen_in[i][3:0]),       .dout(buf_byteen[i]),     .en(buf_wr_en[i]),                                           .clk(lsu_bus_buf_c1_clk), .*);
+      mcu_rvdffe  #(.WIDTH(32))             buf_dataff       (.din(buf_data_in[i][31:0]),        .dout(buf_data[i]),       .en(buf_data_en[i]),                                                                   .*);
+      mcu_rvdffsc #(.WIDTH(1))              buf_errorff      (.din(1'b1),                        .dout(buf_error[i]),      .en(buf_error_en[i]),                    .clear(buf_rst[i]), .clk(lsu_bus_buf_c1_clk), .*);
 
    end
 
@@ -893,29 +893,29 @@ import mcu_el2_pkg::*;
    assign lsu_pmu_bus_error = lsu_imprecise_error_load_any | lsu_imprecise_error_store_any;
    assign lsu_pmu_bus_busy  = (lsu_axi_awvalid & ~lsu_axi_awready) | (lsu_axi_wvalid & ~lsu_axi_wready) | (lsu_axi_arvalid & ~lsu_axi_arready);
 
-   rvdff_fpga #(.WIDTH(1))               lsu_axi_awvalid_ff (.din(lsu_axi_awvalid),                .dout(lsu_axi_awvalid_q),                .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
-   rvdff_fpga #(.WIDTH(1))               lsu_axi_awready_ff (.din(lsu_axi_awready),                .dout(lsu_axi_awready_q),                .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
-   rvdff_fpga #(.WIDTH(1))               lsu_axi_wvalid_ff  (.din(lsu_axi_wvalid),                 .dout(lsu_axi_wvalid_q),                 .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
-   rvdff_fpga #(.WIDTH(1))               lsu_axi_wready_ff  (.din(lsu_axi_wready),                 .dout(lsu_axi_wready_q),                 .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
-   rvdff_fpga #(.WIDTH(1))               lsu_axi_arvalid_ff (.din(lsu_axi_arvalid),                .dout(lsu_axi_arvalid_q),                .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
-   rvdff_fpga #(.WIDTH(1))               lsu_axi_arready_ff (.din(lsu_axi_arready),                .dout(lsu_axi_arready_q),                .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
-
-   rvdff_fpga  #(.WIDTH(1))              lsu_axi_bvalid_ff  (.din(lsu_axi_bvalid),                 .dout(lsu_axi_bvalid_q),                 .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
-   rvdff_fpga  #(.WIDTH(1))              lsu_axi_bready_ff  (.din(lsu_axi_bready),                 .dout(lsu_axi_bready_q),                 .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
-   rvdff_fpga  #(.WIDTH(2))              lsu_axi_bresp_ff   (.din(lsu_axi_bresp[1:0]),             .dout(lsu_axi_bresp_q[1:0]),             .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
-   rvdff_fpga  #(.WIDTH(mcu_pt.LSU_BUS_TAG)) lsu_axi_bid_ff     (.din(lsu_axi_bid[mcu_pt.LSU_BUS_TAG-1:0]),.dout(lsu_axi_bid_q[mcu_pt.LSU_BUS_TAG-1:0]),.clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
-   rvdffe      #(.WIDTH(64))             lsu_axi_rdata_ff   (.din(lsu_axi_rdata[63:0]),            .dout(lsu_axi_rdata_q[63:0]),            .en((lsu_axi_rvalid | clk_override) & lsu_bus_clk_en), .*);
-
-   rvdff_fpga  #(.WIDTH(1))              lsu_axi_rvalid_ff  (.din(lsu_axi_rvalid),                 .dout(lsu_axi_rvalid_q),                 .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
-   rvdff_fpga  #(.WIDTH(1))              lsu_axi_rready_ff  (.din(lsu_axi_rready),                 .dout(lsu_axi_rready_q),                 .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
-   rvdff_fpga  #(.WIDTH(2))              lsu_axi_rresp_ff   (.din(lsu_axi_rresp[1:0]),             .dout(lsu_axi_rresp_q[1:0]),             .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
-   rvdff_fpga  #(.WIDTH(mcu_pt.LSU_BUS_TAG)) lsu_axi_rid_ff     (.din(lsu_axi_rid[mcu_pt.LSU_BUS_TAG-1:0]),.dout(lsu_axi_rid_q[mcu_pt.LSU_BUS_TAG-1:0]),.clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
-
-   rvdff #(.WIDTH(DEPTH_LOG2)) lsu_WrPtr0_rff (.din(WrPtr0_m), .dout(WrPtr0_r), .clk(lsu_c2_r_clk), .*);
-   rvdff #(.WIDTH(DEPTH_LOG2)) lsu_WrPtr1_rff (.din(WrPtr1_m), .dout(WrPtr1_r), .clk(lsu_c2_r_clk), .*);
-
-   rvdff #(.WIDTH(1)) lsu_busreq_rff (.din(lsu_busreq_m & ~flush_r & ~ld_full_hit_m),      .dout(lsu_busreq_r), .clk(lsu_c2_r_clk), .*);
-   rvdff #(.WIDTH(1)) lsu_nonblock_load_valid_rff  (.din(lsu_nonblock_load_valid_m),  .dout(lsu_nonblock_load_valid_r), .clk(lsu_c2_r_clk), .*);
+   mcu_rvdff_fpga #(.WIDTH(1))               lsu_axi_awvalid_ff (.din(lsu_axi_awvalid),                .dout(lsu_axi_awvalid_q),                .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
+   mcu_rvdff_fpga #(.WIDTH(1))               lsu_axi_awready_ff (.din(lsu_axi_awready),                .dout(lsu_axi_awready_q),                .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
+   mcu_rvdff_fpga #(.WIDTH(1))               lsu_axi_wvalid_ff  (.din(lsu_axi_wvalid),                 .dout(lsu_axi_wvalid_q),                 .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
+   mcu_rvdff_fpga #(.WIDTH(1))               lsu_axi_wready_ff  (.din(lsu_axi_wready),                 .dout(lsu_axi_wready_q),                 .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
+   mcu_rvdff_fpga #(.WIDTH(1))               lsu_axi_arvalid_ff (.din(lsu_axi_arvalid),                .dout(lsu_axi_arvalid_q),                .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
+   mcu_rvdff_fpga #(.WIDTH(1))               lsu_axi_arready_ff (.din(lsu_axi_arready),                .dout(lsu_axi_arready_q),                .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
+
+   mcu_rvdff_fpga  #(.WIDTH(1))              lsu_axi_bvalid_ff  (.din(lsu_axi_bvalid),                 .dout(lsu_axi_bvalid_q),                 .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
+   mcu_rvdff_fpga  #(.WIDTH(1))              lsu_axi_bready_ff  (.din(lsu_axi_bready),                 .dout(lsu_axi_bready_q),                 .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
+   mcu_rvdff_fpga  #(.WIDTH(2))              lsu_axi_bresp_ff   (.din(lsu_axi_bresp[1:0]),             .dout(lsu_axi_bresp_q[1:0]),             .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
+   mcu_rvdff_fpga  #(.WIDTH(mcu_pt.LSU_BUS_TAG)) lsu_axi_bid_ff     (.din(lsu_axi_bid[mcu_pt.LSU_BUS_TAG-1:0]),.dout(lsu_axi_bid_q[mcu_pt.LSU_BUS_TAG-1:0]),.clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
+   mcu_rvdffe      #(.WIDTH(64))             lsu_axi_rdata_ff   (.din(lsu_axi_rdata[63:0]),            .dout(lsu_axi_rdata_q[63:0]),            .en((lsu_axi_rvalid | clk_override) & lsu_bus_clk_en), .*);
+
+   mcu_rvdff_fpga  #(.WIDTH(1))              lsu_axi_rvalid_ff  (.din(lsu_axi_rvalid),                 .dout(lsu_axi_rvalid_q),                 .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
+   mcu_rvdff_fpga  #(.WIDTH(1))              lsu_axi_rready_ff  (.din(lsu_axi_rready),                 .dout(lsu_axi_rready_q),                 .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
+   mcu_rvdff_fpga  #(.WIDTH(2))              lsu_axi_rresp_ff   (.din(lsu_axi_rresp[1:0]),             .dout(lsu_axi_rresp_q[1:0]),             .clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
+   mcu_rvdff_fpga  #(.WIDTH(mcu_pt.LSU_BUS_TAG)) lsu_axi_rid_ff     (.din(lsu_axi_rid[mcu_pt.LSU_BUS_TAG-1:0]),.dout(lsu_axi_rid_q[mcu_pt.LSU_BUS_TAG-1:0]),.clk(lsu_busm_clk), .clken(lsu_busm_clken), .rawclk(clk), .*);
+
+   mcu_rvdff #(.WIDTH(DEPTH_LOG2)) lsu_WrPtr0_rff (.din(WrPtr0_m), .dout(WrPtr0_r), .clk(lsu_c2_r_clk), .*);
+   mcu_rvdff #(.WIDTH(DEPTH_LOG2)) lsu_WrPtr1_rff (.din(WrPtr1_m), .dout(WrPtr1_r), .clk(lsu_c2_r_clk), .*);
+
+   mcu_rvdff #(.WIDTH(1)) lsu_busreq_rff (.din(lsu_busreq_m & ~flush_r & ~ld_full_hit_m),      .dout(lsu_busreq_r), .clk(lsu_c2_r_clk), .*);
+   mcu_rvdff #(.WIDTH(1)) lsu_nonblock_load_valid_rff  (.din(lsu_nonblock_load_valid_m),  .dout(lsu_nonblock_load_valid_r), .clk(lsu_c2_r_clk), .*);
 
 `ifdef MCU_RV_ASSERT_ON
 
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_bus_intf.sv b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_bus_intf.sv
index 3930137..e1bf3e8 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_bus_intf.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_bus_intf.sv
@@ -261,11 +261,11 @@ import mcu_el2_pkg::*;
 
    // Fifo flops
 
-   rvdff #(.WIDTH(1)) clken_ff (.din(lsu_bus_clk_en), .dout(lsu_bus_clk_en_q), .clk(active_clk), .*);
+   mcu_rvdff #(.WIDTH(1)) clken_ff (.din(lsu_bus_clk_en), .dout(lsu_bus_clk_en_q), .clk(active_clk), .*);
 
-   rvdff #(.WIDTH(1)) is_sideeffects_rff (.din(is_sideeffects_m), .dout(is_sideeffects_r), .clk(lsu_c1_r_clk), .*);
+   mcu_rvdff #(.WIDTH(1)) is_sideeffects_rff (.din(is_sideeffects_m), .dout(is_sideeffects_r), .clk(lsu_c1_r_clk), .*);
 
-   rvdff #(4) lsu_byten_rff (.*, .din(ldst_byteen_m[3:0]), .dout(ldst_byteen_r[3:0]), .clk(lsu_c1_r_clk));
+   mcu_rvdff #(4) lsu_byten_rff (.*, .din(ldst_byteen_m[3:0]), .dout(ldst_byteen_r[3:0]), .clk(lsu_c1_r_clk));
 
 `ifdef MCU_RV_ASSERT_ON
 
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_clkdomain.sv b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_clkdomain.sv
index b9c344d..bc4b146 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_clkdomain.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_clkdomain.sv
@@ -110,24 +110,24 @@ import mcu_el2_pkg::*;
    assign lsu_free_c2_clken = lsu_free_c1_clken | lsu_free_c1_clken_q | clk_override;
 
     // Flops
-   rvdff #(1) lsu_free_c1_clkenff (.din(lsu_free_c1_clken), .dout(lsu_free_c1_clken_q), .clk(active_clk), .*);
+   mcu_rvdff #(1) lsu_free_c1_clkenff (.din(lsu_free_c1_clken), .dout(lsu_free_c1_clken_q), .clk(active_clk), .*);
 
-   rvdff #(1) lsu_c1_m_clkenff (.din(lsu_c1_m_clken), .dout(lsu_c1_m_clken_q), .clk(lsu_free_c2_clk), .*);
-   rvdff #(1) lsu_c1_r_clkenff (.din(lsu_c1_r_clken), .dout(lsu_c1_r_clken_q), .clk(lsu_free_c2_clk), .*);
+   mcu_rvdff #(1) lsu_c1_m_clkenff (.din(lsu_c1_m_clken), .dout(lsu_c1_m_clken_q), .clk(lsu_free_c2_clk), .*);
+   mcu_rvdff #(1) lsu_c1_r_clkenff (.din(lsu_c1_r_clken), .dout(lsu_c1_r_clken_q), .clk(lsu_free_c2_clk), .*);
 
    // Clock Headers
-   rvoclkhdr lsu_c1m_cgc ( .en(lsu_c1_m_clken), .l1clk(lsu_c1_m_clk), .* );
-   rvoclkhdr lsu_c1r_cgc ( .en(lsu_c1_r_clken), .l1clk(lsu_c1_r_clk), .* );
+   mcu_rvoclkhdr lsu_c1m_cgc ( .en(lsu_c1_m_clken), .l1clk(lsu_c1_m_clk), .* );
+   mcu_rvoclkhdr lsu_c1r_cgc ( .en(lsu_c1_r_clken), .l1clk(lsu_c1_r_clk), .* );
 
-   rvoclkhdr lsu_c2m_cgc ( .en(lsu_c2_m_clken), .l1clk(lsu_c2_m_clk), .* );
-   rvoclkhdr lsu_c2r_cgc ( .en(lsu_c2_r_clken), .l1clk(lsu_c2_r_clk), .* );
+   mcu_rvoclkhdr lsu_c2m_cgc ( .en(lsu_c2_m_clken), .l1clk(lsu_c2_m_clk), .* );
+   mcu_rvoclkhdr lsu_c2r_cgc ( .en(lsu_c2_r_clken), .l1clk(lsu_c2_r_clk), .* );
 
-   rvoclkhdr lsu_store_c1m_cgc (.en(lsu_store_c1_m_clken), .l1clk(lsu_store_c1_m_clk), .*);
-   rvoclkhdr lsu_store_c1r_cgc (.en(lsu_store_c1_r_clken), .l1clk(lsu_store_c1_r_clk), .*);
+   mcu_rvoclkhdr lsu_store_c1m_cgc (.en(lsu_store_c1_m_clken), .l1clk(lsu_store_c1_m_clk), .*);
+   mcu_rvoclkhdr lsu_store_c1r_cgc (.en(lsu_store_c1_r_clken), .l1clk(lsu_store_c1_r_clk), .*);
 
-   rvoclkhdr lsu_stbuf_c1_cgc ( .en(lsu_stbuf_c1_clken), .l1clk(lsu_stbuf_c1_clk), .* );
-   rvoclkhdr lsu_bus_ibuf_c1_cgc ( .en(lsu_bus_ibuf_c1_clken), .l1clk(lsu_bus_ibuf_c1_clk), .* );
-   rvoclkhdr lsu_bus_buf_c1_cgc  ( .en(lsu_bus_buf_c1_clken),  .l1clk(lsu_bus_buf_c1_clk), .* );
+   mcu_rvoclkhdr lsu_stbuf_c1_cgc ( .en(lsu_stbuf_c1_clken), .l1clk(lsu_stbuf_c1_clk), .* );
+   mcu_rvoclkhdr lsu_bus_ibuf_c1_cgc ( .en(lsu_bus_ibuf_c1_clken), .l1clk(lsu_bus_ibuf_c1_clk), .* );
+   mcu_rvoclkhdr lsu_bus_buf_c1_cgc  ( .en(lsu_bus_buf_c1_clken),  .l1clk(lsu_bus_buf_c1_clk), .* );
 
    assign lsu_busm_clken = (~lsu_bus_buffer_empty_any | lsu_busreq_r | clk_override) & lsu_bus_clk_en;
 
@@ -139,7 +139,7 @@ import mcu_el2_pkg::*;
    rvclkhdr  lsu_busm_cgc (.en(lsu_busm_clken), .l1clk(lsu_busm_clk), .*);
 `endif
 
-   rvoclkhdr lsu_free_cgc (.en(lsu_free_c2_clken), .l1clk(lsu_free_c2_clk), .*);
+   mcu_rvoclkhdr lsu_free_cgc (.en(lsu_free_c2_clken), .l1clk(lsu_free_c2_clk), .*);
 
 endmodule
 
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_dccm_ctl.sv b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_dccm_ctl.sv
index bc0f54d..31f3d6a 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_dccm_ctl.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_dccm_ctl.sv
@@ -210,14 +210,14 @@ import mcu_el2_pkg::*;
          assign lsu_rdata_r[(8*i)+7:8*i]       = stbuf_fwdbyteen_r[i] ? stbuf_fwddata_r[(8*i)+7:8*i] :
                                                                         (addr_in_pic_r ? picm_rd_data_r[(8*i)+7:8*i] :  ({8{addr_in_dccm_r}} & dccm_rdata_r[(8*i)+7:8*i]));
       end
-      rvdffe #(mcu_pt.DCCM_DATA_WIDTH) dccm_rdata_hi_r_ff    (.*, .din(dccm_rdata_hi_m[mcu_pt.DCCM_DATA_WIDTH-1:0]), .dout(dccm_rdata_hi_r[mcu_pt.DCCM_DATA_WIDTH-1:0]), .en((lsu_dccm_rden_m & ldst_dual_m) | clk_override));
-      rvdffe #(mcu_pt.DCCM_DATA_WIDTH) dccm_rdata_lo_r_ff    (.*, .din(dccm_rdata_lo_m[mcu_pt.DCCM_DATA_WIDTH-1:0]), .dout(dccm_rdata_lo_r[mcu_pt.DCCM_DATA_WIDTH-1:0]), .en(lsu_dccm_rden_m | clk_override));
-      rvdffe #(2*mcu_pt.DCCM_ECC_WIDTH)  dccm_data_ecc_r_ff  (.*, .din({dccm_data_ecc_hi_m[mcu_pt.DCCM_ECC_WIDTH-1:0], dccm_data_ecc_lo_m[mcu_pt.DCCM_ECC_WIDTH-1:0]}),
+      mcu_rvdffe #(mcu_pt.DCCM_DATA_WIDTH) dccm_rdata_hi_r_ff    (.*, .din(dccm_rdata_hi_m[mcu_pt.DCCM_DATA_WIDTH-1:0]), .dout(dccm_rdata_hi_r[mcu_pt.DCCM_DATA_WIDTH-1:0]), .en((lsu_dccm_rden_m & ldst_dual_m) | clk_override));
+      mcu_rvdffe #(mcu_pt.DCCM_DATA_WIDTH) dccm_rdata_lo_r_ff    (.*, .din(dccm_rdata_lo_m[mcu_pt.DCCM_DATA_WIDTH-1:0]), .dout(dccm_rdata_lo_r[mcu_pt.DCCM_DATA_WIDTH-1:0]), .en(lsu_dccm_rden_m | clk_override));
+      mcu_rvdffe #(2*mcu_pt.DCCM_ECC_WIDTH)  dccm_data_ecc_r_ff  (.*, .din({dccm_data_ecc_hi_m[mcu_pt.DCCM_ECC_WIDTH-1:0], dccm_data_ecc_lo_m[mcu_pt.DCCM_ECC_WIDTH-1:0]}),
                                                               .dout({dccm_data_ecc_hi_r[mcu_pt.DCCM_ECC_WIDTH-1:0], dccm_data_ecc_lo_r[mcu_pt.DCCM_ECC_WIDTH-1:0]}),                                  .en(lsu_dccm_rden_m | clk_override));
-      rvdff #(8)                   stbuf_fwdbyteen_ff    (.*, .din({stbuf_fwdbyteen_hi_m[3:0], stbuf_fwdbyteen_lo_m[3:0]}), .dout({stbuf_fwdbyteen_hi_r[3:0], stbuf_fwdbyteen_lo_r[3:0]}), .clk(lsu_c2_r_clk));
-      rvdffe #(64)                 stbuf_fwddata_ff      (.*, .din({stbuf_fwddata_hi_m[31:0], stbuf_fwddata_lo_m[31:0]}),   .dout({stbuf_fwddata_hi_r[31:0], stbuf_fwddata_lo_r[31:0]}),   .en(stbuf_fwddata_en));
-      rvdffe #(32)                 picm_rddata_rff       (.*, .din(picm_rd_data_m[31:0]),                                   .dout(picm_rd_data_r[31:0]),                                   .en(addr_in_pic_m | clk_override));
-      rvdff #(3)                   dma_mem_tag_rff       (.*, .din(dma_mem_tag_m[2:0]),                                     .dout(dma_mem_tag_r[2:0]),                                     .clk(lsu_c1_r_clk));
+      mcu_rvdff #(8)                   stbuf_fwdbyteen_ff    (.*, .din({stbuf_fwdbyteen_hi_m[3:0], stbuf_fwdbyteen_lo_m[3:0]}), .dout({stbuf_fwdbyteen_hi_r[3:0], stbuf_fwdbyteen_lo_r[3:0]}), .clk(lsu_c2_r_clk));
+      mcu_rvdffe #(64)                 stbuf_fwddata_ff      (.*, .din({stbuf_fwddata_hi_m[31:0], stbuf_fwddata_lo_m[31:0]}),   .dout({stbuf_fwddata_hi_r[31:0], stbuf_fwddata_lo_r[31:0]}),   .en(stbuf_fwddata_en));
+      mcu_rvdffe #(32)                 picm_rddata_rff       (.*, .din(picm_rd_data_m[31:0]),                                   .dout(picm_rd_data_r[31:0]),                                   .en(addr_in_pic_m | clk_override));
+      mcu_rvdff #(3)                   dma_mem_tag_rff       (.*, .din(dma_mem_tag_m[2:0]),                                     .dout(dma_mem_tag_r[2:0]),                                     .clk(lsu_c1_r_clk));
 
    end else begin: L2U_Plus1_0
 
@@ -248,7 +248,7 @@ import mcu_el2_pkg::*;
                                                                        (addr_in_pic_m ? picm_rd_data_m[(8*i)+7:8*i] : ({8{addr_in_dccm_m}} & dccm_rdata_m[(8*i)+7:8*i]));
       end
 
-      rvdffe #(32) lsu_ld_data_corr_rff(.*, .din(lsu_ld_data_corr_m[31:0]), .dout(lsu_ld_data_corr_r[31:0]), .en((lsu_pkt_m.valid & lsu_pkt_m.load & (addr_in_pic_m | addr_in_dccm_m)) | clk_override));
+      mcu_rvdffe #(32) lsu_ld_data_corr_rff(.*, .din(lsu_ld_data_corr_m[31:0]), .dout(lsu_ld_data_corr_r[31:0]), .en((lsu_pkt_m.valid & lsu_pkt_m.load & (addr_in_pic_m | addr_in_dccm_m)) | clk_override));
    end
 
    assign kill_ecc_corr_lo_r = (((lsu_addr_d[mcu_pt.DCCM_BITS-1:2] == lsu_addr_r[mcu_pt.DCCM_BITS-1:2]) | (end_addr_d[mcu_pt.DCCM_BITS-1:2] == lsu_addr_r[mcu_pt.DCCM_BITS-1:2])) & lsu_pkt_d.valid & lsu_pkt_d.store & lsu_pkt_d.dma & addr_in_dccm_d) |
@@ -335,11 +335,11 @@ import mcu_el2_pkg::*;
                                                                                                                     ((dccm_wren_Q & dccm_wr_bypass_d_m_hi_Q) ? dccm_wr_data_Q[(8*i)+7:(8*i)] : sec_data_hi_r[(8*i)+7:(8*i)]));
       end
 
-      rvdff #(1)   dccm_wren_ff       (.*, .din(lsu_stbuf_commit_any),  .dout(dccm_wren_Q),             .clk(lsu_free_c2_clk));   // ECC load errors writing to dccm shouldn't fwd to stores in pipe
-      rvdffe #(32) dccm_wrdata_ff     (.*, .din(stbuf_data_any[31:0]),  .dout(dccm_wr_data_Q[31:0]),    .en(lsu_stbuf_commit_any | clk_override), .clk(clk));
-      rvdff #(1)   dccm_wrbyp_dm_loff (.*, .din(dccm_wr_bypass_d_m_lo), .dout(dccm_wr_bypass_d_m_lo_Q), .clk(lsu_free_c2_clk));
-      rvdff #(1)   dccm_wrbyp_dm_hiff (.*, .din(dccm_wr_bypass_d_m_hi), .dout(dccm_wr_bypass_d_m_hi_Q), .clk(lsu_free_c2_clk));
-      rvdff #(32)  store_data_rff     (.*, .din(store_data_m[31:0]),    .dout(store_data_r[31:0]),      .clk(lsu_store_c1_r_clk));
+      mcu_rvdff #(1)   dccm_wren_ff       (.*, .din(lsu_stbuf_commit_any),  .dout(dccm_wren_Q),             .clk(lsu_free_c2_clk));   // ECC load errors writing to dccm shouldn't fwd to stores in pipe
+      mcu_rvdffe #(32) dccm_wrdata_ff     (.*, .din(stbuf_data_any[31:0]),  .dout(dccm_wr_data_Q[31:0]),    .en(lsu_stbuf_commit_any | clk_override), .clk(clk));
+      mcu_rvdff #(1)   dccm_wrbyp_dm_loff (.*, .din(dccm_wr_bypass_d_m_lo), .dout(dccm_wr_bypass_d_m_lo_Q), .clk(lsu_free_c2_clk));
+      mcu_rvdff #(1)   dccm_wrbyp_dm_hiff (.*, .din(dccm_wr_bypass_d_m_hi), .dout(dccm_wr_bypass_d_m_hi_Q), .clk(lsu_free_c2_clk));
+      mcu_rvdff #(32)  store_data_rff     (.*, .din(store_data_m[31:0]),    .dout(store_data_r[31:0]),      .clk(lsu_store_c1_r_clk));
 
    end else begin: L2U1_Plus1_0
 
@@ -362,8 +362,8 @@ import mcu_el2_pkg::*;
       end
       assign store_data_r[31:0]      = 32'({store_data_hi_r[31:0],store_data_lo_r[31:0]} >> 8*lsu_addr_r[1:0]) & store_data_mask[31:0];
 
-      rvdffe #(mcu_pt.DCCM_DATA_WIDTH) store_data_hi_rff (.*, .din(store_data_hi_r_in[mcu_pt.DCCM_DATA_WIDTH-1:0]), .dout(store_data_hi_r[mcu_pt.DCCM_DATA_WIDTH-1:0]), .en((ldst_dual_m & lsu_pkt_m.valid & lsu_pkt_m.store) | clk_override), .clk(clk));
-      rvdff  #(mcu_pt.DCCM_DATA_WIDTH) store_data_lo_rff (.*, .din(store_data_lo_r_in[mcu_pt.DCCM_DATA_WIDTH-1:0]), .dout(store_data_lo_r[mcu_pt.DCCM_DATA_WIDTH-1:0]), .clk(lsu_store_c1_r_clk));
+      mcu_rvdffe #(mcu_pt.DCCM_DATA_WIDTH) store_data_hi_rff (.*, .din(store_data_hi_r_in[mcu_pt.DCCM_DATA_WIDTH-1:0]), .dout(store_data_hi_r[mcu_pt.DCCM_DATA_WIDTH-1:0]), .en((ldst_dual_m & lsu_pkt_m.valid & lsu_pkt_m.store) | clk_override), .clk(clk));
+      mcu_rvdff  #(mcu_pt.DCCM_DATA_WIDTH) store_data_lo_rff (.*, .din(store_data_lo_r_in[mcu_pt.DCCM_DATA_WIDTH-1:0]), .dout(store_data_lo_r[mcu_pt.DCCM_DATA_WIDTH-1:0]), .clk(lsu_store_c1_r_clk));
 
    end
 
@@ -387,17 +387,17 @@ import mcu_el2_pkg::*;
    assign picm_rd_data_m[63:0]   = {picm_rd_data[31:0],picm_rd_data[31:0]};
 
    if (mcu_pt.DCCM_ENABLE == 1) begin: Gen_dccm_enable
-      rvdff #(1) dccm_rden_mff (.*, .din(lsu_dccm_rden_d), .dout(lsu_dccm_rden_m), .clk(lsu_c2_m_clk));
-      rvdff #(1) dccm_rden_rff (.*, .din(lsu_dccm_rden_m), .dout(lsu_dccm_rden_r), .clk(lsu_c2_r_clk));
+      mcu_rvdff #(1) dccm_rden_mff (.*, .din(lsu_dccm_rden_d), .dout(lsu_dccm_rden_m), .clk(lsu_c2_m_clk));
+      mcu_rvdff #(1) dccm_rden_rff (.*, .din(lsu_dccm_rden_m), .dout(lsu_dccm_rden_r), .clk(lsu_c2_r_clk));
 
       // ECC correction flops since dccm write happens next cycle
       // We are writing to dccm in r+1 for ecc correction since fast_int needs to be blocked in decode - 1. We can probably write in r for plus0 configuration since we know ecc error in M.
       // In that case these (_ff) flops are needed only in plus1 configuration
-      rvdff #(1) ld_double_ecc_error_rff    (.*, .din(lsu_double_ecc_error_r),   .dout(lsu_double_ecc_error_r_ff),   .clk(lsu_free_c2_clk));
-      rvdff #(1) ld_single_ecc_error_hi_rff (.*, .din(ld_single_ecc_error_hi_r_ns), .dout(ld_single_ecc_error_hi_r_ff), .clk(lsu_free_c2_clk));
-      rvdff #(1) ld_single_ecc_error_lo_rff (.*, .din(ld_single_ecc_error_lo_r_ns), .dout(ld_single_ecc_error_lo_r_ff), .clk(lsu_free_c2_clk));
-      rvdffe #(mcu_pt.DCCM_BITS) ld_sec_addr_hi_rff (.*, .din(end_addr_r[mcu_pt.DCCM_BITS-1:0]), .dout(ld_sec_addr_hi_r_ff[mcu_pt.DCCM_BITS-1:0]), .en(ld_single_ecc_error_r | clk_override), .clk(clk));
-      rvdffe #(mcu_pt.DCCM_BITS) ld_sec_addr_lo_rff (.*, .din(lsu_addr_r[mcu_pt.DCCM_BITS-1:0]), .dout(ld_sec_addr_lo_r_ff[mcu_pt.DCCM_BITS-1:0]), .en(ld_single_ecc_error_r | clk_override), .clk(clk));
+      mcu_rvdff #(1) ld_double_ecc_error_rff    (.*, .din(lsu_double_ecc_error_r),   .dout(lsu_double_ecc_error_r_ff),   .clk(lsu_free_c2_clk));
+      mcu_rvdff #(1) ld_single_ecc_error_hi_rff (.*, .din(ld_single_ecc_error_hi_r_ns), .dout(ld_single_ecc_error_hi_r_ff), .clk(lsu_free_c2_clk));
+      mcu_rvdff #(1) ld_single_ecc_error_lo_rff (.*, .din(ld_single_ecc_error_lo_r_ns), .dout(ld_single_ecc_error_lo_r_ff), .clk(lsu_free_c2_clk));
+      mcu_rvdffe #(mcu_pt.DCCM_BITS) ld_sec_addr_hi_rff (.*, .din(end_addr_r[mcu_pt.DCCM_BITS-1:0]), .dout(ld_sec_addr_hi_r_ff[mcu_pt.DCCM_BITS-1:0]), .en(ld_single_ecc_error_r | clk_override), .clk(clk));
+      mcu_rvdffe #(mcu_pt.DCCM_BITS) ld_sec_addr_lo_rff (.*, .din(lsu_addr_r[mcu_pt.DCCM_BITS-1:0]), .dout(ld_sec_addr_lo_r_ff[mcu_pt.DCCM_BITS-1:0]), .en(ld_single_ecc_error_r | clk_override), .clk(clk));
 
    end else begin: Gen_dccm_disable
       assign lsu_dccm_rden_m = '0;
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_dccm_mem.sv b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_dccm_mem.sv
index e28dd1f..2fbf492 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_dccm_mem.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_dccm_mem.sv
@@ -112,8 +112,8 @@ module mcu_el2_lsu_dccm_mem
    end : mem_bank
 
    // Flops
-   rvdff  #(mcu_pt.DCCM_BANK_BITS) rd_addr_lo_ff (.*, .din(dccm_rd_addr_lo[DCCM_WIDTH_BITS+:mcu_pt.DCCM_BANK_BITS]), .dout(dccm_rd_addr_lo_q[DCCM_WIDTH_BITS+:mcu_pt.DCCM_BANK_BITS]), .clk(active_clk));
-   rvdff  #(mcu_pt.DCCM_BANK_BITS) rd_addr_hi_ff (.*, .din(dccm_rd_addr_hi[DCCM_WIDTH_BITS+:mcu_pt.DCCM_BANK_BITS]), .dout(dccm_rd_addr_hi_q[DCCM_WIDTH_BITS+:mcu_pt.DCCM_BANK_BITS]), .clk(active_clk));
+   mcu_rvdff  #(mcu_pt.DCCM_BANK_BITS) rd_addr_lo_ff (.*, .din(dccm_rd_addr_lo[DCCM_WIDTH_BITS+:mcu_pt.DCCM_BANK_BITS]), .dout(dccm_rd_addr_lo_q[DCCM_WIDTH_BITS+:mcu_pt.DCCM_BANK_BITS]), .clk(active_clk));
+   mcu_rvdff  #(mcu_pt.DCCM_BANK_BITS) rd_addr_hi_ff (.*, .din(dccm_rd_addr_hi[DCCM_WIDTH_BITS+:mcu_pt.DCCM_BANK_BITS]), .dout(dccm_rd_addr_hi_q[DCCM_WIDTH_BITS+:mcu_pt.DCCM_BANK_BITS]), .clk(active_clk));
 
 endmodule // mcu_el2_lsu_dccm_mem
 
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_ecc.sv b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_ecc.sv
index 93e7095..8493cda 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_ecc.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_ecc.sv
@@ -159,12 +159,12 @@ import mcu_el2_pkg::*;
       assign lsu_double_ecc_error_m                      = double_ecc_error_hi_m   | double_ecc_error_lo_m;
 
       // Flops
-      rvdff  #(1) lsu_single_ecc_err_r    (.din(lsu_single_ecc_error_m), .dout(lsu_single_ecc_error_r), .clk(lsu_c2_r_clk), .*);
-      rvdff  #(1) lsu_double_ecc_err_r    (.din(lsu_double_ecc_error_m), .dout(lsu_double_ecc_error_r), .clk(lsu_c2_r_clk), .*);
-      rvdff  #(.WIDTH(1)) ldst_sec_lo_rff (.din(single_ecc_error_lo_any),  .dout(single_ecc_error_lo_r),  .clk(lsu_c2_r_clk), .*);
-      rvdff  #(.WIDTH(1)) ldst_sec_hi_rff (.din(single_ecc_error_hi_any),  .dout(single_ecc_error_hi_r),  .clk(lsu_c2_r_clk), .*);
-      rvdffe #(.WIDTH(mcu_pt.DCCM_DATA_WIDTH)) sec_data_hi_rff (.din(sec_data_hi_m[mcu_pt.DCCM_DATA_WIDTH-1:0]), .dout(sec_data_hi_r[mcu_pt.DCCM_DATA_WIDTH-1:0]), .en(lsu_single_ecc_error_m | clk_override), .*);
-      rvdffe #(.WIDTH(mcu_pt.DCCM_DATA_WIDTH)) sec_data_lo_rff (.din(sec_data_lo_m[mcu_pt.DCCM_DATA_WIDTH-1:0]), .dout(sec_data_lo_r[mcu_pt.DCCM_DATA_WIDTH-1:0]), .en(lsu_single_ecc_error_m | clk_override), .*);
+      mcu_rvdff  #(1) lsu_single_ecc_err_r    (.din(lsu_single_ecc_error_m), .dout(lsu_single_ecc_error_r), .clk(lsu_c2_r_clk), .*);
+      mcu_rvdff  #(1) lsu_double_ecc_err_r    (.din(lsu_double_ecc_error_m), .dout(lsu_double_ecc_error_r), .clk(lsu_c2_r_clk), .*);
+      mcu_rvdff  #(.WIDTH(1)) ldst_sec_lo_rff (.din(single_ecc_error_lo_any),  .dout(single_ecc_error_lo_r),  .clk(lsu_c2_r_clk), .*);
+      mcu_rvdff  #(.WIDTH(1)) ldst_sec_hi_rff (.din(single_ecc_error_hi_any),  .dout(single_ecc_error_hi_r),  .clk(lsu_c2_r_clk), .*);
+      mcu_rvdffe #(.WIDTH(mcu_pt.DCCM_DATA_WIDTH)) sec_data_hi_rff (.din(sec_data_hi_m[mcu_pt.DCCM_DATA_WIDTH-1:0]), .dout(sec_data_hi_r[mcu_pt.DCCM_DATA_WIDTH-1:0]), .en(lsu_single_ecc_error_m | clk_override), .*);
+      mcu_rvdffe #(.WIDTH(mcu_pt.DCCM_DATA_WIDTH)) sec_data_lo_rff (.din(sec_data_lo_m[mcu_pt.DCCM_DATA_WIDTH-1:0]), .dout(sec_data_lo_r[mcu_pt.DCCM_DATA_WIDTH-1:0]), .en(lsu_single_ecc_error_m | clk_override), .*);
 
    end
 
@@ -182,7 +182,7 @@ import mcu_el2_pkg::*;
    if (mcu_pt.DCCM_ENABLE == 1) begin: Gen_dccm_enable
 
       //Detect/Repair for Hi
-      rvecc_decode lsu_ecc_decode_hi (
+      mcu_rvecc_decode lsu_ecc_decode_hi (
          // Inputs
          .en(is_ldst_hi_any),
          .sed_ded (1'b0),    // 1 : means only detection
@@ -197,7 +197,7 @@ import mcu_el2_pkg::*;
       );
 
       //Detect/Repair for Lo
-      rvecc_decode lsu_ecc_decode_lo (
+      mcu_rvecc_decode lsu_ecc_decode_lo (
          // Inputs
          .en(is_ldst_lo_any),
          .sed_ded (1'b0),    // 1 : means only detection
@@ -211,14 +211,14 @@ import mcu_el2_pkg::*;
          .*
       );
 
-      rvecc_encode lsu_ecc_encode_hi (
+      mcu_rvecc_encode lsu_ecc_encode_hi (
          //Inputs
          .din(dccm_wdata_hi_any[mcu_pt.DCCM_DATA_WIDTH-1:0]),
          //Outputs
          .ecc_out(dccm_wdata_ecc_hi_any[mcu_pt.DCCM_ECC_WIDTH-1:0]),
          .*
       );
-      rvecc_encode lsu_ecc_encode_lo (
+      mcu_rvecc_encode lsu_ecc_encode_lo (
          //Inputs
          .din(dccm_wdata_lo_any[mcu_pt.DCCM_DATA_WIDTH-1:0]),
          //Outputs
@@ -234,8 +234,8 @@ import mcu_el2_pkg::*;
       assign double_ecc_error_lo_any = '0;
    end
 
-   rvdffe #(.WIDTH(mcu_pt.DCCM_DATA_WIDTH)) sec_data_hi_rplus1ff (.din(sec_data_hi_r[mcu_pt.DCCM_DATA_WIDTH-1:0]), .dout(sec_data_hi_r_ff[mcu_pt.DCCM_DATA_WIDTH-1:0]), .en(ld_single_ecc_error_r | clk_override), .clk(clk), .*);
-   rvdffe #(.WIDTH(mcu_pt.DCCM_DATA_WIDTH)) sec_data_lo_rplus1ff (.din(sec_data_lo_r[mcu_pt.DCCM_DATA_WIDTH-1:0]), .dout(sec_data_lo_r_ff[mcu_pt.DCCM_DATA_WIDTH-1:0]), .en(ld_single_ecc_error_r | clk_override), .clk(clk), .*);
+   mcu_rvdffe #(.WIDTH(mcu_pt.DCCM_DATA_WIDTH)) sec_data_hi_rplus1ff (.din(sec_data_hi_r[mcu_pt.DCCM_DATA_WIDTH-1:0]), .dout(sec_data_hi_r_ff[mcu_pt.DCCM_DATA_WIDTH-1:0]), .en(ld_single_ecc_error_r | clk_override), .clk(clk), .*);
+   mcu_rvdffe #(.WIDTH(mcu_pt.DCCM_DATA_WIDTH)) sec_data_lo_rplus1ff (.din(sec_data_lo_r[mcu_pt.DCCM_DATA_WIDTH-1:0]), .dout(sec_data_lo_r_ff[mcu_pt.DCCM_DATA_WIDTH-1:0]), .en(ld_single_ecc_error_r | clk_override), .clk(clk), .*);
 
 
 endmodule // mcu_el2_lsu_ecc
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_lsc_ctl.sv b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_lsc_ctl.sv
index aba5b69..0e64cad 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_lsc_ctl.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_lsc_ctl.sv
@@ -156,7 +156,7 @@ import mcu_el2_pkg::*;
    assign rs1_d[31:0] = (lsu_pkt_d.load_ldst_bypass_d) ? lsu_result_m[31:0] : rs1_d_raw[31:0];
 
    // generate the ls address
-   rvlsadder   lsadder  (.rs1(rs1_d[31:0]),
+   mcu_rvlsadder   lsadder  (.rs1(rs1_d[31:0]),
                        .offset(offset_d[11:0]),
                        .dout(full_addr_d[31:0])
                        );
@@ -194,11 +194,11 @@ import mcu_el2_pkg::*;
 
       assign lsu_fir_error[1:0] = fir_nondccm_access_error_r ? 2'b11 : (fir_dccm_access_error_r ? 2'b10 : ((lsu_pkt_r.fast_int & lsu_double_ecc_error_r) ? 2'b01 : 2'b00));
 
-      rvdff #(1) access_fault_rff             (.din(access_fault_m),             .dout(access_fault_r),             .clk(lsu_c1_r_clk), .*);
-      rvdff #(1) misaligned_fault_rff         (.din(misaligned_fault_m),         .dout(misaligned_fault_r),         .clk(lsu_c1_r_clk), .*);
-      rvdff #(4) exc_mscause_rff              (.din(exc_mscause_m[3:0]),         .dout(exc_mscause_r[3:0]),         .clk(lsu_c1_r_clk), .*);
-      rvdff #(1) fir_dccm_access_error_mff    (.din(fir_dccm_access_error_m),    .dout(fir_dccm_access_error_r),    .clk(lsu_c1_r_clk), .*);
-      rvdff #(1) fir_nondccm_access_error_mff (.din(fir_nondccm_access_error_m), .dout(fir_nondccm_access_error_r), .clk(lsu_c1_r_clk), .*);
+      mcu_rvdff #(1) access_fault_rff             (.din(access_fault_m),             .dout(access_fault_r),             .clk(lsu_c1_r_clk), .*);
+      mcu_rvdff #(1) misaligned_fault_rff         (.din(misaligned_fault_m),         .dout(misaligned_fault_r),         .clk(lsu_c1_r_clk), .*);
+      mcu_rvdff #(4) exc_mscause_rff              (.din(exc_mscause_m[3:0]),         .dout(exc_mscause_r[3:0]),         .clk(lsu_c1_r_clk), .*);
+      mcu_rvdff #(1) fir_dccm_access_error_mff    (.din(fir_dccm_access_error_m),    .dout(fir_dccm_access_error_r),    .clk(lsu_c1_r_clk), .*);
+      mcu_rvdff #(1) fir_nondccm_access_error_mff (.din(fir_nondccm_access_error_m), .dout(fir_nondccm_access_error_r), .clk(lsu_c1_r_clk), .*);
 
    end else begin: L2U_Plus1_0
       logic [1:0] lsu_fir_error_m;
@@ -213,10 +213,10 @@ import mcu_el2_pkg::*;
 
       assign lsu_fir_error_m[1:0] = fir_nondccm_access_error_m ? 2'b11 : (fir_dccm_access_error_m ? 2'b10 : ((lsu_pkt_m.fast_int & lsu_double_ecc_error_m) ? 2'b01 : 2'b00));
 
-      rvdff  #(1)                             lsu_exc_valid_rff       (.*, .din(lsu_error_pkt_m.exc_valid),                        .dout(lsu_error_pkt_r.exc_valid),                        .clk(lsu_c2_r_clk));
-      rvdff  #(1)                             lsu_single_ecc_error_rff(.*, .din(lsu_error_pkt_m.single_ecc_error),                 .dout(lsu_error_pkt_r.single_ecc_error),                 .clk(lsu_c2_r_clk));
-      rvdffe #($bits(mcu_el2_lsu_error_pkt_t)-2) lsu_error_pkt_rff       (.*, .din(lsu_error_pkt_m[$bits(mcu_el2_lsu_error_pkt_t)-1:2]), .dout(lsu_error_pkt_r[$bits(mcu_el2_lsu_error_pkt_t)-1:2]), .en(lsu_error_pkt_m.exc_valid | lsu_error_pkt_m.single_ecc_error | clk_override));
-      rvdff #(2)                              lsu_fir_error_rff       (.*, .din(lsu_fir_error_m[1:0]),                             .dout(lsu_fir_error[1:0]),                               .clk(lsu_c2_r_clk));
+      mcu_rvdff  #(1)                             lsu_exc_valid_rff       (.*, .din(lsu_error_pkt_m.exc_valid),                        .dout(lsu_error_pkt_r.exc_valid),                        .clk(lsu_c2_r_clk));
+      mcu_rvdff  #(1)                             lsu_single_ecc_error_rff(.*, .din(lsu_error_pkt_m.single_ecc_error),                 .dout(lsu_error_pkt_r.single_ecc_error),                 .clk(lsu_c2_r_clk));
+      mcu_rvdffe #($bits(mcu_el2_lsu_error_pkt_t)-2) lsu_error_pkt_rff       (.*, .din(lsu_error_pkt_m[$bits(mcu_el2_lsu_error_pkt_t)-1:2]), .dout(lsu_error_pkt_r[$bits(mcu_el2_lsu_error_pkt_t)-1:2]), .en(lsu_error_pkt_m.exc_valid | lsu_error_pkt_m.single_ecc_error | clk_override));
+      mcu_rvdff #(2)                              lsu_fir_error_rff       (.*, .din(lsu_fir_error_m[1:0]),                             .dout(lsu_fir_error[1:0]),                               .clk(lsu_c2_r_clk));
    end
 
    //Create DMA packet
@@ -243,11 +243,11 @@ import mcu_el2_pkg::*;
    end
 
    // C2 clock for valid and C1 for other bits of packet
-   rvdff #(1) lsu_pkt_vldmff (.*, .din(lsu_pkt_m_in.valid), .dout(lsu_pkt_m.valid), .clk(lsu_c2_m_clk));
-   rvdff #(1) lsu_pkt_vldrff (.*, .din(lsu_pkt_r_in.valid), .dout(lsu_pkt_r.valid), .clk(lsu_c2_r_clk));
+   mcu_rvdff #(1) lsu_pkt_vldmff (.*, .din(lsu_pkt_m_in.valid), .dout(lsu_pkt_m.valid), .clk(lsu_c2_m_clk));
+   mcu_rvdff #(1) lsu_pkt_vldrff (.*, .din(lsu_pkt_r_in.valid), .dout(lsu_pkt_r.valid), .clk(lsu_c2_r_clk));
 
-   rvdff #($bits(mcu_el2_lsu_pkt_t)-1) lsu_pkt_mff (.*, .din(lsu_pkt_m_in[$bits(mcu_el2_lsu_pkt_t)-1:1]), .dout(lsu_pkt_m[$bits(mcu_el2_lsu_pkt_t)-1:1]), .clk(lsu_c1_m_clk));
-   rvdff #($bits(mcu_el2_lsu_pkt_t)-1) lsu_pkt_rff (.*, .din(lsu_pkt_r_in[$bits(mcu_el2_lsu_pkt_t)-1:1]), .dout(lsu_pkt_r[$bits(mcu_el2_lsu_pkt_t)-1:1]), .clk(lsu_c1_r_clk));
+   mcu_rvdff #($bits(mcu_el2_lsu_pkt_t)-1) lsu_pkt_mff (.*, .din(lsu_pkt_m_in[$bits(mcu_el2_lsu_pkt_t)-1:1]), .dout(lsu_pkt_m[$bits(mcu_el2_lsu_pkt_t)-1:1]), .clk(lsu_c1_m_clk));
+   mcu_rvdff #($bits(mcu_el2_lsu_pkt_t)-1) lsu_pkt_rff (.*, .din(lsu_pkt_r_in[$bits(mcu_el2_lsu_pkt_t)-1:1]), .dout(lsu_pkt_r[$bits(mcu_el2_lsu_pkt_t)-1:1]), .clk(lsu_c1_r_clk));
 
 
 
@@ -309,36 +309,36 @@ import mcu_el2_pkg::*;
    assign store_data_m[31:0] = (picm_mask_data_m[31:0] | {32{~addr_in_pic_m}}) & ((lsu_pkt_m.store_data_bypass_m) ? lsu_result_m[31:0] : store_data_pre_m[31:0]);
 
 
-   rvdff #(32)  sdmff (.*, .din(store_data_m_in[31:0]), .dout(store_data_pre_m[31:0]),                       .clk(lsu_store_c1_m_clk));
+   mcu_rvdff #(32)  sdmff (.*, .din(store_data_m_in[31:0]), .dout(store_data_pre_m[31:0]),                       .clk(lsu_store_c1_m_clk));
 
-   rvdff #(32) samff (.*, .din(lsu_addr_d[31:0]), .dout(lsu_addr_m[31:0]), .clk(lsu_c1_m_clk));
-   rvdff #(32) sarff (.*, .din(lsu_addr_m[31:0]), .dout(lsu_addr_r[31:0]), .clk(lsu_c1_r_clk));
+   mcu_rvdff #(32) samff (.*, .din(lsu_addr_d[31:0]), .dout(lsu_addr_m[31:0]), .clk(lsu_c1_m_clk));
+   mcu_rvdff #(32) sarff (.*, .din(lsu_addr_m[31:0]), .dout(lsu_addr_r[31:0]), .clk(lsu_c1_r_clk));
 
    assign end_addr_m[31:3] = ldst_dual_m ? end_addr_pre_m[31:3] : lsu_addr_m[31:3];       // This is for power saving
    assign end_addr_r[31:3] = ldst_dual_r ? end_addr_pre_r[31:3] : lsu_addr_r[31:3];       // This is for power saving
 
-   rvdffe #(29) end_addr_hi_mff (.*, .din(end_addr_d[31:3]), .dout(end_addr_pre_m[31:3]), .en((lsu_pkt_d.valid & ldst_dual_d) | clk_override));
-   rvdffe #(29) end_addr_hi_rff (.*, .din(end_addr_m[31:3]), .dout(end_addr_pre_r[31:3]), .en((lsu_pkt_m.valid & ldst_dual_m) | clk_override));
+   mcu_rvdffe #(29) end_addr_hi_mff (.*, .din(end_addr_d[31:3]), .dout(end_addr_pre_m[31:3]), .en((lsu_pkt_d.valid & ldst_dual_d) | clk_override));
+   mcu_rvdffe #(29) end_addr_hi_rff (.*, .din(end_addr_m[31:3]), .dout(end_addr_pre_r[31:3]), .en((lsu_pkt_m.valid & ldst_dual_m) | clk_override));
 
-   rvdff #(3)  end_addr_lo_mff (.*, .din(end_addr_d[2:0]), .dout(end_addr_m[2:0]), .clk(lsu_c1_m_clk));
-   rvdff #(3)  end_addr_lo_rff (.*, .din(end_addr_m[2:0]), .dout(end_addr_r[2:0]), .clk(lsu_c1_r_clk));
+   mcu_rvdff #(3)  end_addr_lo_mff (.*, .din(end_addr_d[2:0]), .dout(end_addr_m[2:0]), .clk(lsu_c1_m_clk));
+   mcu_rvdff #(3)  end_addr_lo_rff (.*, .din(end_addr_m[2:0]), .dout(end_addr_r[2:0]), .clk(lsu_c1_r_clk));
 
-   rvdff #(1) addr_in_dccm_mff(.din(addr_in_dccm_d), .dout(addr_in_dccm_m), .clk(lsu_c1_m_clk), .*);
-   rvdff #(1) addr_in_dccm_rff(.din(addr_in_dccm_m), .dout(addr_in_dccm_r), .clk(lsu_c1_r_clk), .*);
+   mcu_rvdff #(1) addr_in_dccm_mff(.din(addr_in_dccm_d), .dout(addr_in_dccm_m), .clk(lsu_c1_m_clk), .*);
+   mcu_rvdff #(1) addr_in_dccm_rff(.din(addr_in_dccm_m), .dout(addr_in_dccm_r), .clk(lsu_c1_r_clk), .*);
 
-   rvdff #(1) addr_in_pic_mff(.din(addr_in_pic_d), .dout(addr_in_pic_m), .clk(lsu_c1_m_clk), .*);
-   rvdff #(1) addr_in_pic_rff(.din(addr_in_pic_m), .dout(addr_in_pic_r), .clk(lsu_c1_r_clk), .*);
+   mcu_rvdff #(1) addr_in_pic_mff(.din(addr_in_pic_d), .dout(addr_in_pic_m), .clk(lsu_c1_m_clk), .*);
+   mcu_rvdff #(1) addr_in_pic_rff(.din(addr_in_pic_m), .dout(addr_in_pic_r), .clk(lsu_c1_r_clk), .*);
 
-   rvdff #(1) addr_external_mff(.din(addr_external_d), .dout(addr_external_m), .clk(lsu_c1_m_clk), .*);
-   rvdff #(1) addr_external_rff(.din(addr_external_m), .dout(addr_external_r), .clk(lsu_c1_r_clk), .*);
+   mcu_rvdff #(1) addr_external_mff(.din(addr_external_d), .dout(addr_external_m), .clk(lsu_c1_m_clk), .*);
+   mcu_rvdff #(1) addr_external_rff(.din(addr_external_m), .dout(addr_external_r), .clk(lsu_c1_r_clk), .*);
 
-   rvdff #(1) access_fault_mff     (.din(access_fault_d),     .dout(access_fault_m),     .clk(lsu_c1_m_clk), .*);
-   rvdff #(1) misaligned_fault_mff (.din(misaligned_fault_d), .dout(misaligned_fault_m), .clk(lsu_c1_m_clk), .*);
-   rvdff #(4) exc_mscause_mff      (.din(exc_mscause_d[3:0]), .dout(exc_mscause_m[3:0]), .clk(lsu_c1_m_clk), .*);
+   mcu_rvdff #(1) access_fault_mff     (.din(access_fault_d),     .dout(access_fault_m),     .clk(lsu_c1_m_clk), .*);
+   mcu_rvdff #(1) misaligned_fault_mff (.din(misaligned_fault_d), .dout(misaligned_fault_m), .clk(lsu_c1_m_clk), .*);
+   mcu_rvdff #(4) exc_mscause_mff      (.din(exc_mscause_d[3:0]), .dout(exc_mscause_m[3:0]), .clk(lsu_c1_m_clk), .*);
 
-   rvdff #(1) fir_dccm_access_error_mff    (.din(fir_dccm_access_error_d),    .dout(fir_dccm_access_error_m),    .clk(lsu_c1_m_clk), .*);
-   rvdff #(1) fir_nondccm_access_error_mff (.din(fir_nondccm_access_error_d), .dout(fir_nondccm_access_error_m), .clk(lsu_c1_m_clk), .*);
+   mcu_rvdff #(1) fir_dccm_access_error_mff    (.din(fir_dccm_access_error_d),    .dout(fir_dccm_access_error_m),    .clk(lsu_c1_m_clk), .*);
+   mcu_rvdff #(1) fir_nondccm_access_error_mff (.din(fir_nondccm_access_error_d), .dout(fir_nondccm_access_error_m), .clk(lsu_c1_m_clk), .*);
 
-   rvdffe #(32) bus_read_data_r_ff (.*, .din(bus_read_data_m[31:0]), .dout(bus_read_data_r[31:0]), .en(addr_external_m | clk_override));
+   mcu_rvdffe #(32) bus_read_data_r_ff (.*, .din(bus_read_data_m[31:0]), .dout(bus_read_data_r[31:0]), .en(addr_external_m | clk_override));
 
 endmodule
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_stbuf.sv b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_stbuf.sv
index fa73a54..c242a33 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_stbuf.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_stbuf.sv
@@ -204,11 +204,11 @@ import mcu_el2_pkg::*;
          assign stbuf_datain[i][31:24]            = sel_lo[i] ? ((~stbuf_byteen[i][3] | store_byteen_lo_r[3]) ? store_datafn_lo_r[31:24] : stbuf_data[i][31:24])    :
                                                                 ((~stbuf_byteen[i][3] | store_byteen_hi_r[3]) ? store_datafn_hi_r[31:24] : stbuf_data[i][31:24]);
 
-         rvdffsc #(.WIDTH(1))              stbuf_vldff         (.din(1'b1),                                .dout(stbuf_vld[i]),                      .en(stbuf_wr_en[i]), .clear(stbuf_reset[i]), .clk(lsu_free_c2_clk), .*);
-         rvdffsc #(.WIDTH(1))              stbuf_killff        (.din(1'b1),                                .dout(stbuf_dma_kill[i]),                 .en(stbuf_dma_kill_en[i]), .clear(stbuf_reset[i]), .clk(lsu_free_c2_clk), .*);
-         rvdffe  #(.WIDTH(mcu_pt.LSU_SB_BITS)) stbuf_addrff        (.din(stbuf_addrin[i][mcu_pt.LSU_SB_BITS-1:0]), .dout(stbuf_addr[i][mcu_pt.LSU_SB_BITS-1:0]), .en(stbuf_wr_en[i]), .*);
-         rvdffsc #(.WIDTH(BYTE_WIDTH))     stbuf_byteenff      (.din(stbuf_byteenin[i][BYTE_WIDTH-1:0]),   .dout(stbuf_byteen[i][BYTE_WIDTH-1:0]),   .en(stbuf_wr_en[i]), .clear(stbuf_reset[i]), .clk(lsu_stbuf_c1_clk), .*);
-         rvdffe  #(.WIDTH(DATA_WIDTH))     stbuf_dataff        (.din(stbuf_datain[i][DATA_WIDTH-1:0]),     .dout(stbuf_data[i][DATA_WIDTH-1:0]),     .en(stbuf_wr_en[i]), .*);
+         mcu_rvdffsc #(.WIDTH(1))              stbuf_vldff         (.din(1'b1),                                .dout(stbuf_vld[i]),                      .en(stbuf_wr_en[i]), .clear(stbuf_reset[i]), .clk(lsu_free_c2_clk), .*);
+         mcu_rvdffsc #(.WIDTH(1))              stbuf_killff        (.din(1'b1),                                .dout(stbuf_dma_kill[i]),                 .en(stbuf_dma_kill_en[i]), .clear(stbuf_reset[i]), .clk(lsu_free_c2_clk), .*);
+         mcu_rvdffe  #(.WIDTH(mcu_pt.LSU_SB_BITS)) stbuf_addrff        (.din(stbuf_addrin[i][mcu_pt.LSU_SB_BITS-1:0]), .dout(stbuf_addr[i][mcu_pt.LSU_SB_BITS-1:0]), .en(stbuf_wr_en[i]), .*);
+         mcu_rvdffsc #(.WIDTH(BYTE_WIDTH))     stbuf_byteenff      (.din(stbuf_byteenin[i][BYTE_WIDTH-1:0]),   .dout(stbuf_byteen[i][BYTE_WIDTH-1:0]),   .en(stbuf_wr_en[i]), .clear(stbuf_reset[i]), .clk(lsu_stbuf_c1_clk), .*);
+         mcu_rvdffe  #(.WIDTH(DATA_WIDTH))     stbuf_dataff        (.din(stbuf_datain[i][DATA_WIDTH-1:0]),     .dout(stbuf_data[i][DATA_WIDTH-1:0]),     .en(stbuf_wr_en[i]), .*);
       end
    end else begin: Gen_dccm_disable
       assign stbuf_wr_en[DEPTH-1:0] = '0;
@@ -333,8 +333,8 @@ import mcu_el2_pkg::*;
    end
 
    // Flops
-   rvdffs #(.WIDTH(DEPTH_LOG2)) WrPtrff (.din(NxtWrPtr[DEPTH_LOG2-1:0]), .dout(WrPtr[DEPTH_LOG2-1:0]), .en(WrPtrEn), .clk(lsu_stbuf_c1_clk), .*);
-   rvdffs #(.WIDTH(DEPTH_LOG2)) RdPtrff (.din(NxtRdPtr[DEPTH_LOG2-1:0]), .dout(RdPtr[DEPTH_LOG2-1:0]), .en(RdPtrEn), .clk(lsu_stbuf_c1_clk), .*);
+   mcu_rvdffs #(.WIDTH(DEPTH_LOG2)) WrPtrff (.din(NxtWrPtr[DEPTH_LOG2-1:0]), .dout(WrPtr[DEPTH_LOG2-1:0]), .en(WrPtrEn), .clk(lsu_stbuf_c1_clk), .*);
+   mcu_rvdffs #(.WIDTH(DEPTH_LOG2)) RdPtrff (.din(NxtRdPtr[DEPTH_LOG2-1:0]), .dout(RdPtr[DEPTH_LOG2-1:0]), .en(RdPtrEn), .clk(lsu_stbuf_c1_clk), .*);
 
 `ifdef MCU_RV_ASSERT_ON
 
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_trigger.sv b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_trigger.sv
index 25031b0..ca7c408 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_trigger.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/lsu/mcu_el2_lsu_trigger.sv
@@ -57,7 +57,7 @@ import mcu_el2_pkg::*;
       assign lsu_match_data[i][31:0] = ({32{~trigger_pkt_any[i].select}} & ldst_addr_trigger_m[31:0]) |
                                        ({32{trigger_pkt_any[i].select & trigger_pkt_any[i].store}} & store_data_trigger_m[31:0]);
 
-      rvmaskandmatch trigger_match (.mask(trigger_pkt_any[i].tdata2[31:0]), .data(lsu_match_data[i][31:0]), .masken(trigger_pkt_any[i].match), .match(lsu_trigger_data_match[i]));
+      mcu_rvmaskandmatch trigger_match (.mask(trigger_pkt_any[i].tdata2[31:0]), .data(lsu_match_data[i][31:0]), .masken(trigger_pkt_any[i].match), .match(lsu_trigger_data_match[i]));
 
       assign lsu_trigger_match_m[i] = lsu_pkt_m.valid & ~lsu_pkt_m.dma & trigger_enable &
                                         ((trigger_pkt_any[i].store & lsu_pkt_m.store) | (trigger_pkt_any[i].load & lsu_pkt_m.load & ~trigger_pkt_any[i].select)) &
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/mcu_common_defines.vh b/src/riscv_core/veer_el2/rtl/rev1p0/mcu_common_defines.vh
index 4bb3880..1248bd7 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/mcu_common_defines.vh
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/mcu_common_defines.vh
@@ -65,7 +65,7 @@
 `define MCU_RV_DCCM_BANK_BITS 2
 `define MCU_RV_DCCM_BITS 14
 `define MCU_RV_DCCM_BYTE_WIDTH 4
-`define MCU_RV_DCCM_DATA_CELL ram_1024x39
+`define MCU_RV_DCCM_DATA_CELL mcu_ram_1024x39
 `define MCU_RV_DCCM_DATA_WIDTH 32
 `define MCU_RV_DCCM_EADR 32'h50003fff
 `define MCU_RV_DCCM_ECC_WIDTH 7
@@ -92,7 +92,7 @@
 `define MCU_RV_ICACHE_BEAT_ADDR_HI 5
 `define MCU_RV_ICACHE_BEAT_BITS 3
 `define MCU_RV_ICACHE_BYPASS_ENABLE 1
-`define MCU_RV_ICACHE_DATA_CELL ram_512x71
+`define MCU_RV_ICACHE_DATA_CELL mcu_ram_512x71
 `define MCU_RV_ICACHE_DATA_DEPTH 512
 `define MCU_RV_ICACHE_DATA_INDEX_LO 4
 `define MCU_RV_ICACHE_DATA_WIDTH 64
@@ -112,7 +112,7 @@
 `define MCU_RV_ICACHE_SIZE 16
 `define MCU_RV_ICACHE_STATUS_BITS 1
 `define MCU_RV_ICACHE_TAG_BYPASS_ENABLE 1
-`define MCU_RV_ICACHE_TAG_CELL ram_128x25
+`define MCU_RV_ICACHE_TAG_CELL mcu_ram_128x25
 `define MCU_RV_ICACHE_TAG_DEPTH 128
 `define MCU_RV_ICACHE_TAG_INDEX_LO 6
 `define MCU_RV_ICACHE_TAG_LO 13
@@ -123,7 +123,7 @@
 `define MCU_RV_ICCM_BANK_HI 3
 `define MCU_RV_ICCM_BANK_INDEX_LO 4
 `define MCU_RV_ICCM_BITS 17
-`define MCU_RV_ICCM_DATA_CELL ram_8192x39
+`define MCU_RV_ICCM_DATA_CELL mcu_ram_8192x39
 `define MCU_RV_ICCM_EADR 32'h4001ffff
 `define MCU_RV_ICCM_ECC_WIDTH 7
 `define MCU_RV_ICCM_INDEX_BITS 13
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/mcu_el2_dma_ctrl.sv b/src/riscv_core/veer_el2/rtl/rev1p0/mcu_el2_dma_ctrl.sv
index 4f8063e..af24ab7 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/mcu_el2_dma_ctrl.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/mcu_el2_dma_ctrl.sv
@@ -261,22 +261,22 @@ import mcu_el2_pkg::*;
                                                         ((dccm_dma_rvalid & (i == DEPTH_PTR'(dccm_dma_rtag[2:0])))  ? dccm_dma_rdata[63:0] : (iccm_dma_rvalid & (i == DEPTH_PTR'(iccm_dma_rtag[2:0]))) ? iccm_dma_rdata[63:0] :
                                                                                                                                                        (dbg_cmd_valid ? {2{dma_dbg_mem_wrdata[31:0]}} : bus_cmd_wdata[63:0]));
 
-      rvdffsc #(1) fifo_valid_dff (.din(1'b1), .dout(fifo_valid[i]), .en(fifo_cmd_en[i]), .clear(fifo_reset[i]), .clk(dma_free_clk), .*);
-      rvdffsc #(2) fifo_error_dff (.din(fifo_error_in[i]), .dout(fifo_error[i]), .en(fifo_error_en[i]), .clear(fifo_reset[i]), .clk(dma_free_clk), .*);
-      rvdffsc #(1) fifo_error_bus_dff (.din(1'b1), .dout(fifo_error_bus[i]), .en(fifo_error_bus_en[i]), .clear(fifo_reset[i]), .clk(dma_free_clk), .*);
-      rvdffsc #(1) fifo_rpend_dff (.din(1'b1), .dout(fifo_rpend[i]), .en(fifo_pend_en[i]), .clear(fifo_reset[i]), .clk(dma_free_clk), .*);
-      rvdffsc #(1) fifo_done_dff (.din(1'b1), .dout(fifo_done[i]), .en(fifo_done_en[i]), .clear(fifo_reset[i]), .clk(dma_free_clk), .*);
-      rvdffsc #(1) fifo_done_bus_dff (.din(1'b1), .dout(fifo_done_bus[i]), .en(fifo_done_bus_en[i]), .clear(fifo_reset[i]), .clk(dma_free_clk), .*);
-      rvdffe  #(32) fifo_addr_dff (.din(fifo_addr_in[31:0]), .dout(fifo_addr[i]), .en(fifo_cmd_en[i]), .*);
-      rvdffs  #(3) fifo_sz_dff (.din(fifo_sz_in[2:0]), .dout(fifo_sz[i]), .en(fifo_cmd_en[i]), .clk(dma_buffer_c1_clk), .*);
-      rvdffs  #(8) fifo_byteen_dff (.din(fifo_byteen_in[7:0]), .dout(fifo_byteen[i]), .en(fifo_cmd_en[i]), .clk(dma_buffer_c1_clk), .*);
-      rvdffs  #(1) fifo_write_dff (.din(fifo_write_in), .dout(fifo_write[i]), .en(fifo_cmd_en[i]), .clk(dma_buffer_c1_clk), .*);
-      rvdffs  #(1) fifo_posted_write_dff (.din(fifo_posted_write_in), .dout(fifo_posted_write[i]), .en(fifo_cmd_en[i]), .clk(dma_buffer_c1_clk), .*);
-      rvdffs  #(1) fifo_dbg_dff (.din(fifo_dbg_in), .dout(fifo_dbg[i]), .en(fifo_cmd_en[i]), .clk(dma_buffer_c1_clk), .*);
-      rvdffe  #(64) fifo_data_dff (.din(fifo_data_in[i]), .dout(fifo_data[i]), .en(fifo_data_en[i]), .*);
-      rvdffs  #(mcu_pt.DMA_BUS_TAG) fifo_tag_dff(.din(bus_cmd_tag[mcu_pt.DMA_BUS_TAG-1:0]), .dout(fifo_tag[i][mcu_pt.DMA_BUS_TAG-1:0]), .en(fifo_cmd_en[i]), .clk(dma_buffer_c1_clk), .*);
-      rvdffs  #(mcu_pt.DMA_BUS_ID) fifo_mid_dff(.din(bus_cmd_mid[mcu_pt.DMA_BUS_ID-1:0]), .dout(fifo_mid[i][mcu_pt.DMA_BUS_ID-1:0]), .en(fifo_cmd_en[i]), .clk(dma_buffer_c1_clk), .*);
-      rvdffs  #(mcu_pt.DMA_BUS_PRTY) fifo_prty_dff(.din(bus_cmd_prty[mcu_pt.DMA_BUS_PRTY-1:0]), .dout(fifo_prty[i][mcu_pt.DMA_BUS_PRTY-1:0]), .en(fifo_cmd_en[i]), .clk(dma_buffer_c1_clk), .*);
+      mcu_rvdffsc #(1) fifo_valid_dff (.din(1'b1), .dout(fifo_valid[i]), .en(fifo_cmd_en[i]), .clear(fifo_reset[i]), .clk(dma_free_clk), .*);
+      mcu_rvdffsc #(2) fifo_error_dff (.din(fifo_error_in[i]), .dout(fifo_error[i]), .en(fifo_error_en[i]), .clear(fifo_reset[i]), .clk(dma_free_clk), .*);
+      mcu_rvdffsc #(1) fifo_error_bus_dff (.din(1'b1), .dout(fifo_error_bus[i]), .en(fifo_error_bus_en[i]), .clear(fifo_reset[i]), .clk(dma_free_clk), .*);
+      mcu_rvdffsc #(1) fifo_rpend_dff (.din(1'b1), .dout(fifo_rpend[i]), .en(fifo_pend_en[i]), .clear(fifo_reset[i]), .clk(dma_free_clk), .*);
+      mcu_rvdffsc #(1) fifo_done_dff (.din(1'b1), .dout(fifo_done[i]), .en(fifo_done_en[i]), .clear(fifo_reset[i]), .clk(dma_free_clk), .*);
+      mcu_rvdffsc #(1) fifo_done_bus_dff (.din(1'b1), .dout(fifo_done_bus[i]), .en(fifo_done_bus_en[i]), .clear(fifo_reset[i]), .clk(dma_free_clk), .*);
+      mcu_rvdffe  #(32) fifo_addr_dff (.din(fifo_addr_in[31:0]), .dout(fifo_addr[i]), .en(fifo_cmd_en[i]), .*);
+      mcu_rvdffs  #(3) fifo_sz_dff (.din(fifo_sz_in[2:0]), .dout(fifo_sz[i]), .en(fifo_cmd_en[i]), .clk(dma_buffer_c1_clk), .*);
+      mcu_rvdffs  #(8) fifo_byteen_dff (.din(fifo_byteen_in[7:0]), .dout(fifo_byteen[i]), .en(fifo_cmd_en[i]), .clk(dma_buffer_c1_clk), .*);
+      mcu_rvdffs  #(1) fifo_write_dff (.din(fifo_write_in), .dout(fifo_write[i]), .en(fifo_cmd_en[i]), .clk(dma_buffer_c1_clk), .*);
+      mcu_rvdffs  #(1) fifo_posted_write_dff (.din(fifo_posted_write_in), .dout(fifo_posted_write[i]), .en(fifo_cmd_en[i]), .clk(dma_buffer_c1_clk), .*);
+      mcu_rvdffs  #(1) fifo_dbg_dff (.din(fifo_dbg_in), .dout(fifo_dbg[i]), .en(fifo_cmd_en[i]), .clk(dma_buffer_c1_clk), .*);
+      mcu_rvdffe  #(64) fifo_data_dff (.din(fifo_data_in[i]), .dout(fifo_data[i]), .en(fifo_data_en[i]), .*);
+      mcu_rvdffs  #(mcu_pt.DMA_BUS_TAG) fifo_tag_dff(.din(bus_cmd_tag[mcu_pt.DMA_BUS_TAG-1:0]), .dout(fifo_tag[i][mcu_pt.DMA_BUS_TAG-1:0]), .en(fifo_cmd_en[i]), .clk(dma_buffer_c1_clk), .*);
+      mcu_rvdffs  #(mcu_pt.DMA_BUS_ID) fifo_mid_dff(.din(bus_cmd_mid[mcu_pt.DMA_BUS_ID-1:0]), .dout(fifo_mid[i][mcu_pt.DMA_BUS_ID-1:0]), .en(fifo_cmd_en[i]), .clk(dma_buffer_c1_clk), .*);
+      mcu_rvdffs  #(mcu_pt.DMA_BUS_PRTY) fifo_prty_dff(.din(bus_cmd_prty[mcu_pt.DMA_BUS_PRTY-1:0]), .dout(fifo_prty[i][mcu_pt.DMA_BUS_PRTY-1:0]), .en(fifo_cmd_en[i]), .clk(dma_buffer_c1_clk), .*);
    end
 
    // Pointer logic
@@ -288,9 +288,9 @@ import mcu_el2_pkg::*;
    assign RdPtrEn = dma_dccm_req | dma_iccm_req | (dma_address_error | dma_alignment_error | dma_dbg_cmd_error);
    assign RspPtrEn = (dma_dbg_cmd_done | (bus_rsp_sent | bus_posted_write_done) & dma_bus_clk_en);
 
-   rvdffs #(DEPTH_PTR) WrPtr_dff(.din(NxtWrPtr[DEPTH_PTR-1:0]), .dout(WrPtr[DEPTH_PTR-1:0]), .en(WrPtrEn), .clk(dma_free_clk), .*);
-   rvdffs #(DEPTH_PTR) RdPtr_dff(.din(NxtRdPtr[DEPTH_PTR-1:0]), .dout(RdPtr[DEPTH_PTR-1:0]), .en(RdPtrEn), .clk(dma_free_clk), .*);
-   rvdffs #(DEPTH_PTR) RspPtr_dff(.din(NxtRspPtr[DEPTH_PTR-1:0]), .dout(RspPtr[DEPTH_PTR-1:0]), .en(RspPtrEn), .clk(dma_free_clk), .*);
+   mcu_rvdffs #(DEPTH_PTR) WrPtr_dff(.din(NxtWrPtr[DEPTH_PTR-1:0]), .dout(WrPtr[DEPTH_PTR-1:0]), .en(WrPtrEn), .clk(dma_free_clk), .*);
+   mcu_rvdffs #(DEPTH_PTR) RdPtr_dff(.din(NxtRdPtr[DEPTH_PTR-1:0]), .dout(RdPtr[DEPTH_PTR-1:0]), .en(RdPtrEn), .clk(dma_free_clk), .*);
+   mcu_rvdffs #(DEPTH_PTR) RspPtr_dff(.din(NxtRspPtr[DEPTH_PTR-1:0]), .dout(RspPtr[DEPTH_PTR-1:0]), .en(RspPtrEn), .clk(dma_free_clk), .*);
 
    // Miscellaneous signals
    assign fifo_full = fifo_full_spec_bus;
@@ -350,7 +350,7 @@ import mcu_el2_pkg::*;
    assign dma_nack_count_d[2:0] = (dma_nack_count[2:0] >= dma_nack_count_csr[2:0]) ? ({3{~(dma_dccm_req | dma_iccm_req)}} & dma_nack_count[2:0]) :
                                                                                     (dma_mem_req & ~(dma_dccm_req | dma_iccm_req)) ? (dma_nack_count[2:0] + 1'b1) : 3'b0;
 
-   rvdffs #(3) nack_count_dff(.din(dma_nack_count_d[2:0]), .dout(dma_nack_count[2:0]), .en(dma_mem_req), .clk(dma_free_clk), .*);
+   mcu_rvdffs #(3) nack_count_dff(.din(dma_nack_count_d[2:0]), .dout(dma_nack_count[2:0]), .en(dma_mem_req), .clk(dma_free_clk), .*);
 
    // Core outputs
    assign dma_mem_req         = fifo_valid[RdPtr] & ~fifo_rpend[RdPtr] & ~fifo_done[RdPtr] & ~(dma_address_error | dma_alignment_error | dma_dbg_cmd_error);
@@ -373,7 +373,7 @@ import mcu_el2_pkg::*;
 
    // Address check  dccm
    if (mcu_pt.DCCM_ENABLE) begin: Gen_dccm_enable
-      rvrangecheck #(.CCM_SADR(mcu_pt.DCCM_SADR),
+      mcu_rvrangecheck #(.CCM_SADR(mcu_pt.DCCM_SADR),
                      .CCM_SIZE(mcu_pt.DCCM_SIZE)) addr_dccm_rangecheck (
          .addr(dma_mem_addr_int[31:0]),
          .in_range(dma_mem_addr_in_dccm),
@@ -386,7 +386,7 @@ import mcu_el2_pkg::*;
 
    // Address check  iccm
    if (mcu_pt.ICCM_ENABLE) begin: Gen_iccm_enable
-      rvrangecheck #(.CCM_SADR(mcu_pt.ICCM_SADR),
+      mcu_rvrangecheck #(.CCM_SADR(mcu_pt.ICCM_SADR),
                      .CCM_SIZE(mcu_pt.ICCM_SIZE)) addr_iccm_rangecheck (
          .addr(dma_mem_addr_int[31:0]),
          .in_range(dma_mem_addr_in_iccm),
@@ -399,7 +399,7 @@ import mcu_el2_pkg::*;
 
 
    // PIC memory address check
-   rvrangecheck #(.CCM_SADR(mcu_pt.PIC_BASE_ADDR),
+   mcu_rvrangecheck #(.CCM_SADR(mcu_pt.PIC_BASE_ADDR),
                   .CCM_SIZE(mcu_pt.PIC_SIZE)) addr_pic_rangecheck (
       .addr(dma_mem_addr_int[31:0]),
       .in_range(dma_mem_addr_in_pic),
@@ -407,16 +407,16 @@ import mcu_el2_pkg::*;
     );
 
    // Inputs
-   rvdff_fpga #(1) fifo_full_bus_ff     (.din(fifo_full_spec),   .dout(fifo_full_spec_bus), .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
-   rvdff_fpga #(1) dbg_dma_bubble_ff    (.din(dbg_dma_bubble),   .dout(dbg_dma_bubble_bus), .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
-   rvdff      #(1) dma_dbg_cmd_doneff   (.din(dma_dbg_cmd_done), .dout(dma_dbg_cmd_done_q), .clk(free_clk), .*);
+   mcu_rvdff_fpga #(1) fifo_full_bus_ff     (.din(fifo_full_spec),   .dout(fifo_full_spec_bus), .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdff_fpga #(1) dbg_dma_bubble_ff    (.din(dbg_dma_bubble),   .dout(dbg_dma_bubble_bus), .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdff      #(1) dma_dbg_cmd_doneff   (.din(dma_dbg_cmd_done), .dout(dma_dbg_cmd_done_q), .clk(free_clk), .*);
 
    // Clock Gating logic
    assign dma_buffer_c1_clken = (bus_cmd_valid & dma_bus_clk_en) | dbg_cmd_valid | clk_override;
    assign dma_free_clken = (bus_cmd_valid | bus_rsp_valid | dbg_cmd_valid | dma_dbg_cmd_done | dma_dbg_cmd_done_q | (|fifo_valid[DEPTH-1:0]) | clk_override);
 
-   rvoclkhdr dma_buffer_c1cgc ( .en(dma_buffer_c1_clken), .l1clk(dma_buffer_c1_clk), .* );
-   rvoclkhdr dma_free_cgc (.en(dma_free_clken), .l1clk(dma_free_clk), .*);
+   mcu_rvoclkhdr dma_buffer_c1cgc ( .en(dma_buffer_c1_clken), .l1clk(dma_buffer_c1_clk), .* );
+   mcu_rvoclkhdr dma_free_cgc (.en(dma_free_clken), .l1clk(dma_free_clk), .*);
 
 `ifdef MCU_RV_FPGA_OPTIMIZE
    assign dma_bus_clk = 1'b0;
@@ -431,23 +431,23 @@ import mcu_el2_pkg::*;
    assign wrbuf_rst      = wrbuf_cmd_sent & ~wrbuf_en;
    assign wrbuf_data_rst = wrbuf_cmd_sent & ~wrbuf_data_en;
 
-   rvdffsc_fpga  #(.WIDTH(1))              wrbuf_vldff       (.din(1'b1), .dout(wrbuf_vld),      .en(wrbuf_en),      .clear(wrbuf_rst),      .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
-   rvdffsc_fpga  #(.WIDTH(1))              wrbuf_data_vldff  (.din(1'b1), .dout(wrbuf_data_vld), .en(wrbuf_data_en), .clear(wrbuf_data_rst), .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
-   rvdffs_fpga   #(.WIDTH(mcu_pt.DMA_BUS_TAG)) wrbuf_tagff       (.din(dma_axi_awid[mcu_pt.DMA_BUS_TAG-1:0]), .dout(wrbuf_tag[mcu_pt.DMA_BUS_TAG-1:0]), .en(wrbuf_en), .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
-   rvdffs_fpga   #(.WIDTH(3))              wrbuf_szff        (.din(dma_axi_awsize[2:0]),  .dout(wrbuf_sz[2:0]),     .en(wrbuf_en),                  .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
-   rvdffe        #(.WIDTH(32))             wrbuf_addrff      (.din(dma_axi_awaddr[31:0]), .dout(wrbuf_addr[31:0]),  .en(wrbuf_en & dma_bus_clk_en), .*);
-   rvdffe        #(.WIDTH(64))             wrbuf_dataff      (.din(dma_axi_wdata[63:0]),  .dout(wrbuf_data[63:0]),  .en(wrbuf_data_en & dma_bus_clk_en), .*);
-   rvdffs_fpga   #(.WIDTH(8))              wrbuf_byteenff    (.din(dma_axi_wstrb[7:0]),   .dout(wrbuf_byteen[7:0]), .en(wrbuf_data_en),             .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffsc_fpga  #(.WIDTH(1))              wrbuf_vldff       (.din(1'b1), .dout(wrbuf_vld),      .en(wrbuf_en),      .clear(wrbuf_rst),      .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffsc_fpga  #(.WIDTH(1))              wrbuf_data_vldff  (.din(1'b1), .dout(wrbuf_data_vld), .en(wrbuf_data_en), .clear(wrbuf_data_rst), .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffs_fpga   #(.WIDTH(mcu_pt.DMA_BUS_TAG)) wrbuf_tagff       (.din(dma_axi_awid[mcu_pt.DMA_BUS_TAG-1:0]), .dout(wrbuf_tag[mcu_pt.DMA_BUS_TAG-1:0]), .en(wrbuf_en), .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffs_fpga   #(.WIDTH(3))              wrbuf_szff        (.din(dma_axi_awsize[2:0]),  .dout(wrbuf_sz[2:0]),     .en(wrbuf_en),                  .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffe        #(.WIDTH(32))             wrbuf_addrff      (.din(dma_axi_awaddr[31:0]), .dout(wrbuf_addr[31:0]),  .en(wrbuf_en & dma_bus_clk_en), .*);
+   mcu_rvdffe        #(.WIDTH(64))             wrbuf_dataff      (.din(dma_axi_wdata[63:0]),  .dout(wrbuf_data[63:0]),  .en(wrbuf_data_en & dma_bus_clk_en), .*);
+   mcu_rvdffs_fpga   #(.WIDTH(8))              wrbuf_byteenff    (.din(dma_axi_wstrb[7:0]),   .dout(wrbuf_byteen[7:0]), .en(wrbuf_data_en),             .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
 
    // Read channel buffer
    assign rdbuf_en    = dma_axi_arvalid & dma_axi_arready;
    assign rdbuf_cmd_sent = bus_cmd_sent & ~bus_cmd_write;
    assign rdbuf_rst   = rdbuf_cmd_sent & ~rdbuf_en;
 
-   rvdffsc_fpga  #(.WIDTH(1))              rdbuf_vldff  (.din(1'b1), .dout(rdbuf_vld), .en(rdbuf_en), .clear(rdbuf_rst), .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
-   rvdffs_fpga   #(.WIDTH(mcu_pt.DMA_BUS_TAG)) rdbuf_tagff  (.din(dma_axi_arid[mcu_pt.DMA_BUS_TAG-1:0]), .dout(rdbuf_tag[mcu_pt.DMA_BUS_TAG-1:0]), .en(rdbuf_en), .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
-   rvdffs_fpga   #(.WIDTH(3))              rdbuf_szff   (.din(dma_axi_arsize[2:0]),  .dout(rdbuf_sz[2:0]),    .en(rdbuf_en), .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
-   rvdffe       #(.WIDTH(32))              rdbuf_addrff (.din(dma_axi_araddr[31:0]), .dout(rdbuf_addr[31:0]), .en(rdbuf_en & dma_bus_clk_en), .*);
+   mcu_rvdffsc_fpga  #(.WIDTH(1))              rdbuf_vldff  (.din(1'b1), .dout(rdbuf_vld), .en(rdbuf_en), .clear(rdbuf_rst), .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffs_fpga   #(.WIDTH(mcu_pt.DMA_BUS_TAG)) rdbuf_tagff  (.din(dma_axi_arid[mcu_pt.DMA_BUS_TAG-1:0]), .dout(rdbuf_tag[mcu_pt.DMA_BUS_TAG-1:0]), .en(rdbuf_en), .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffs_fpga   #(.WIDTH(3))              rdbuf_szff   (.din(dma_axi_arsize[2:0]),  .dout(rdbuf_sz[2:0]),    .en(rdbuf_en), .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffe       #(.WIDTH(32))              rdbuf_addrff (.din(dma_axi_araddr[31:0]), .dout(rdbuf_addr[31:0]), .en(rdbuf_en & dma_bus_clk_en), .*);
 
    assign dma_axi_awready = ~(wrbuf_vld & ~wrbuf_cmd_sent);
    assign dma_axi_wready  = ~(wrbuf_data_vld & ~wrbuf_cmd_sent);
@@ -470,7 +470,7 @@ import mcu_el2_pkg::*;
    assign axi_mstr_sel     = (wrbuf_vld & wrbuf_data_vld & rdbuf_vld) ? axi_mstr_priority : (wrbuf_vld & wrbuf_data_vld);
    assign axi_mstr_prty_in = ~axi_mstr_priority;
    assign axi_mstr_prty_en = bus_cmd_sent;
-   rvdffs_fpga #(.WIDTH(1)) mstr_prtyff(.din(axi_mstr_prty_in), .dout(axi_mstr_priority), .en(axi_mstr_prty_en), .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
+   mcu_rvdffs_fpga #(.WIDTH(1)) mstr_prtyff(.din(axi_mstr_prty_in), .dout(axi_mstr_priority), .en(axi_mstr_prty_en), .clk(dma_bus_clk), .clken(dma_bus_clk_en), .rawclk(clk), .*);
 
    assign axi_rsp_valid                   = fifo_valid[RspPtr] & ~fifo_dbg[RspPtr] & fifo_done_bus[RspPtr];
    assign axi_rsp_rdata[63:0]             = fifo_data[RspPtr];
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/mcu_el2_mem.sv b/src/riscv_core/veer_el2/rtl/rev1p0/mcu_el2_mem.sv
index 022b8a3..65ff90b 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/mcu_el2_mem.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/mcu_el2_mem.sv
@@ -90,7 +90,7 @@ import mcu_el2_pkg::*;
 );
 
    logic active_clk;
-   rvoclkhdr active_cg   ( .en(1'b1),         .l1clk(active_clk), .* );
+   mcu_rvoclkhdr active_cg   ( .en(1'b1),         .l1clk(active_clk), .* );
 
    mcu_el2_mem_if mem_export_local ();
 
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/mcu_el2_pic_ctrl.sv b/src/riscv_core/veer_el2/rtl/rev1p0/mcu_el2_pic_ctrl.sv
index ead1a50..5825301 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/mcu_el2_pic_ctrl.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/mcu_el2_pic_ctrl.sv
@@ -167,11 +167,11 @@ logic [mcu_pt.PIC_TOTAL_INT_PLUS1-1:0]                        extintsrc_req_gw;
    assign gw_config_c1_clken  = (waddr_config_gw_base_match   & picm_wren_ff)  | (raddr_config_gw_base_match   & picm_rden_ff) | clk_override;
 
    // C1 - 1 clock pulse for data
-   rvoclkhdr pic_addr_c1_cgc   ( .en(pic_raddr_c1_clken),  .l1clk(pic_raddr_c1_clk), .* );
-   rvoclkhdr pic_data_c1_cgc   ( .en(pic_data_c1_clken),   .l1clk(pic_data_c1_clk), .* );
-   rvoclkhdr pic_pri_c1_cgc    ( .en(pic_pri_c1_clken),    .l1clk(pic_pri_c1_clk),  .* );
-   rvoclkhdr pic_int_c1_cgc    ( .en(pic_int_c1_clken),    .l1clk(pic_int_c1_clk),  .* );
-   rvoclkhdr gw_config_c1_cgc  ( .en(gw_config_c1_clken),  .l1clk(gw_config_c1_clk),  .* );
+   mcu_rvoclkhdr pic_addr_c1_cgc   ( .en(pic_raddr_c1_clken),  .l1clk(pic_raddr_c1_clk), .* );
+   mcu_rvoclkhdr pic_data_c1_cgc   ( .en(pic_data_c1_clken),   .l1clk(pic_data_c1_clk), .* );
+   mcu_rvoclkhdr pic_pri_c1_cgc    ( .en(pic_pri_c1_clken),    .l1clk(pic_pri_c1_clk),  .* );
+   mcu_rvoclkhdr pic_int_c1_cgc    ( .en(pic_int_c1_clken),    .l1clk(pic_int_c1_clk),  .* );
+   mcu_rvoclkhdr gw_config_c1_cgc  ( .en(gw_config_c1_clken),  .l1clk(gw_config_c1_clk),  .* );
 
 // ------ end clock gating section ------------------------
 
@@ -191,12 +191,12 @@ assign waddr_config_gw_base_match   = (picm_waddr_ff[31:NUM_LEVELS+2] == EXT_INT
    assign picm_bypass_ff = picm_rden_ff & picm_wren_ff & ( picm_raddr_ff[31:0] == picm_waddr_ff[31:0] );    // pic writes and reads to same address together
 
 
-rvdff #(32) picm_radd_flop  (.*, .din (picm_rdaddr),        .dout(picm_raddr_ff),         .clk(pic_raddr_c1_clk));
-rvdff #(32) picm_wadd_flop  (.*, .din (picm_wraddr),        .dout(picm_waddr_ff),         .clk(pic_data_c1_clk));
-rvdff  #(1) picm_wre_flop   (.*, .din (picm_wren),          .dout(picm_wren_ff),          .clk(free_clk));
-rvdff  #(1) picm_rde_flop   (.*, .din (picm_rden),          .dout(picm_rden_ff),          .clk(free_clk));
-rvdff  #(1) picm_mke_flop   (.*, .din (picm_mken),          .dout(picm_mken_ff),          .clk(free_clk));
-rvdff #(32) picm_dat_flop   (.*, .din (picm_wr_data[31:0]), .dout(picm_wr_data_ff[31:0]), .clk(pic_data_c1_clk));
+mcu_rvdff #(32) picm_radd_flop  (.*, .din (picm_rdaddr),        .dout(picm_raddr_ff),         .clk(pic_raddr_c1_clk));
+mcu_rvdff #(32) picm_wadd_flop  (.*, .din (picm_wraddr),        .dout(picm_waddr_ff),         .clk(pic_data_c1_clk));
+mcu_rvdff  #(1) picm_wre_flop   (.*, .din (picm_wren),          .dout(picm_wren_ff),          .clk(free_clk));
+mcu_rvdff  #(1) picm_rde_flop   (.*, .din (picm_rden),          .dout(picm_rden_ff),          .clk(free_clk));
+mcu_rvdff  #(1) picm_mke_flop   (.*, .din (picm_mken),          .dout(picm_mken_ff),          .clk(free_clk));
+mcu_rvdff #(32) picm_dat_flop   (.*, .din (picm_wr_data[31:0]), .dout(picm_wr_data_ff[31:0]), .clk(pic_data_c1_clk));
 
 //rvsyncss  #(mcu_pt.PIC_TOTAL_INT_PLUS1-1) sync_inst
 //(
@@ -211,10 +211,10 @@ genvar p ;
 for (p=0; p<=INT_ENABLE_GRPS ; p++) begin  : IO_CLK_GRP
    if (p==INT_ENABLE_GRPS) begin : LAST_GRP
        assign intenable_clk_enable_grp[p] = |intenable_clk_enable[mcu_pt.PIC_TOTAL_INT_PLUS1-1 : p*4] | io_clk_override;
-       rvoclkhdr intenable_c1_cgc   ( .en(intenable_clk_enable_grp[p]),  .l1clk(gw_clk[p]), .* );
+       mcu_rvoclkhdr intenable_c1_cgc   ( .en(intenable_clk_enable_grp[p]),  .l1clk(gw_clk[p]), .* );
    end else begin :  CLK_GRPS
        assign intenable_clk_enable_grp[p] = |intenable_clk_enable[p*4+3 : p*4] | io_clk_override;
-       rvoclkhdr intenable_c1_cgc   ( .en(intenable_clk_enable_grp[p]),  .l1clk(gw_clk[p]), .* );
+       mcu_rvoclkhdr intenable_c1_cgc   ( .en(intenable_clk_enable_grp[p]),  .l1clk(gw_clk[p]), .* );
    end
 end
 */
@@ -270,14 +270,14 @@ for (i=0; i<mcu_pt.PIC_TOTAL_INT_PLUS1 ; i++) begin  : SETREG
 
      assign gw_clear_reg_we[i]    =  addr_clear_gw_base_match     & (picm_waddr_ff[NUM_LEVELS+1:2] == i) & picm_wren_ff ;
 
-     rvdffs #(INTPRIORITY_BITS) intpriority_ff  (.*, .en( intpriority_reg_we[i]), .din (picm_wr_data_ff[INTPRIORITY_BITS-1:0]), .dout(intpriority_reg[i]), .clk(pic_pri_c1_clk));
-     rvdffs #(1)                 intenable_ff   (.*, .en( intenable_reg_we[i]),   .din (picm_wr_data_ff[0]),                    .dout(intenable_reg[i]),   .clk(pic_int_c1_clk));
-     rvdffs #(2)                 gw_config_ff   (.*, .en( gw_config_reg_we[i]),   .din (picm_wr_data_ff[1:0]),                  .dout(gw_config_reg[i]),   .clk(gw_config_c1_clk));
+     mcu_rvdffs #(INTPRIORITY_BITS) intpriority_ff  (.*, .en( intpriority_reg_we[i]), .din (picm_wr_data_ff[INTPRIORITY_BITS-1:0]), .dout(intpriority_reg[i]), .clk(pic_pri_c1_clk));
+     mcu_rvdffs #(1)                 intenable_ff   (.*, .en( intenable_reg_we[i]),   .din (picm_wr_data_ff[0]),                    .dout(intenable_reg[i]),   .clk(pic_int_c1_clk));
+     mcu_rvdffs #(2)                 gw_config_ff   (.*, .en( gw_config_reg_we[i]),   .din (picm_wr_data_ff[1:0]),                  .dout(gw_config_reg[i]),   .clk(gw_config_c1_clk));
 
      assign intenable_clk_enable[i]  =  gw_config_reg[i][1] | intenable_reg_we[i] | intenable_reg[i] | gw_clear_reg_we[i] ;
 
 /*
-     rvsyncss_fpga  #(1) sync_inst
+     mcu_rvsyncss_fpga  #(1) sync_inst
      (
       .gw_clk      (gw_clk[i/4]),
       .rawclk      (clk),
@@ -372,8 +372,8 @@ if (mcu_pt.PIC_2CYCLE == 1) begin : genblock
  end
 
         for (i=0; i<=mcu_pt.PIC_TOTAL_INT_PLUS1/2**(NUM_LEVELS/2) ; i++) begin : MIDDLE_FLOPS
-          rvdff #(INTPRIORITY_BITS) levmcu_el2_intpend_prior_reg  (.*, .din (level_intpend_w_prior_en[NUM_LEVELS/2][i]), .dout(l2_intpend_w_prior_en_ff[i]),  .clk(free_clk));
-          rvdff #(ID_BITS)          levmcu_el2_intpend_id_reg     (.*, .din (level_intpend_id[NUM_LEVELS/2][i]),         .dout(l2_intpend_id_ff[i]),          .clk(free_clk));
+          mcu_rvdff #(INTPRIORITY_BITS) levmcu_el2_intpend_prior_reg  (.*, .din (level_intpend_w_prior_en[NUM_LEVELS/2][i]), .dout(l2_intpend_w_prior_en_ff[i]),  .clk(free_clk));
+          mcu_rvdff #(ID_BITS)          levmcu_el2_intpend_id_reg     (.*, .din (level_intpend_id[NUM_LEVELS/2][i]),         .dout(l2_intpend_id_ff[i]),          .clk(free_clk));
         end
 
  for (j=NUM_LEVELS/2; j<NUM_LEVELS ; j++) begin : BOT_LEVELS
@@ -437,7 +437,7 @@ assign config_reg_we               =  waddr_config_pic_match & picm_wren_ff;
 assign config_reg_re               =  raddr_config_pic_match & picm_rden_ff;
 
 assign config_reg_in  =  picm_wr_data_ff[0] ;   //
-rvdffs #(1) config_reg_ff  (.*, .clk(free_clk), .en(config_reg_we), .din (config_reg_in), .dout(config_reg));
+mcu_rvdffs #(1) config_reg_ff  (.*, .clk(free_clk), .en(config_reg_we), .din (config_reg_in), .dout(config_reg));
 
 assign intpriord  = config_reg ;
 
@@ -451,19 +451,19 @@ assign intpriord  = config_reg ;
 ///////////////////////////////////////////////////////////
 //
 assign pl_in_q[INTPRIORITY_BITS-1:0] = intpriord ? ~pl_in : pl_in ;
-rvdff #(ID_BITS)          claimid_ff  (.*,  .din (claimid_in[ID_BITS-1:00]),     .dout(claimid[ID_BITS-1:00]),    .clk(free_clk));
-rvdff  #(INTPRIORITY_BITS) pl_ff      (.*, .din (pl_in_q[INTPRIORITY_BITS-1:0]), .dout(pl[INTPRIORITY_BITS-1:0]), .clk(free_clk));
+mcu_rvdff #(ID_BITS)          claimid_ff  (.*,  .din (claimid_in[ID_BITS-1:00]),     .dout(claimid[ID_BITS-1:00]),    .clk(free_clk));
+mcu_rvdff  #(INTPRIORITY_BITS) pl_ff      (.*, .din (pl_in_q[INTPRIORITY_BITS-1:0]), .dout(pl[INTPRIORITY_BITS-1:0]), .clk(free_clk));
 
 logic [INTPRIORITY_BITS-1:0] meipt_inv , meicurpl_inv ;
 assign meipt_inv[INTPRIORITY_BITS-1:0]    = intpriord ? ~meipt[INTPRIORITY_BITS-1:0]    : meipt[INTPRIORITY_BITS-1:0] ;
 assign meicurpl_inv[INTPRIORITY_BITS-1:0] = intpriord ? ~meicurpl[INTPRIORITY_BITS-1:0] : meicurpl[INTPRIORITY_BITS-1:0] ;
 assign mexintpend_in = (( selected_int_priority[INTPRIORITY_BITS-1:0] > meipt_inv[INTPRIORITY_BITS-1:0]) &
                         ( selected_int_priority[INTPRIORITY_BITS-1:0] > meicurpl_inv[INTPRIORITY_BITS-1:0]) );
-rvdff #(1) mexintpend_ff  (.*, .clk(free_clk), .din (mexintpend_in), .dout(mexintpend));
+mcu_rvdff #(1) mexintpend_ff  (.*, .clk(free_clk), .din (mexintpend_in), .dout(mexintpend));
 
 assign maxint[INTPRIORITY_BITS-1:0]      =  intpriord ? 0 : 15 ;
 assign mhwakeup_in = ( pl_in_q[INTPRIORITY_BITS-1:0] == maxint) ;
-rvdff #(1) wake_up_ff  (.*, .clk(free_clk), .din (mhwakeup_in), .dout(mhwakeup));
+mcu_rvdff #(1) wake_up_ff  (.*, .clk(free_clk), .din (mhwakeup_in), .dout(mhwakeup));
 
 
 
@@ -573,14 +573,14 @@ module mcu_el2_configurable_gw (
 
   logic  gw_int_pending_in, gw_int_pending, extintsrc_req_sync;
 
-  rvsyncss_fpga  #(1) sync_inst (
+  mcu_rvsyncss_fpga  #(1) sync_inst (
       .dout        (extintsrc_req_sync),
       .din         (extintsrc_req),
       .*) ;
 
 
   assign gw_int_pending_in =  (extintsrc_req_sync ^ meigwctrl_polarity) | (gw_int_pending & ~meigwclr) ;
-  rvdff_fpga #(1) int_pend_ff        (.*, .clk(gw_clk), .rawclk(rawclk), .clken(clken), .din (gw_int_pending_in),     .dout(gw_int_pending));
+  mcu_rvdff_fpga #(1) int_pend_ff        (.*, .clk(gw_clk), .rawclk(rawclk), .clken(clken), .din (gw_int_pending_in),     .dout(gw_int_pending));
 
 
   assign extintsrc_req_config =  meigwctrl_type ? ((extintsrc_req_sync ^  meigwctrl_polarity) | gw_int_pending) : (extintsrc_req_sync ^  meigwctrl_polarity) ;
diff --git a/src/riscv_core/veer_el2/rtl/rev1p0/mcu_el2_veer.sv b/src/riscv_core/veer_el2/rtl/rev1p0/mcu_el2_veer.sv
index fc2cc24..990b7f8 100644
--- a/src/riscv_core/veer_el2/rtl/rev1p0/mcu_el2_veer.sv
+++ b/src/riscv_core/veer_el2/rtl/rev1p0/mcu_el2_veer.sv
@@ -846,12 +846,12 @@ import mcu_el2_pkg::*;
 
    assign active_state = (~(halt_state | pause_state) | dec_tlu_flush_lower_r | dec_tlu_flush_lower_wb)  | dec_tlu_misc_clk_override;
 
-   rvoclkhdr free_cg2   ( .clk(clk), .en(1'b1),         .l1clk(free_l2clk), .* );
-   rvoclkhdr active_cg2 ( .clk(clk), .en(active_state), .l1clk(active_l2clk), .* );
+   mcu_rvoclkhdr free_cg2   ( .clk(clk), .en(1'b1),         .l1clk(free_l2clk), .* );
+   mcu_rvoclkhdr active_cg2 ( .clk(clk), .en(active_state), .l1clk(active_l2clk), .* );
 
 // all other clock headers are 1st level
-   rvoclkhdr free_cg1   ( .clk(free_l2clk),     .en(1'b1), .l1clk(free_clk), .* );
-   rvoclkhdr active_cg1 ( .clk(active_l2clk),   .en(1'b1), .l1clk(active_clk), .* );
+   mcu_rvoclkhdr free_cg1   ( .clk(free_l2clk),     .en(1'b1), .l1clk(free_clk), .* );
+   mcu_rvoclkhdr active_cg1 ( .clk(active_l2clk),   .en(1'b1), .l1clk(active_clk), .* );
 
 
    assign core_dbg_cmd_done = dma_dbg_cmd_done | dec_dbg_cmd_done;