From bb30cc0c28412eb8d364b3510fc83d928233a806 Mon Sep 17 00:00:00 2001 From: c0pperdragon Date: Sat, 19 Dec 2020 11:01:47 +0100 Subject: [PATCH] Comment on pixel clock generation --- README.md | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/README.md b/README.md index ab51840..7b679f6 100644 --- a/README.md +++ b/README.md @@ -55,7 +55,7 @@ first devices) you may need to update the firmware to the latest version. The mod boards as sold by videogamesperfection.com have the firmware version 2.6 which already works with most variants of the VIC. -To support the 656765A chip, the mod additionally needs to be jumpered because it can not auto-detect +To support the 6567R56A chip, the mod additionally needs to be jumpered because it can not auto-detect this specific variant on its own: You need to connect pin 5 of the JTAG header to ground. This can fairly easily be done by connecting it to pin 2 of this header. @@ -210,6 +210,14 @@ Writing a 1 into this bit will turn off sync on the Y line, whenever the 240p/28 In this mode, the luminousity line of the original A/V connector can be used to get the sync signal from instead. +## Pixel clock generation + +Some C64s - especially the very first models - have a very bad clock circuit that generates an unstable and shaky pixel clock. +This may lead to all sorts of stability problems, including the component mod showing sparkly pixels or worse effects. +Because of this, I have added a hidden feature into the FPGA board that generates a stable clock signal you can +use instead. For more details on how to wire this all up, you can check the various issue threads on this topic (but be aware that +this is getting very technical very fast). + ## Contact For technical questions and also to share your experience with this modification, please use the issue tracking system of github.