From 530ebecfb727fc64b5211a31e1dd3a9e890684c3 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Thu, 19 Dec 2024 21:42:52 -0500 Subject: [PATCH] Tests: Add module-in-module coverage --- test_regress/t/t_dist_warn_coverage.py | 13 ------------- test_regress/t/t_mod_mod.out | 17 +++++++++++++++++ test_regress/t/t_mod_mod.py | 16 ++++++++++++++++ test_regress/t/t_mod_mod.v | 21 +++++++++++++++++++++ 4 files changed, 54 insertions(+), 13 deletions(-) create mode 100644 test_regress/t/t_mod_mod.out create mode 100755 test_regress/t/t_mod_mod.py create mode 100644 test_regress/t/t_mod_mod.v diff --git a/test_regress/t/t_dist_warn_coverage.py b/test_regress/t/t_dist_warn_coverage.py index e953e021707..cf8133fb138 100755 --- a/test_regress/t/t_dist_warn_coverage.py +++ b/test_regress/t/t_dist_warn_coverage.py @@ -47,14 +47,12 @@ 'Illegal +: or -: select; type already selected, or bad dimension: ', 'Illegal bit or array select; type already selected, or bad dimension: ', 'Illegal range select; type already selected, or bad dimension: ', - 'Interface port ', 'Member selection of non-struct/union object \'', 'Modport item is not a function/task: ', 'Modport item is not a variable: ', 'Modport item not found: ', 'Modport not referenced as .', 'Modport not referenced from underneath an interface: ', - 'Non-interface used as an interface: ', 'Parameter type pin value isn\'t a type: Param ', 'Parameter type variable isn\'t a type: Param ', 'Pattern replication value of 0 is not legal.', @@ -86,12 +84,9 @@ 'Unsupported: Modport dotted port name', 'Unsupported: Modport export with prototype', 'Unsupported: Modport import with prototype', - 'Unsupported: Non-variable on LHS of built-in method \'', 'Unsupported: Only one PSL clock allowed per assertion', 'Unsupported: Per-bit array instantiations ', 'Unsupported: Public functions with >64 bit outputs; ', - 'Unsupported: RHS of ==? or !=? must be ', - 'Unsupported: Randomize \'local::\'', 'Unsupported: Replication to form ', 'Unsupported: Shifting of by over 32-bit number isn\'t supported.', 'Unsupported: Signal strengths are unsupported ', @@ -111,11 +106,6 @@ 'Unsupported: extern interface', 'Unsupported: extern module', 'Unsupported: extern task', - 'Unsupported: interface decls within interface decls', - 'Unsupported: interface decls within module decls', - 'Unsupported: module decls within module decls', - 'Unsupported: program decls within interface decls', - 'Unsupported: program decls within module decls', 'Unsupported: property port \'local\'', 'Unsupported: randsequence production list', 'Unsupported: randsequence repeat', @@ -123,10 +113,7 @@ 'Unsupported: s_always (in property expression)', 'Unsupported: this.super', 'Unsupported: trireg', - 'Unsupported: wand', 'Unsupported: with[] stream expression', - 'Unsupported: wor', - 'Unsupported: event arrays', 'Unsupported: modport export', 'Unsupported: no_inline for tasks', 'Unsupported: static cast to ', diff --git a/test_regress/t/t_mod_mod.out b/test_regress/t/t_mod_mod.out new file mode 100644 index 00000000000..755121ab5fd --- /dev/null +++ b/test_regress/t/t_mod_mod.out @@ -0,0 +1,17 @@ +%Error-UNSUPPORTED: t/t_mod_mod.v:10:3: Unsupported: module decls within module decls + 10 | program p_in_m(); + | ^~~~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest +%Error-UNSUPPORTED: t/t_mod_mod.v:12:3: Unsupported: program decls within module decls + 12 | interface i_in_m(); + | ^~~~~~~~~ +%Error-UNSUPPORTED: t/t_mod_mod.v:14:1: Unsupported: interface decls within module decls + 14 | endmodule + | ^~~~~~~~~ +%Error-UNSUPPORTED: t/t_mod_mod.v:19:3: Unsupported: interface decls within interface decls + 19 | program p_in_i(); + | ^~~~~~~ +%Error-UNSUPPORTED: t/t_mod_mod.v:21:1: Unsupported: program decls within interface decls + 21 | endinterface + | ^~~~~~~~~~~~ +%Error: Exiting due to diff --git a/test_regress/t/t_mod_mod.py b/test_regress/t/t_mod_mod.py new file mode 100755 index 00000000000..6585af6859f --- /dev/null +++ b/test_regress/t/t_mod_mod.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2024 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios('vlt') + +test.lint(fails=test.vlt_all, expect_filename=test.golden_filename) + +test.passes() diff --git a/test_regress/t/t_mod_mod.v b/test_regress/t/t_mod_mod.v new file mode 100644 index 00000000000..8e4465d0f50 --- /dev/null +++ b/test_regress/t/t_mod_mod.v @@ -0,0 +1,21 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2008 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + +module m(); + module m_in_m; + endmodule + program p_in_m(); + endprogram + interface i_in_m(); + endinterface +endmodule + +interface i(); + interface i_in_i(); + endinterface + program p_in_i(); + endprogram +endinterface