From 889cc6a3ac747aae01af6d6b8023a76b1d403468 Mon Sep 17 00:00:00 2001 From: Jeremy Kongs Date: Wed, 13 Nov 2024 15:00:18 -0600 Subject: [PATCH 1/2] HART: Dedicated GPIO structure for HART UART Due to having multiple GPIO mappings for UART2, HART malfunctioned. Added new struct for HART: hart_gpio_cfg_uart2 --- Libraries/PeriphDrivers/Include/MAX32675/mxc_pins.h | 1 + Libraries/PeriphDrivers/Source/AFE/hart_uart.c | 2 +- Libraries/PeriphDrivers/Source/SYS/pins_me16.c | 4 ++++ 3 files changed, 6 insertions(+), 1 deletion(-) diff --git a/Libraries/PeriphDrivers/Include/MAX32675/mxc_pins.h b/Libraries/PeriphDrivers/Include/MAX32675/mxc_pins.h index 370041103fd..0707baef0ec 100644 --- a/Libraries/PeriphDrivers/Include/MAX32675/mxc_pins.h +++ b/Libraries/PeriphDrivers/Include/MAX32675/mxc_pins.h @@ -44,6 +44,7 @@ extern const mxc_gpio_cfg_t gpio_cfg_uart0_flow; extern const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable; extern const mxc_gpio_cfg_t gpio_cfg_uart1; extern const mxc_gpio_cfg_t gpio_cfg_uart1_flow; +extern const mxc_gpio_cfg_t hart_gpio_cfg_uart2; extern const mxc_gpio_cfg_t gpio_cfg_uart2; extern const mxc_gpio_cfg_t gpio_cfg_uart2_flow; extern const mxc_gpio_cfg_t gpio_cfg_uart2_flow_disable; diff --git a/Libraries/PeriphDrivers/Source/AFE/hart_uart.c b/Libraries/PeriphDrivers/Source/AFE/hart_uart.c index c1782bae8ec..804625bfc0f 100644 --- a/Libraries/PeriphDrivers/Source/AFE/hart_uart.c +++ b/Libraries/PeriphDrivers/Source/AFE/hart_uart.c @@ -198,7 +198,7 @@ static int hart_uart_init(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clo break; case 2: - MXC_AFE_GPIO_Config(&gpio_cfg_uart2); + MXC_AFE_GPIO_Config(&hart_gpio_cfg_uart2); MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_UART2); break; diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_me16.c b/Libraries/PeriphDrivers/Source/SYS/pins_me16.c index 5a897c98630..8b830a76d8f 100644 --- a/Libraries/PeriphDrivers/Source/SYS/pins_me16.c +++ b/Libraries/PeriphDrivers/Source/SYS/pins_me16.c @@ -55,6 +55,10 @@ const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_G const mxc_gpio_cfg_t gpio_cfg_uart1_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }; +// NOTE: UART2 mapping B is tied to HART modem in the AFE and cannot be moved. +const mxc_gpio_cfg_t hart_gpio_cfg_uart2 = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT2, + MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }; + const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO1, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9), MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }; const mxc_gpio_cfg_t gpio_cfg_uart2_flow = { MXC_GPIO1, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT1, From 77a4bc8765bb8258711ff0a5be0a1f087d570a39 Mon Sep 17 00:00:00 2001 From: Jeremy Kongs Date: Fri, 15 Nov 2024 13:56:15 -0600 Subject: [PATCH 2/2] HART: Fix gpio_cfg_hart for both ME16 and ME20 --- Libraries/PeriphDrivers/Include/MAX32675/mxc_pins.h | 4 +++- Libraries/PeriphDrivers/Include/MAX32680/mxc_pins.h | 2 ++ Libraries/PeriphDrivers/Source/AFE/hart_uart.c | 4 ++-- Libraries/PeriphDrivers/Source/SYS/pins_me16.c | 4 ++-- Libraries/PeriphDrivers/Source/SYS/pins_me20.c | 4 ++++ 5 files changed, 13 insertions(+), 5 deletions(-) diff --git a/Libraries/PeriphDrivers/Include/MAX32675/mxc_pins.h b/Libraries/PeriphDrivers/Include/MAX32675/mxc_pins.h index 0707baef0ec..344dbe93c1c 100644 --- a/Libraries/PeriphDrivers/Include/MAX32675/mxc_pins.h +++ b/Libraries/PeriphDrivers/Include/MAX32675/mxc_pins.h @@ -44,7 +44,9 @@ extern const mxc_gpio_cfg_t gpio_cfg_uart0_flow; extern const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable; extern const mxc_gpio_cfg_t gpio_cfg_uart1; extern const mxc_gpio_cfg_t gpio_cfg_uart1_flow; -extern const mxc_gpio_cfg_t hart_gpio_cfg_uart2; + +extern const mxc_gpio_cfg_t gpio_cfg_hart; + extern const mxc_gpio_cfg_t gpio_cfg_uart2; extern const mxc_gpio_cfg_t gpio_cfg_uart2_flow; extern const mxc_gpio_cfg_t gpio_cfg_uart2_flow_disable; diff --git a/Libraries/PeriphDrivers/Include/MAX32680/mxc_pins.h b/Libraries/PeriphDrivers/Include/MAX32680/mxc_pins.h index 45028d36480..5289f4de006 100644 --- a/Libraries/PeriphDrivers/Include/MAX32680/mxc_pins.h +++ b/Libraries/PeriphDrivers/Include/MAX32680/mxc_pins.h @@ -41,6 +41,8 @@ extern const mxc_gpio_cfg_t gpio_cfg_i2c2; extern const mxc_gpio_cfg_t gpio_cfg_i2c2b; extern const mxc_gpio_cfg_t gpio_cfg_i2c2c; +extern const mxc_gpio_cfg_t gpio_cfg_hart; + extern const mxc_gpio_cfg_t gpio_cfg_uart0; extern const mxc_gpio_cfg_t gpio_cfg_uart0_flow; extern const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable; diff --git a/Libraries/PeriphDrivers/Source/AFE/hart_uart.c b/Libraries/PeriphDrivers/Source/AFE/hart_uart.c index 804625bfc0f..4cd3fa8c259 100644 --- a/Libraries/PeriphDrivers/Source/AFE/hart_uart.c +++ b/Libraries/PeriphDrivers/Source/AFE/hart_uart.c @@ -193,12 +193,12 @@ static int hart_uart_init(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clo switch (MXC_UART_GET_IDX(uart)) { case 0: - MXC_AFE_GPIO_Config(&gpio_cfg_uart0); + MXC_AFE_GPIO_Config(&gpio_cfg_hart); MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_UART0); break; case 2: - MXC_AFE_GPIO_Config(&hart_gpio_cfg_uart2); + MXC_AFE_GPIO_Config(&gpio_cfg_hart); MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_UART2); break; diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_me16.c b/Libraries/PeriphDrivers/Source/SYS/pins_me16.c index 8b830a76d8f..0fd55ce6960 100644 --- a/Libraries/PeriphDrivers/Source/SYS/pins_me16.c +++ b/Libraries/PeriphDrivers/Source/SYS/pins_me16.c @@ -56,8 +56,8 @@ const mxc_gpio_cfg_t gpio_cfg_uart1_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_30 MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }; // NOTE: UART2 mapping B is tied to HART modem in the AFE and cannot be moved. -const mxc_gpio_cfg_t hart_gpio_cfg_uart2 = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT2, - MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }; +const mxc_gpio_cfg_t gpio_cfg_hart = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT2, + MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }; const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO1, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9), MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }; diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_me20.c b/Libraries/PeriphDrivers/Source/SYS/pins_me20.c index ecb6a2f794e..f3247bfdc74 100644 --- a/Libraries/PeriphDrivers/Source/SYS/pins_me20.c +++ b/Libraries/PeriphDrivers/Source/SYS/pins_me20.c @@ -41,6 +41,10 @@ const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PI const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }; +// NOTE: UART0 is tied to HART modem in the AFE and cannot be moved. +const mxc_gpio_cfg_t gpio_cfg_hart = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT1, + MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }; + const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }; const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT2,