diff --git a/docs/SPIRVRepresentationInLLVM.rst b/docs/SPIRVRepresentationInLLVM.rst index 14e99985b..56eb4bcf3 100644 --- a/docs/SPIRVRepresentationInLLVM.rst +++ b/docs/SPIRVRepresentationInLLVM.rst @@ -261,7 +261,7 @@ scalar component is mapped to a function call with index argument, i.e.: ; However SPIRV-LLVM translator will transform it to the following pattern: %1 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0) - %2 = insertelement <3 x i64> undef, i64 %1, i32 0 + %2 = insertelement <3 x i64> poison, i64 %1, i32 0 %3 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 1) %4 = insertelement <3 x i64> %2, i64 %3, i32 1 %5 = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 2) diff --git a/lib/SPIRV/LLVMSaddWithOverflow.h b/lib/SPIRV/LLVMSaddWithOverflow.h index fa260f5a0..f9f80e09e 100644 --- a/lib/SPIRV/LLVMSaddWithOverflow.h +++ b/lib/SPIRV/LLVMSaddWithOverflow.h @@ -162,7 +162,7 @@ if.then: ; preds = %entry if.end21: ; preds = %if.then, %entry %overflow = phi i1 [ 0, %entry ], [ %or.cond40, %if.then ] %add24 = add i16 %b, %a - %agg = insertvalue {i16, i1} undef, i16 %add24, 0 + %agg = insertvalue {i16, i1} poison, i16 %add24, 0 %res = insertvalue {i16, i1} %agg, i1 %overflow, 1 ret {i16, i1} %res } @@ -202,7 +202,7 @@ if.then12: ; preds = %land.lhs.true, %if. if.end23: ; preds = %if.then12, %if.else, %land.lhs.true %overflow = phi i1 [ 1, %land.lhs.true ], [ 0, %if.else ], [ %or.cond43, %if.then12 ] %add24 = add nsw i32 %b, %a - %agg = insertvalue {i32, i1} undef, i32 %add24, 0 + %agg = insertvalue {i32, i1} poison, i32 %add24, 0 %res = insertvalue {i32, i1} %agg, i1 %overflow, 1 ret {i32, i1} %res } @@ -242,7 +242,7 @@ if.then12: ; preds = %land.lhs.true, %if. if.end23: ; preds = %if.then12, %if.else, %land.lhs.true %overflow = phi i1 [ 1, %land.lhs.true ], [ 0, %if.else ], [ %or.cond42, %if.then12 ] %add24 = add nsw i64 %b, %a - %agg = insertvalue {i64, i1} undef, i64 %add24, 0 + %agg = insertvalue {i64, i1} poison, i64 %add24, 0 %res = insertvalue {i64, i1} %agg, i1 %overflow, 1 ret {i64, i1} %res } diff --git a/lib/SPIRV/LLVMToSPIRVDbgTran.cpp b/lib/SPIRV/LLVMToSPIRVDbgTran.cpp index 2cd56e314..7af6f2678 100644 --- a/lib/SPIRV/LLVMToSPIRVDbgTran.cpp +++ b/lib/SPIRV/LLVMToSPIRVDbgTran.cpp @@ -161,7 +161,7 @@ void LLVMToSPIRVDbgTran::finalizeDebugValue( DIExpression *Expr = DbgValue->getExpression(); if (!isNonSemanticDebugInfo()) { if (DbgValue->getNumVariableLocationOps() > 1) { - Val = UndefValue::get(Val->getType()); + Val = PoisonValue::get(Val->getType()); Expr = DIExpression::get(M->getContext(), {}); } } diff --git a/lib/SPIRV/OCLToSPIRV.cpp b/lib/SPIRV/OCLToSPIRV.cpp index 1dc3ed974..088f4e127 100644 --- a/lib/SPIRV/OCLToSPIRV.cpp +++ b/lib/SPIRV/OCLToSPIRV.cpp @@ -1068,7 +1068,7 @@ void OCLToSPIRVBase::visitCallGetImageSize(CallInst *CI, } else if (Desc.Dim == Dim2D && Desc.Arrayed) { Constant *Index[] = {getInt32(M, 0), getInt32(M, 1)}; Constant *Mask = ConstantVector::get(Index); - return new ShuffleVectorInst(NCI, UndefValue::get(NCI->getType()), + return new ShuffleVectorInst(NCI, PoisonValue::get(NCI->getType()), Mask, NCI->getName(), CI->getIterator()); } @@ -1413,9 +1413,9 @@ void OCLToSPIRVBase::visitCallScalToVec(CallInst *CI, StringRef MangledName, for (auto I : ScalarPos) Mutator.mapArg(I, [&](Value *V) { Instruction *Inst = InsertElementInst::Create( - UndefValue::get(VecTy), V, getInt32(M, 0), "", CI->getIterator()); + PoisonValue::get(VecTy), V, getInt32(M, 0), "", CI->getIterator()); return new ShuffleVectorInst( - Inst, UndefValue::get(VecTy), + Inst, PoisonValue::get(VecTy), ConstantVector::getSplat(VecElemCount, getInt32(M, 0)), "", CI->getIterator()); }); diff --git a/lib/SPIRV/SPIRVLowerBitCastToNonStandardType.cpp b/lib/SPIRV/SPIRVLowerBitCastToNonStandardType.cpp index e6b43a291..39494054b 100644 --- a/lib/SPIRV/SPIRVLowerBitCastToNonStandardType.cpp +++ b/lib/SPIRV/SPIRVLowerBitCastToNonStandardType.cpp @@ -65,7 +65,7 @@ static Value *removeBitCasts(Value *OldValue, Type *NewTy, NFIRBuilder &Builder, // If there's only one use, don't create a bitcast for any uses, since it // will be immediately replaced anyways. if (OldValue->hasOneUse()) { - OldValue->replaceAllUsesWith(UndefValue::get(OldValue->getType())); + OldValue->replaceAllUsesWith(PoisonValue::get(OldValue->getType())); } else { OldValue->replaceAllUsesWith( Builder.CreateBitCast(NewValue, OldValue->getType())); @@ -95,7 +95,7 @@ static Value *removeBitCasts(Value *OldValue, Type *NewTy, NFIRBuilder &Builder, if (auto *BC = dyn_cast(OldValue)) { if (BC->getSrcTy() == NewTy) { if (BC->hasOneUse()) { - BC->replaceAllUsesWith(UndefValue::get(BC->getType())); + BC->replaceAllUsesWith(PoisonValue::get(BC->getType())); InstsToErase.push_back(BC); } return BC->getOperand(0); diff --git a/lib/SPIRV/SPIRVReader.cpp b/lib/SPIRV/SPIRVReader.cpp index fa0bc2794..daed88623 100644 --- a/lib/SPIRV/SPIRVReader.cpp +++ b/lib/SPIRV/SPIRVReader.cpp @@ -1691,7 +1691,7 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F, Constant *Initializer = nullptr; if (IsVectorCompute) { AddrSpace = VectorComputeUtil::getVCGlobalVarAddressSpace(BS); - Initializer = UndefValue::get(Ty); + Initializer = PoisonValue::get(Ty); } else AddrSpace = M->getTargetTriple() == "amdgcn-amd-amdhsa" ? mapSPIRVAddrSpaceToAMDGPU(BS) : SPIRSPIRVAddrSpaceMap::rmap(BS); @@ -1711,7 +1711,7 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F, Initializer = Constant::getNullValue(Ty); else if (BS == SPIRVStorageClassKind::StorageClassWorkgroup && LinkageTy != GlobalValue::ExternalLinkage) - Initializer = dyn_cast(UndefValue::get(Ty)); + Initializer = dyn_cast(PoisonValue::get(Ty)); else if ((LinkageTy != GlobalValue::ExternalLinkage) && (BS == SPIRVStorageClassKind::StorageClassCrossWorkgroup)) Initializer = Constant::getNullValue(Ty); @@ -2070,7 +2070,7 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F, for (unsigned Idx = 0; Idx != N; ++Idx) { Value *S = Builder.CreateExtractElement(Vec, Builder.getInt32(Idx)); Value *Lhs = Builder.CreateVectorSplat(M, S); - Value *Rhs = UndefValue::get(VTy); + Value *Rhs = PoisonValue::get(VTy); for (unsigned Idx2 = 0; Idx2 != M; ++Idx2) { Value *Vx = Builder.CreateExtractValue(Mat, Idx2); Value *Vxi = Builder.CreateExtractElement(Vx, Builder.getInt32(Idx)); @@ -2095,7 +2095,7 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F, Builder.CreateVectorSplat(VecSize, Scalar, Scalar->getName()); NewVec->takeName(Scalar); - Value *V = UndefValue::get(Matrix->getType()); + Value *V = PoisonValue::get(Matrix->getType()); for (uint64_t Idx = 0; Idx != ColNum; Idx++) { auto *Col = Builder.CreateExtractValue(Matrix, Idx); auto *I = Builder.CreateFMul(Col, NewVec); @@ -2197,7 +2197,7 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F, auto *VTy = FixedVectorType::get(ETy, R1); auto *ResultTy = ArrayType::get(VTy, C2); - Value *Res = UndefValue::get(ResultTy); + Value *Res = PoisonValue::get(ResultTy); for (unsigned Idx = 0; Idx != C2; ++Idx) { Value *U = Builder.CreateExtractValue(M2, Idx); @@ -2230,7 +2230,7 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F, auto *VTy = FixedVectorType::get(ColTy->getElementType(), ColNum); auto *ResultTy = ArrayType::get(VTy, RowNum); - Value *V = UndefValue::get(ResultTy); + Value *V = PoisonValue::get(ResultTy); SmallVector MCache; MCache.reserve(ColNum); @@ -2270,7 +2270,7 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F, // Slowpath for (unsigned Idx = 0; Idx != RowNum; ++Idx) { - Value *Vec = UndefValue::get(VTy); + Value *Vec = PoisonValue::get(VTy); for (unsigned Idx2 = 0; Idx2 != ColNum; ++Idx2) { Value *S = @@ -2557,7 +2557,7 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F, IntegerType *Int32Ty = IntegerType::get(*Context, 32); for (auto I : VS->getComponents()) { if (I == static_cast(-1)) - Components.push_back(UndefValue::get(Int32Ty)); + Components.push_back(PoisonValue::get(Int32Ty)); else Components.push_back(ConstantInt::get(Int32Ty, I)); } @@ -2837,7 +2837,7 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F, CarryInt = Builder.CreateZExt(Carry, Result->getType()); } auto *ResultStruct = - Builder.CreateInsertValue(UndefValue::get(StructType::get( + Builder.CreateInsertValue(PoisonValue::get(StructType::get( Result->getType(), CarryInt->getType())), Result, 0); ResultStruct = Builder.CreateInsertValue(ResultStruct, CarryInt, 1); @@ -2869,8 +2869,8 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F, PointerType *Int8PtrTyPrivate = PointerType::get(*Context, SPIRAS_Private); IntegerType *Int32Ty = Type::getInt32Ty(*Context); - Value *UndefInt8Ptr = UndefValue::get(Int8PtrTyPrivate); - Value *UndefInt32 = UndefValue::get(Int32Ty); + Value *UndefInt8Ptr = PoisonValue::get(Int8PtrTyPrivate); + Value *UndefInt32 = PoisonValue::get(Int32Ty); Constant *GS = Builder.CreateGlobalString(kOCLBuiltinName::FPGARegIntel); @@ -4239,8 +4239,8 @@ void SPIRVToLLVM::transIntelFPGADecorations(SPIRVValue *BV, Value *V) { Type *Int8PtrTyPrivate = PointerType::get(*Context, SPIRAS_Private); IntegerType *Int32Ty = IntegerType::get(*Context, 32); - Value *UndefInt8Ptr = UndefValue::get(Int8PtrTyPrivate); - Value *UndefInt32 = UndefValue::get(Int32Ty); + Value *UndefInt8Ptr = PoisonValue::get(Int8PtrTyPrivate); + Value *UndefInt32 = PoisonValue::get(Int32Ty); if (AL && BV->getType()->getPointerElementType()->isTypeStruct()) { auto *ST = BV->getType()->getPointerElementType(); @@ -4377,8 +4377,8 @@ void SPIRVToLLVM::transIntelFPGADecorations(SPIRVValue *BV, Value *V) { llvm::Constant *Fields[5] = { C, ConstantExpr::getBitCast(GS, Int8PtrTyPrivate), - UndefValue::get(Int8PtrTyPrivate), UndefValue::get(Int32Ty), - UndefValue::get(Int8PtrTyPrivate)}; + PoisonValue::get(Int8PtrTyPrivate), PoisonValue::get(Int32Ty), + PoisonValue::get(Int8PtrTyPrivate)}; GlobalAnnotations.push_back(ConstantStruct::getAnon(Fields)); } @@ -4441,8 +4441,8 @@ void SPIRVToLLVM::transUserSemantic(SPIRV::SPIRVFunction *Fun) { llvm::Constant *Fields[5] = { C, ConstantExpr::getBitCast(GS, Int8PtrTyPrivate), - UndefValue::get(Int8PtrTyPrivate), UndefValue::get(Int32Ty), - UndefValue::get(Int8PtrTyPrivate)}; + PoisonValue::get(Int8PtrTyPrivate), PoisonValue::get(Int32Ty), + PoisonValue::get(Int8PtrTyPrivate)}; GlobalAnnotations.push_back(ConstantStruct::getAnon(Fields)); } } @@ -4805,7 +4805,7 @@ bool SPIRVToLLVM::transMetadata() { std::vector MetadataVec; Type *VecHintTy = decodeVecTypeHint(*Context, EM->getLiterals()[0]); assert(VecHintTy); - MetadataVec.push_back(ValueAsMetadata::get(UndefValue::get(VecHintTy))); + MetadataVec.push_back(ValueAsMetadata::get(PoisonValue::get(VecHintTy))); MetadataVec.push_back(ConstantAsMetadata::get( ConstantInt::get(Type::getInt32Ty(*Context), 1))); F->setMetadata(kSPIR2MD::VecTyHint, MDNode::get(*Context, MetadataVec)); diff --git a/lib/SPIRV/SPIRVRegularizeLLVM.cpp b/lib/SPIRV/SPIRVRegularizeLLVM.cpp index 7a7822e95..b81ca006e 100644 --- a/lib/SPIRV/SPIRVRegularizeLLVM.cpp +++ b/lib/SPIRV/SPIRVRegularizeLLVM.cpp @@ -231,7 +231,7 @@ void SPIRVRegularizeLLVMBase::buildUMulWithOverflowFunc(Function *UMulFunc) { // umul.with.overflow intrinsic return a structure, where the first element // is the multiplication result, and the second is an overflow bit. auto *StructTy = UMulFunc->getReturnType(); - auto *Agg = Builder.CreateInsertValue(UndefValue::get(StructTy), Mul, {0}); + auto *Agg = Builder.CreateInsertValue(PoisonValue::get(StructTy), Mul, {0}); auto *Res = Builder.CreateInsertValue(Agg, Overflow, {1}); Builder.CreateRet(Res); } @@ -487,7 +487,7 @@ void regularizeWithOverflowInstrinsics(StringRef MangledName, CallInst *Call, Value *V2 = Builder.CreateICmpNE(V1, ConstZero); Type *StructI32I1Ty = StructType::create(Call->getContext(), {RetTy, V2->getType()}); - Value *Undef = UndefValue::get(StructI32I1Ty); + Value *Undef = PoisonValue::get(StructI32I1Ty); Value *V3 = Builder.CreateInsertValue(Undef, V0, {0}); Value *V4 = Builder.CreateInsertValue(V3, V2, {1}); SmallVector Users(Call->users()); @@ -749,7 +749,7 @@ bool SPIRVRegularizeLLVMBase::regularize() { IRBuilder<> Builder(Cmpxchg); auto *Cmp = Builder.CreateICmpEQ(Res, Comparator, "cmpxchg.success"); auto *V1 = Builder.CreateInsertValue( - UndefValue::get(Cmpxchg->getType()), Res, 0); + PoisonValue::get(Cmpxchg->getType()), Res, 0); auto *V2 = Builder.CreateInsertValue(V1, Cmp, 1, Cmpxchg->getName()); Cmpxchg->replaceAllUsesWith(V2); ToErase.push_back(Cmpxchg); diff --git a/lib/SPIRV/SPIRVToLLVMDbgTran.cpp b/lib/SPIRV/SPIRVToLLVMDbgTran.cpp index d6a847b8c..5392cc4db 100644 --- a/lib/SPIRV/SPIRVToLLVMDbgTran.cpp +++ b/lib/SPIRV/SPIRVToLLVMDbgTran.cpp @@ -330,7 +330,7 @@ DIType *SPIRVToLLVMDbgTran::transTypePointer(const SPIRVExtInst *DebugInst) { PointeeTy, BM->getAddressingModel() * 32, 0, AS); if (Flags & SPIRVDebug::FlagIsObjectPointer) - Ty = getDIBuilder(DebugInst).createObjectPointerType(Ty); + Ty = getDIBuilder(DebugInst).createObjectPointerType(Ty, /*Implicit=*/true); else if (Flags & SPIRVDebug::FlagIsArtificial) Ty = getDIBuilder(DebugInst).createArtificialType(Ty); diff --git a/lib/SPIRV/SPIRVToOCL.cpp b/lib/SPIRV/SPIRVToOCL.cpp index 16cce3891..61ffb8973 100644 --- a/lib/SPIRV/SPIRVToOCL.cpp +++ b/lib/SPIRV/SPIRVToOCL.cpp @@ -329,7 +329,7 @@ void SPIRVToOCLBase::visitCallSPIRVImageQuerySize(CallInst *CI) { assert(ImgQuerySizeRetEls == 2 && "OpImageQuerySize[Lod] must return <2 x iN> vector type"); GetImageSize = InsertElementInst::Create( - UndefValue::get(VecTy), GetImageSize, ConstantInt::get(Int32Ty, 0), + PoisonValue::get(VecTy), GetImageSize, ConstantInt::get(Int32Ty, 0), CI->getName(), CI->getIterator()); } else { // get_image_dim and OpImageQuerySize returns different vector @@ -340,7 +340,7 @@ void SPIRVToOCLBase::visitCallSPIRVImageQuerySize(CallInst *CI) { Constant *Mask = ConstantVector::get(MaskEls); GetImageSize = new ShuffleVectorInst( - GetImageSize, UndefValue::get(GetImageSize->getType()), Mask, + GetImageSize, PoisonValue::get(GetImageSize->getType()), Mask, CI->getName(), CI->getIterator()); } } @@ -782,7 +782,7 @@ void SPIRVToOCLBase::visitCallSPIRVImageSampleExplicitLodBuiltIn(CallInst *CI, if (CallSampledImg->hasOneUse()) { CallSampledImg->replaceAllUsesWith( - UndefValue::get(CallSampledImg->getType())); + PoisonValue::get(CallSampledImg->getType())); CallSampledImg->dropAllReferences(); CallSampledImg->eraseFromParent(); } @@ -874,7 +874,7 @@ void SPIRVToOCLBase::visitCallSPIRVAvcINTELEvaluateBuiltIn(CallInst *CI, auto EraseVmeImageCall = [](CallInst *CI) { if (CI->hasOneUse()) { - CI->replaceAllUsesWith(UndefValue::get(CI->getType())); + CI->replaceAllUsesWith(PoisonValue::get(CI->getType())); CI->dropAllReferences(); CI->eraseFromParent(); } diff --git a/lib/SPIRV/SPIRVUtil.cpp b/lib/SPIRV/SPIRVUtil.cpp index e6211d834..011d83075 100644 --- a/lib/SPIRV/SPIRVUtil.cpp +++ b/lib/SPIRV/SPIRVUtil.cpp @@ -1966,7 +1966,7 @@ bool isSPIRVBuiltinVariable(GlobalVariable *GV, // %d = extractelement <3 x i64> %b, i32 idx // With: // %0 = call spir_func i64 @_Z13get_global_idj(i32 0) #1 -// %1 = insertelement <3 x i64> undef, i64 %0, i32 0 +// %1 = insertelement <3 x i64> poison, i64 %0, i32 0 // %2 = call spir_func i64 @_Z13get_global_idj(i32 1) #1 // %3 = insertelement <3 x i64> %1, i64 %2, i32 1 // %4 = call spir_func i64 @_Z13get_global_idj(i32 2) #1 @@ -1981,7 +1981,7 @@ bool isSPIRVBuiltinVariable(GlobalVariable *GV, // %2 = load i64, i64 addrspace(4)* %1, align 32 // With: // %0 = call spir_func i64 @_Z13get_global_idj(i32 0) #1 -// %1 = insertelement <3 x i64> undef, i64 %0, i32 0 +// %1 = insertelement <3 x i64> poison, i64 %0, i32 0 // %2 = call spir_func i64 @_Z13get_global_idj(i32 1) #1 // %3 = insertelement <3 x i64> %1, i64 %2, i32 1 // %4 = call spir_func i64 @_Z13get_global_idj(i32 2) #1 @@ -2037,7 +2037,7 @@ static void replaceUsesOfBuiltinVar(Value *V, const APInt &AccumulatedOffset, if (!Index.isZero() || DL.getTypeSizeInBits(VecTy) != DL.getTypeSizeInBits(Load->getType())) llvm_unreachable("Illegal use of a SPIR-V builtin variable"); - Replacement = UndefValue::get(VecTy); + Replacement = PoisonValue::get(VecTy); for (unsigned I = 0; I < VecTy->getNumElements(); I++) { Replacement = Builder.CreateInsertElement( Replacement, diff --git a/test/DebugInfo/LocalAddressSpace.ll b/test/DebugInfo/LocalAddressSpace.ll index d6516d149..d8298c946 100644 --- a/test/DebugInfo/LocalAddressSpace.ll +++ b/test/DebugInfo/LocalAddressSpace.ll @@ -15,7 +15,7 @@ ; CHECK-SPIRV: Variable {{[0-9]+}} [[foo_a:[0-9]+]] ; CHECK-SPIRV: DebugGlobalVariable {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} [[foo_a]] -; CHECK-LLVM: @foo.a = internal addrspace(3) global i32 undef, align 4, !dbg ![[a_dbg_expr:[0-9]+]] +; CHECK-LLVM: @foo.a = internal addrspace(3) global i32 poison, align 4, !dbg ![[a_dbg_expr:[0-9]+]] ; CHECK-LLVM: ![[a_dbg_expr]] = !DIGlobalVariableExpression(var: ![[a_dbg_var:[0-9]+]], ; CHECK-LLVM: ![[a_dbg_var]] = distinct !DIGlobalVariable(name: "a" diff --git a/test/DebugInfo/X86/dwarf-public-names.ll b/test/DebugInfo/X86/dwarf-public-names.ll index 0895eb70e..bdf62ef1e 100644 --- a/test/DebugInfo/X86/dwarf-public-names.ll +++ b/test/DebugInfo/X86/dwarf-public-names.ll @@ -68,7 +68,7 @@ target triple = "spir64-unknown-unknown" ; Skip the output to the header of the pubnames section. ; LINUX: debug_pubnames -; LINUX-NEXT: unit_size = 0x0000012b +; LINUX-NEXT: unit_size = ; Check for each name in the output. ; LINUX-DAG: "ns" diff --git a/test/DebugInfo/builtin-get-global-id.ll b/test/DebugInfo/builtin-get-global-id.ll index 6f2d0bfe3..56e382413 100644 --- a/test/DebugInfo/builtin-get-global-id.ll +++ b/test/DebugInfo/builtin-get-global-id.ll @@ -28,7 +28,7 @@ entry: %gid = alloca i64, align 8 %call = call spir_func i64 @_Z13get_global_idj(i32 0) #2, !dbg !10 ; CHECK: [[I0:%[0-9]]] = call spir_func i64 @_Z13get_global_idj(i32 0) #1, !dbg [[DBG:![0-9]+]] -; CHECK-NEXT: [[I1:%[0-9]]] = insertelement <3 x i64> undef, i64 [[I0]], i32 0, !dbg [[DBG]] +; CHECK-NEXT: [[I1:%[0-9]]] = insertelement <3 x i64> poison, i64 [[I0]], i32 0, !dbg [[DBG]] ; CHECK-NEXT: [[I2:%[0-9]]] = call spir_func i64 @_Z13get_global_idj(i32 1) #1, !dbg [[DBG]] ; CHECK-NEXT: [[I3:%[0-9]]] = insertelement <3 x i64> [[I1]], i64 [[I2]], i32 1, !dbg [[DBG]] ; CHECK-NEXT: [[I4:%[0-9]]] = call spir_func i64 @_Z13get_global_idj(i32 2) #1, !dbg [[DBG]] diff --git a/test/OpDecorateString_UserSemantic.spvasm b/test/OpDecorateString_UserSemantic.spvasm index 4abe7f668..db73f93e2 100644 --- a/test/OpDecorateString_UserSemantic.spvasm +++ b/test/OpDecorateString_UserSemantic.spvasm @@ -18,7 +18,7 @@ ; the SPIR-V LLVM Translator and not rejected by spirv-val. OpDecorateString %temp UserSemantic "foo" ; CHECK: [[STR:@[0-9_.]+]] = {{.*}}foo -; CHECK: call void @llvm.var.annotation.p0.p0(ptr %{{.*}}, ptr [[STR]], ptr undef, i32 undef, ptr undef) +; CHECK: call void @llvm.var.annotation.p0.p0(ptr %{{.*}}, ptr [[STR]], ptr poison, i32 poison, ptr poison) %uint = OpTypeInt 32 0 %void = OpTypeVoid %kernel_sig = OpTypeFunction %void %uint diff --git a/test/OpMemberDecorateString_UserSemantic.spvasm b/test/OpMemberDecorateString_UserSemantic.spvasm index 542fd458a..78b44b716 100644 --- a/test/OpMemberDecorateString_UserSemantic.spvasm +++ b/test/OpMemberDecorateString_UserSemantic.spvasm @@ -18,7 +18,7 @@ ; CHECK: [[STR:@[0-9_.]+]] = {{.*}}foo ; Note: this is checking for an annotation on an instantiation of the structure, ; which is different than an annotation on the structure type. -; CHECK: call ptr @llvm.ptr.annotation.p0.p0(ptr %{{.*}}, ptr [[STR]], ptr undef, i32 undef, ptr undef) +; CHECK: call ptr @llvm.ptr.annotation.p0.p0(ptr %{{.*}}, ptr [[STR]], ptr poison, i32 poison, ptr poison) %uint = OpTypeInt 32 0 %uint_0 = OpConstant %uint 0 %void = OpTypeVoid diff --git a/test/extensions/INTEL/SPV_INTEL_fpga_buffer_location/FPGABufferLocation.ll b/test/extensions/INTEL/SPV_INTEL_fpga_buffer_location/FPGABufferLocation.ll index c2d2b00b6..0134c9f0b 100644 --- a/test/extensions/INTEL/SPV_INTEL_fpga_buffer_location/FPGABufferLocation.ll +++ b/test/extensions/INTEL/SPV_INTEL_fpga_buffer_location/FPGABufferLocation.ll @@ -76,7 +76,7 @@ entry: %b = load ptr addrspace(1), ptr addrspace(4) %arg_a.addr.ascast, align 8 %1 = addrspacecast ptr addrspace(1) %b to ptr addrspace(4) store ptr addrspace(4) %1, ptr addrspace(4) %0, align 8 -; CHECK-LLVM: %[[INTRINSIC_CALL:[[:alnum:].]+]] = call ptr addrspace(4) @llvm.ptr.annotation.p4.p0(ptr addrspace(4) %a, ptr @[[ANN_STR]], ptr undef, i32 undef, ptr undef) +; CHECK-LLVM: %[[INTRINSIC_CALL:[[:alnum:].]+]] = call ptr addrspace(4) @llvm.ptr.annotation.p4.p0(ptr addrspace(4) %a, ptr @[[ANN_STR]], ptr poison, i32 poison, ptr poison) ; CHECK-LLVM: %[[BITCAST_CALL1:[[:alnum:].]+]] = bitcast ptr addrspace(4) %[[INTRINSIC_CALL]] to ptr addrspace(4) ; CHECK-LLVM: %[[BITCAST_CALL2:[[:alnum:].]+]] = bitcast ptr addrspace(4) %[[BITCAST_CALL1]] to ptr addrspace(4) ; CHECK-LLVM: store ptr addrspace(4) %[[#]], ptr addrspace(4) %[[BITCAST_CALL2]], align 8 @@ -86,7 +86,7 @@ entry: %a.i = getelementptr inbounds %struct.MyIP, ptr addrspace(4) %this1.i, i32 0, i32 0 %2 = call ptr addrspace(4) @llvm.ptr.annotation.p4.p1(ptr addrspace(4) %a.i, ptr addrspace(1) getelementptr inbounds ([19 x i8], ptr addrspace(1) @.str.4, i32 0, i32 0), ptr addrspace(1) getelementptr inbounds ([9 x i8], ptr addrspace(1) @.str.1, i32 0, i32 0), i32 7, ptr addrspace(1) null) %3 = load ptr addrspace(4), ptr addrspace(4) %2, align 8 -; CHECK-LLVM: %[[INTRINSIC_CALL:[[:alnum:].]+]] = call ptr addrspace(4) @llvm.ptr.annotation.p4.p0(ptr addrspace(4) %a.i, ptr @[[ANN_STR]], ptr undef, i32 undef, ptr undef) +; CHECK-LLVM: %[[INTRINSIC_CALL:[[:alnum:].]+]] = call ptr addrspace(4) @llvm.ptr.annotation.p4.p0(ptr addrspace(4) %a.i, ptr @[[ANN_STR]], ptr poison, i32 poison, ptr poison) ; CHECK-LLVM: %[[BITCAST_CALL1:[[:alnum:].]+]] = bitcast ptr addrspace(4) %[[INTRINSIC_CALL]] to ptr addrspace(4) ; CHECK-LLVM: %[[BITCAST_CALL2:[[:alnum:].]+]] = bitcast ptr addrspace(4) %[[BITCAST_CALL1]] to ptr addrspace(4) ; CHECK-LLVM: load ptr addrspace(4), ptr addrspace(4) %[[BITCAST_CALL2]], align 8 @@ -109,7 +109,7 @@ entry: %a = getelementptr inbounds %struct.MyIP, ptr addrspace(4) %MyIP.ascast, i32 0, i32 0 %0 = call ptr addrspace(4) @llvm.ptr.annotation.p4.p1(ptr addrspace(4) %a, ptr addrspace(1) getelementptr inbounds ([19 x i8], ptr addrspace(1) @.str.4, i32 0, i32 0), ptr addrspace(1) getelementptr inbounds ([9 x i8], ptr addrspace(1) @.str.1, i32 0, i32 0), i32 7, ptr addrspace(1) null) call void @llvm.memcpy.p4.p0(ptr addrspace(4) %0, ptr %arg_b, i64 4, i1 false) -; CHECK-LLVM: %[[INTRINSIC_CALL:[[:alnum:].]+]] = call ptr addrspace(4) @llvm.ptr.annotation.p4.p0(ptr addrspace(4) %a, ptr @[[ANN_STR]], ptr undef, i32 undef, ptr undef) +; CHECK-LLVM: %[[INTRINSIC_CALL:[[:alnum:].]+]] = call ptr addrspace(4) @llvm.ptr.annotation.p4.p0(ptr addrspace(4) %a, ptr @[[ANN_STR]], ptr poison, i32 poison, ptr poison) ; CHECK-LLVM: %[[BITCAST:[[:alnum:].]+]] = bitcast ptr addrspace(4) %[[INTRINSIC_CALL]] to ptr addrspace(4) ; CHECK-LLVM: llvm.memcpy.p4.p0.i64(ptr addrspace(4) %[[BITCAST]], ptr %arg_b, i64 4, i1 false) ret void diff --git a/test/extensions/INTEL/SPV_INTEL_fpga_buffer_location/sycl-buffer-location-with-ptr-annotation.ll b/test/extensions/INTEL/SPV_INTEL_fpga_buffer_location/sycl-buffer-location-with-ptr-annotation.ll index 8d9b1eff9..afb5be772 100644 --- a/test/extensions/INTEL/SPV_INTEL_fpga_buffer_location/sycl-buffer-location-with-ptr-annotation.ll +++ b/test/extensions/INTEL/SPV_INTEL_fpga_buffer_location/sycl-buffer-location-with-ptr-annotation.ll @@ -17,7 +17,7 @@ ; CHECK-SPIRV: ReturnValue [[#Bitcast]] ; CHECK-LLVM: %[[#Load:]] = load ptr addrspace(4) -; CHECK-LLVM: %[[#Anno1:]] = call ptr addrspace(4) @llvm.ptr.annotation.p4.p0(ptr addrspace(4) %[[#Load]], ptr @0, ptr undef, i32 undef, ptr undef) +; CHECK-LLVM: %[[#Anno1:]] = call ptr addrspace(4) @llvm.ptr.annotation.p4.p0(ptr addrspace(4) %[[#Load]], ptr @0, ptr poison, i32 poison, ptr poison) ; CHECK-LLVM: ret ptr addrspace(4) %[[#Anno1]] ; CHECK-LLVM: %[[#GEP:]] = getelementptr inbounds %struct.MyIP diff --git a/test/extensions/INTEL/SPV_INTEL_fpga_latency_control/IntelFPGALatencyControl.ll b/test/extensions/INTEL/SPV_INTEL_fpga_latency_control/IntelFPGALatencyControl.ll index 929a34372..04a1781c7 100644 --- a/test/extensions/INTEL/SPV_INTEL_fpga_latency_control/IntelFPGALatencyControl.ll +++ b/test/extensions/INTEL/SPV_INTEL_fpga_latency_control/IntelFPGALatencyControl.ll @@ -43,14 +43,14 @@ entry: %4 = bitcast ptr %3 to ptr ; CHECK-LLVM: %[[#ANN_PTR1:]] = getelementptr inbounds %struct.__spirv_Something, ptr %[[#]], i32 0, i32 0 %5 = call ptr @llvm.ptr.annotation.p0.p1(ptr %4, ptr addrspace(1) @.str.9, ptr addrspace(1) @.str.1, i32 5, ptr addrspace(1) null) -; CHECK-LLVM: call ptr @llvm.ptr.annotation.p0.p0(ptr %[[#ANN_PTR1]], ptr @[[#ANN_STR1]], ptr undef, i32 undef, ptr undef) +; CHECK-LLVM: call ptr @llvm.ptr.annotation.p0.p0(ptr %[[#ANN_PTR1]], ptr @[[#ANN_STR1]], ptr poison, i32 poison, ptr poison) %6 = load i32, ptr %5, align 8 %7 = load ptr, ptr %1, align 8 %8 = getelementptr inbounds %struct.__spirv_Something, ptr %7, i32 0, i32 1 %9 = bitcast ptr %8 to ptr ; CHECK-LLVM: %[[#ANN_PTR2:]] = getelementptr inbounds %struct.__spirv_Something, ptr %[[#]], i32 0, i32 1 %10 = call ptr @llvm.ptr.annotation.p0.p1(ptr %9, ptr addrspace(1) @.str.10, ptr addrspace(1) @.str.1, i32 5, ptr addrspace(1) null) -; CHECK-LLVM: call ptr @llvm.ptr.annotation.p0.p0(ptr %[[#ANN_PTR2]], ptr @[[#ANN_STR2]], ptr undef, i32 undef, ptr undef) +; CHECK-LLVM: call ptr @llvm.ptr.annotation.p0.p0(ptr %[[#ANN_PTR2]], ptr @[[#ANN_STR2]], ptr poison, i32 poison, ptr poison) %11 = load i32, ptr %10, align 8 ret void } diff --git a/test/extensions/INTEL/SPV_INTEL_fpga_memory_accesses/fpga_lsu_function_call.ll b/test/extensions/INTEL/SPV_INTEL_fpga_memory_accesses/fpga_lsu_function_call.ll index 10a6b4b97..e4c5f65ae 100644 --- a/test/extensions/INTEL/SPV_INTEL_fpga_memory_accesses/fpga_lsu_function_call.ll +++ b/test/extensions/INTEL/SPV_INTEL_fpga_memory_accesses/fpga_lsu_function_call.ll @@ -12,7 +12,7 @@ ; CHECK-LLVM: [[#GV:]] = private unnamed_addr constant [11 x i8] c"{params:1}\00" ; CHECK-LLVM: %[[Call:[a-z0-9_.]+]] = call spir_func ptr addrspace(4) @accessor -; CHECK-LLVM: %[[#Ann:]] = call ptr addrspace(4) @llvm.ptr.annotation.p4.p0(ptr addrspace(4) %call, ptr @[[#GV]], ptr undef, i32 undef, ptr undef) +; CHECK-LLVM: %[[#Ann:]] = call ptr addrspace(4) @llvm.ptr.annotation.p4.p0(ptr addrspace(4) %call, ptr @[[#GV]], ptr poison, i32 poison, ptr poison) ; CHECK-LLVM: call spir_func ptr addrspace(4) @_ZN8MyStructaSERKS_(ptr addrspace(4) %[[#Ann]] ; ModuleID = 'test.bc' diff --git a/test/extensions/INTEL/SPV_INTEL_fpga_memory_attributes/IntelFPGAMemoryAttributesForVar.ll b/test/extensions/INTEL/SPV_INTEL_fpga_memory_attributes/IntelFPGAMemoryAttributesForVar.ll index ceb57eec1..36ac63309 100644 --- a/test/extensions/INTEL/SPV_INTEL_fpga_memory_attributes/IntelFPGAMemoryAttributesForVar.ll +++ b/test/extensions/INTEL/SPV_INTEL_fpga_memory_attributes/IntelFPGAMemoryAttributesForVar.ll @@ -55,21 +55,21 @@ target triple = "spir64-unknown-unknown" ; CHECK-LLVM: [[STRIDESIZE:@[0-9_.]+]] = {{.*}}{stride_size:4} ; CHECK-LLVM: [[WORDSIZE:@[0-9_.]+]] = {{.*}}{word_size:8} ; CHECK-LLVM: [[TRUE_DUAL_PORT:@[0-9_.]+]] = {{.*}}{true_dual_port} -; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[REGISTER]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[MEMORY]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[NUMBANKS]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[BANKWIDTH]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[MAX_PRIVATE_COPIES]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[SINGLEPUMP]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[DOUBLEPUMP]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[MAX_REPLICATES]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[SIMPLE_DUAL_PORT]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[MERGE]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[BANK_BITS]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[FORCE_POW_2_DEPTH]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STRIDESIZE]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[WORDSIZE]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[TRUE_DUAL_PORT]], ptr undef, i32 undef, ptr undef) +; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[REGISTER]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[MEMORY]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[NUMBANKS]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[BANKWIDTH]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[MAX_PRIVATE_COPIES]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[SINGLEPUMP]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[DOUBLEPUMP]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[MAX_REPLICATES]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[SIMPLE_DUAL_PORT]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[MERGE]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[BANK_BITS]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[FORCE_POW_2_DEPTH]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STRIDESIZE]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[WORDSIZE]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[TRUE_DUAL_PORT]], ptr poison, i32 poison, ptr poison) %"example_type" = type { i32 } diff --git a/test/extensions/KHR/SPV_KHR_untyped_pointers/untyped_var.spvasm b/test/extensions/KHR/SPV_KHR_untyped_pointers/untyped_var.spvasm index eadcface3..1757c8845 100644 --- a/test/extensions/KHR/SPV_KHR_untyped_pointers/untyped_var.spvasm +++ b/test/extensions/KHR/SPV_KHR_untyped_pointers/untyped_var.spvasm @@ -6,7 +6,7 @@ ; RUN: llvm-dis %t.rev.bc ; RUN: FileCheck < %t.rev.ll %s -; CHECK: @var = internal addrspace(3) global i32 undef +; CHECK: @var = internal addrspace(3) global i32 poison ; CHECK: call spir_func void @0(ptr addrspace(3) @var) OpCapability Addresses diff --git a/test/iaddcarry_builtin.ll b/test/iaddcarry_builtin.ll index 473f4f91e..d93ddeedf 100644 --- a/test/iaddcarry_builtin.ll +++ b/test/iaddcarry_builtin.ll @@ -61,7 +61,7 @@ define spir_func void @test_builtin_iaddcarrycc(i8 %a, i8 %b) { ; CHECK-LLVM: %2 = extractvalue { i8, i1 } %1, 0 ; CHECK-LLVM: %3 = extractvalue { i8, i1 } %1, 1 ; CHECK-LLVM: %4 = zext i1 %3 to i8 -; CHECK-LLVM: %5 = insertvalue { i8, i8 } undef, i8 %2, 0 +; CHECK-LLVM: %5 = insertvalue { i8, i8 } poison, i8 %2, 0 ; CHECK-LLVM: %6 = insertvalue { i8, i8 } %5, i8 %4, 1 ; CHECK-LLVM: store { i8, i8 } %6, ptr %0, align 1 ; CHECK-LLVM: ret void @@ -85,7 +85,7 @@ define spir_func void @test_builtin_iaddcarryss(i16 %a, i16 %b) { ; CHECK-LLVM: %2 = extractvalue { i16, i1 } %1, 0 ; CHECK-LLVM: %3 = extractvalue { i16, i1 } %1, 1 ; CHECK-LLVM: %4 = zext i1 %3 to i16 -; CHECK-LLVM: %5 = insertvalue { i16, i16 } undef, i16 %2, 0 +; CHECK-LLVM: %5 = insertvalue { i16, i16 } poison, i16 %2, 0 ; CHECK-LLVM: %6 = insertvalue { i16, i16 } %5, i16 %4, 1 ; CHECK-LLVM: store { i16, i16 } %6, ptr %0, align 2 ; CHECK-LLVM: ret void @@ -109,7 +109,7 @@ define spir_func void @test_builtin_iaddcarryii(i32 %a, i32 %b) { ; CHECK-LLVM: %2 = extractvalue { i32, i1 } %1, 0 ; CHECK-LLVM: %3 = extractvalue { i32, i1 } %1, 1 ; CHECK-LLVM: %4 = zext i1 %3 to i32 -; CHECK-LLVM: %5 = insertvalue { i32, i32 } undef, i32 %2, 0 +; CHECK-LLVM: %5 = insertvalue { i32, i32 } poison, i32 %2, 0 ; CHECK-LLVM: %6 = insertvalue { i32, i32 } %5, i32 %4, 1 ; CHECK-LLVM: store { i32, i32 } %6, ptr %0, align 4 ; CHECK-LLVM: ret void @@ -133,7 +133,7 @@ define spir_func void @test_builtin_iaddcarryll(i64 %a, i64 %b) { ; CHECK-LLVM: %2 = extractvalue { i64, i1 } %1, 0 ; CHECK-LLVM: %3 = extractvalue { i64, i1 } %1, 1 ; CHECK-LLVM: %4 = zext i1 %3 to i64 -; CHECK-LLVM: %5 = insertvalue { i64, i64 } undef, i64 %2, 0 +; CHECK-LLVM: %5 = insertvalue { i64, i64 } poison, i64 %2, 0 ; CHECK-LLVM: %6 = insertvalue { i64, i64 } %5, i64 %4, 1 ; CHECK-LLVM: store { i64, i64 } %6, ptr %0, align 8 ; CHECK-LLVM: ret void @@ -157,7 +157,7 @@ define spir_func void @test_builtin_iaddcarryDv4_xS_(<4 x i32> %a, <4 x i32> %b) ; CHECK-LLVM: %2 = extractvalue { <4 x i32>, <4 x i1> } %1, 0 ; CHECK-LLVM: %3 = extractvalue { <4 x i32>, <4 x i1> } %1, 1 ; CHECK-LLVM: %4 = zext <4 x i1> %3 to <4 x i32> -; CHECK-LLVM: %5 = insertvalue { <4 x i32>, <4 x i32> } undef, <4 x i32> %2, 0 +; CHECK-LLVM: %5 = insertvalue { <4 x i32>, <4 x i32> } poison, <4 x i32> %2, 0 ; CHECK-LLVM: %6 = insertvalue { <4 x i32>, <4 x i32> } %5, <4 x i32> %4, 1 ; CHECK-LLVM: store { <4 x i32>, <4 x i32> } %6, ptr %0, align 16 ; CHECK-LLVM: ret void @@ -185,7 +185,7 @@ define spir_func void @test_builtin_iaddcarry_anon(i32 %a, i32 %b) { ; CHECK-LLVM: %3 = extractvalue { i32, i1 } %2, 0 ; CHECK-LLVM: %4 = extractvalue { i32, i1 } %2, 1 ; CHECK-LLVM: %5 = zext i1 %4 to i32 -; CHECK-LLVM: %6 = insertvalue { i32, i32 } undef, i32 %3, 0 +; CHECK-LLVM: %6 = insertvalue { i32, i32 } poison, i32 %3, 0 ; CHECK-LLVM: %7 = insertvalue { i32, i32 } %6, i32 %5, 1 ; CHECK-LLVM: store { i32, i32 } %7, ptr addrspace(4) %1, align 4 ; CHECK-LLVM: ret void diff --git a/test/isubborrow_builtin.ll b/test/isubborrow_builtin.ll index c5a396d6a..c29d650fa 100644 --- a/test/isubborrow_builtin.ll +++ b/test/isubborrow_builtin.ll @@ -62,7 +62,7 @@ define spir_func void @test_builtin_isubborrowcc(i8 %a, i8 %b) { ; CHECK-LLVM: %2 = extractvalue { i8, i1 } %1, 0 ; CHECK-LLVM: %3 = extractvalue { i8, i1 } %1, 1 ; CHECK-LLVM: %4 = zext i1 %3 to i8 -; CHECK-LLVM: %5 = insertvalue { i8, i8 } undef, i8 %2, 0 +; CHECK-LLVM: %5 = insertvalue { i8, i8 } poison, i8 %2, 0 ; CHECK-LLVM: %6 = insertvalue { i8, i8 } %5, i8 %4, 1 ; CHECK-LLVM: store { i8, i8 } %6, ptr %0, align 1 ; CHECK-LLVM: ret void @@ -86,7 +86,7 @@ define spir_func void @test_builtin_isubborrowss(i16 %a, i16 %b) { ; CHECK-LLVM: %2 = extractvalue { i16, i1 } %1, 0 ; CHECK-LLVM: %3 = extractvalue { i16, i1 } %1, 1 ; CHECK-LLVM: %4 = zext i1 %3 to i16 -; CHECK-LLVM: %5 = insertvalue { i16, i16 } undef, i16 %2, 0 +; CHECK-LLVM: %5 = insertvalue { i16, i16 } poison, i16 %2, 0 ; CHECK-LLVM: %6 = insertvalue { i16, i16 } %5, i16 %4, 1 ; CHECK-LLVM: store { i16, i16 } %6, ptr %0, align 2 ; CHECK-LLVM: ret void @@ -110,7 +110,7 @@ define spir_func void @test_builtin_isubborrowii(i32 %a, i32 %b) { ; CHECK-LLVM: %2 = extractvalue { i32, i1 } %1, 0 ; CHECK-LLVM: %3 = extractvalue { i32, i1 } %1, 1 ; CHECK-LLVM: %4 = zext i1 %3 to i32 -; CHECK-LLVM: %5 = insertvalue { i32, i32 } undef, i32 %2, 0 +; CHECK-LLVM: %5 = insertvalue { i32, i32 } poison, i32 %2, 0 ; CHECK-LLVM: %6 = insertvalue { i32, i32 } %5, i32 %4, 1 ; CHECK-LLVM: store { i32, i32 } %6, ptr %0, align 4 ; CHECK-LLVM: ret void @@ -134,7 +134,7 @@ define spir_func void @test_builtin_isubborrowll(i64 %a, i64 %b) { ; CHECK-LLVM: %2 = extractvalue { i64, i1 } %1, 0 ; CHECK-LLVM: %3 = extractvalue { i64, i1 } %1, 1 ; CHECK-LLVM: %4 = zext i1 %3 to i64 -; CHECK-LLVM: %5 = insertvalue { i64, i64 } undef, i64 %2, 0 +; CHECK-LLVM: %5 = insertvalue { i64, i64 } poison, i64 %2, 0 ; CHECK-LLVM: %6 = insertvalue { i64, i64 } %5, i64 %4, 1 ; CHECK-LLVM: store { i64, i64 } %6, ptr %0, align 8 ; CHECK-LLVM: ret void @@ -158,7 +158,7 @@ define spir_func void @test_builtin_isubborrowDv4_xS_(<4 x i32> %a, <4 x i32> %b ; CHECK-LLVM: %2 = extractvalue { <4 x i32>, <4 x i1> } %1, 0 ; CHECK-LLVM: %3 = extractvalue { <4 x i32>, <4 x i1> } %1, 1 ; CHECK-LLVM: %4 = zext <4 x i1> %3 to <4 x i32> -; CHECK-LLVM: %5 = insertvalue { <4 x i32>, <4 x i32> } undef, <4 x i32> %2, 0 +; CHECK-LLVM: %5 = insertvalue { <4 x i32>, <4 x i32> } poison, <4 x i32> %2, 0 ; CHECK-LLVM: %6 = insertvalue { <4 x i32>, <4 x i32> } %5, <4 x i32> %4, 1 ; CHECK-LLVM: store { <4 x i32>, <4 x i32> } %6, ptr %0, align 16 ; CHECK-LLVM: ret void @@ -185,7 +185,7 @@ define spir_func void @test_builtin_isubborrow_anon(i32 %a, i32 %b) { ; CHECK-LLVM: %3 = extractvalue { i32, i1 } %2, 0 ; CHECK-LLVM: %4 = extractvalue { i32, i1 } %2, 1 ; CHECK-LLVM: %5 = zext i1 %4 to i32 -; CHECK-LLVM: %6 = insertvalue { i32, i32 } undef, i32 %3, 0 +; CHECK-LLVM: %6 = insertvalue { i32, i32 } poison, i32 %3, 0 ; CHECK-LLVM: %7 = insertvalue { i32, i32 } %6, i32 %5, 1 ; CHECK-LLVM: store { i32, i32 } %7, ptr addrspace(4) %1, align 4 ; CHECK-LLVM: ret void diff --git a/test/llvm-intrinsics/uadd.with.overflow.ll b/test/llvm-intrinsics/uadd.with.overflow.ll index 43aa1b848..0a8abef81 100644 --- a/test/llvm-intrinsics/uadd.with.overflow.ll +++ b/test/llvm-intrinsics/uadd.with.overflow.ll @@ -77,7 +77,7 @@ entry: ; CHECK-LLVM: %2 = extractvalue { i16, i1 } %1, 0 ; CHECK-LLVM: %3 = extractvalue { i16, i1 } %1, 1 ; CHECK-LLVM: %4 = zext i1 %3 to i16 -; CHECK-LLVM: %5 = insertvalue { i16, i16 } undef, i16 %2, 0 +; CHECK-LLVM: %5 = insertvalue { i16, i16 } poison, i16 %2, 0 ; CHECK-LLVM: %6 = insertvalue { i16, i16 } %5, i16 %4, 1 ; CHECK-LLVM: store { i16, i16 } %6, ptr %0, align 2 ; CHECK-LLVM: %7 = load %structtype, ptr %0, align 2 @@ -119,7 +119,7 @@ entry: ; CHECK-LLVM: %2 = extractvalue { i32, i1 } %1, 0 ; CHECK-LLVM: %3 = extractvalue { i32, i1 } %1, 1 ; CHECK-LLVM: %4 = zext i1 %3 to i32 -; CHECK-LLVM: %5 = insertvalue { i32, i32 } undef, i32 %2, 0 +; CHECK-LLVM: %5 = insertvalue { i32, i32 } poison, i32 %2, 0 ; CHECK-LLVM: %6 = insertvalue { i32, i32 } %5, i32 %4, 1 ; CHECK-LLVM: store { i32, i32 } %6, ptr %0, align 4 ; CHECK-LLVM: %7 = load [[structtype_1]], ptr %0, align 4 @@ -160,7 +160,7 @@ entry: ; CHECK-LLVM: %2 = extractvalue { i64, i1 } %1, 0 ; CHECK-LLVM: %3 = extractvalue { i64, i1 } %1, 1 ; CHECK-LLVM: %4 = zext i1 %3 to i64 -; CHECK-LLVM: %5 = insertvalue { i64, i64 } undef, i64 %2, 0 +; CHECK-LLVM: %5 = insertvalue { i64, i64 } poison, i64 %2, 0 ; CHECK-LLVM: %6 = insertvalue { i64, i64 } %5, i64 %4, 1 ; CHECK-LLVM: store { i64, i64 } %6, ptr %0, align 8 ; CHECK-LLVM: %7 = load [[structtype_3]], ptr %0, align 4 @@ -201,7 +201,7 @@ entry: ; CHECK-LLVM: %2 = extractvalue { <4 x i32>, <4 x i1> } %1, 0 ; CHECK-LLVM: %3 = extractvalue { <4 x i32>, <4 x i1> } %1, 1 ; CHECK-LLVM: %4 = zext <4 x i1> %3 to <4 x i32> -; CHECK-LLVM: %5 = insertvalue { <4 x i32>, <4 x i32> } undef, <4 x i32> %2, 0 +; CHECK-LLVM: %5 = insertvalue { <4 x i32>, <4 x i32> } poison, <4 x i32> %2, 0 ; CHECK-LLVM: %6 = insertvalue { <4 x i32>, <4 x i32> } %5, <4 x i32> %4, 1 ; CHECK-LLVM: store { <4 x i32>, <4 x i32> } %6, ptr %0, align 16 ; CHECK-LLVM: %7 = load [[structtype_5]], ptr %0, align 16 diff --git a/test/llvm-intrinsics/usub.with.overflow.ll b/test/llvm-intrinsics/usub.with.overflow.ll index 81f0f001a..ebfe007c3 100644 --- a/test/llvm-intrinsics/usub.with.overflow.ll +++ b/test/llvm-intrinsics/usub.with.overflow.ll @@ -77,7 +77,7 @@ entry: ; CHECK-LLVM: %2 = extractvalue { i16, i1 } %1, 0 ; CHECK-LLVM: %3 = extractvalue { i16, i1 } %1, 1 ; CHECK-LLVM: %4 = zext i1 %3 to i16 -; CHECK-LLVM: %5 = insertvalue { i16, i16 } undef, i16 %2, 0 +; CHECK-LLVM: %5 = insertvalue { i16, i16 } poison, i16 %2, 0 ; CHECK-LLVM: %6 = insertvalue { i16, i16 } %5, i16 %4, 1 ; CHECK-LLVM: store { i16, i16 } %6, ptr %0, align 2 ; CHECK-LLVM: %7 = load %structtype, ptr %0, align 2 @@ -119,7 +119,7 @@ entry: ; CHECK-LLVM: %2 = extractvalue { i32, i1 } %1, 0 ; CHECK-LLVM: %3 = extractvalue { i32, i1 } %1, 1 ; CHECK-LLVM: %4 = zext i1 %3 to i32 -; CHECK-LLVM: %5 = insertvalue { i32, i32 } undef, i32 %2, 0 +; CHECK-LLVM: %5 = insertvalue { i32, i32 } poison, i32 %2, 0 ; CHECK-LLVM: %6 = insertvalue { i32, i32 } %5, i32 %4, 1 ; CHECK-LLVM: store { i32, i32 } %6, ptr %0, align 4 ; CHECK-LLVM: %7 = load [[structtype_1]], ptr %0, align 4 @@ -160,7 +160,7 @@ entry: ; CHECK-LLVM: %2 = extractvalue { i64, i1 } %1, 0 ; CHECK-LLVM: %3 = extractvalue { i64, i1 } %1, 1 ; CHECK-LLVM: %4 = zext i1 %3 to i64 -; CHECK-LLVM: %5 = insertvalue { i64, i64 } undef, i64 %2, 0 +; CHECK-LLVM: %5 = insertvalue { i64, i64 } poison, i64 %2, 0 ; CHECK-LLVM: %6 = insertvalue { i64, i64 } %5, i64 %4, 1 ; CHECK-LLVM: store { i64, i64 } %6, ptr %0, align 8 ; CHECK-LLVM: %7 = load [[structtype_3]], ptr %0, align 4 @@ -201,7 +201,7 @@ entry: ; CHECK-LLVM: %2 = extractvalue { <4 x i32>, <4 x i1> } %1, 0 ; CHECK-LLVM: %3 = extractvalue { <4 x i32>, <4 x i1> } %1, 1 ; CHECK-LLVM: %4 = zext <4 x i1> %3 to <4 x i32> -; CHECK-LLVM: %5 = insertvalue { <4 x i32>, <4 x i32> } undef, <4 x i32> %2, 0 +; CHECK-LLVM: %5 = insertvalue { <4 x i32>, <4 x i32> } poison, <4 x i32> %2, 0 ; CHECK-LLVM: %6 = insertvalue { <4 x i32>, <4 x i32> } %5, <4 x i32> %4, 1 ; CHECK-LLVM: store { <4 x i32>, <4 x i32> } %6, ptr %0, align 16 ; CHECK-LLVM: %7 = load [[structtype_5]], ptr %0, align 16 diff --git a/test/matrix_times_matrix.spt b/test/matrix_times_matrix.spt index 106d93296..19a0e471f 100644 --- a/test/matrix_times_matrix.spt +++ b/test/matrix_times_matrix.spt @@ -65,7 +65,7 @@ ; CHECK-LLVM: %17 = extractvalue [4 x <4 x float>] %1, 3 ; CHECK-LLVM: %18 = fmul <4 x float> %.splat6, %17 ; CHECK-LLVM: %19 = fadd <4 x float> %15, %18 -; CHECK-LLVM: %20 = insertvalue [4 x <4 x float>] undef, <4 x float> %19, 0 +; CHECK-LLVM: %20 = insertvalue [4 x <4 x float>] poison, <4 x float> %19, 0 ; CHECK-LLVM: %21 = extractvalue [4 x <4 x float>] %2, 1 ; CHECK-LLVM: %22 = extractelement <4 x float> %21, i32 0 ; CHECK-LLVM: %.splatinsert7 = insertelement <4 x float> poison, float %22, i64 0 diff --git a/test/matrix_times_scalar.spt b/test/matrix_times_scalar.spt index ceb2a7f48..80d52c6ea 100644 --- a/test/matrix_times_scalar.spt +++ b/test/matrix_times_scalar.spt @@ -9,7 +9,7 @@ ; CHECK-LLVM: %3 = shufflevector <4 x float> %.splatinsert, <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-LLVM: %4 = extractvalue [4 x <4 x float>] %1, 0 ; CHECK-LLVM: %5 = fmul <4 x float> %4, %3 -; CHECK-LLVM: %6 = insertvalue [4 x <4 x float>] undef, <4 x float> %5, 0 +; CHECK-LLVM: %6 = insertvalue [4 x <4 x float>] poison, <4 x float> %5, 0 ; CHECK-LLVM: %7 = extractvalue [4 x <4 x float>] %1, 1 ; CHECK-LLVM: %8 = fmul <4 x float> %7, %3 ; CHECK-LLVM: %9 = insertvalue [4 x <4 x float>] %6, <4 x float> %8, 1 diff --git a/test/matrix_transpose.spt b/test/matrix_transpose.spt index a6ac35af9..8c32d8369 100644 --- a/test/matrix_transpose.spt +++ b/test/matrix_transpose.spt @@ -11,7 +11,7 @@ ; CHECK-LLVM: %6 = shufflevector <4 x float> %2, <4 x float> %3, <2 x i32> ; CHECK-LLVM: %7 = shufflevector <4 x float> %4, <4 x float> %5, <2 x i32> ; CHECK-LLVM: %8 = shufflevector <2 x float> %6, <2 x float> %7, <4 x i32> -; CHECK-LLVM: %9 = insertvalue [4 x <4 x float>] undef, <4 x float> %8, 0 +; CHECK-LLVM: %9 = insertvalue [4 x <4 x float>] poison, <4 x float> %8, 0 ; CHECK-LLVM: %10 = shufflevector <4 x float> %2, <4 x float> %3, <2 x i32> ; CHECK-LLVM: %11 = shufflevector <4 x float> %4, <4 x float> %5, <2 x i32> ; CHECK-LLVM: %12 = shufflevector <2 x float> %10, <2 x float> %11, <4 x i32> @@ -30,7 +30,7 @@ ; CHECK-LLVM: %23 = extractvalue [2 x <2 x float>] %22, 0 ; CHECK-LLVM: %24 = extractvalue [2 x <2 x float>] %22, 1 ; CHECK-LLVM: %25 = shufflevector <2 x float> %23, <2 x float> %24, <2 x i32> -; CHECK-LLVM: %26 = insertvalue [2 x <2 x float>] undef, <2 x float> %25, 0 +; CHECK-LLVM: %26 = insertvalue [2 x <2 x float>] poison, <2 x float> %25, 0 ; CHECK-LLVM: %27 = shufflevector <2 x float> %23, <2 x float> %24, <2 x i32> ; CHECK-LLVM: %28 = insertvalue [2 x <2 x float>] %26, <2 x float> %27, 1 ; CHECK-LLVM: store [2 x <2 x float>] %28, ptr %res2 @@ -40,21 +40,21 @@ ; CHECK-LLVM: %31 = extractvalue [3 x <3 x float>] %29, 1 ; CHECK-LLVM: %32 = extractvalue [3 x <3 x float>] %29, 2 ; CHECK-LLVM: %33 = extractelement <3 x float> %30, i32 0 -; CHECK-LLVM: %34 = insertelement <3 x float> undef, float %33, i64 0 +; CHECK-LLVM: %34 = insertelement <3 x float> poison, float %33, i64 0 ; CHECK-LLVM: %35 = extractelement <3 x float> %31, i32 0 ; CHECK-LLVM: %36 = insertelement <3 x float> %34, float %35, i64 1 ; CHECK-LLVM: %37 = extractelement <3 x float> %32, i32 0 ; CHECK-LLVM: %38 = insertelement <3 x float> %36, float %37, i64 2 -; CHECK-LLVM: %39 = insertvalue [3 x <3 x float>] undef, <3 x float> %38, 0 +; CHECK-LLVM: %39 = insertvalue [3 x <3 x float>] poison, <3 x float> %38, 0 ; CHECK-LLVM: %40 = extractelement <3 x float> %30, i32 1 -; CHECK-LLVM: %41 = insertelement <3 x float> undef, float %40, i64 0 +; CHECK-LLVM: %41 = insertelement <3 x float> poison, float %40, i64 0 ; CHECK-LLVM: %42 = extractelement <3 x float> %31, i32 1 ; CHECK-LLVM: %43 = insertelement <3 x float> %41, float %42, i64 1 ; CHECK-LLVM: %44 = extractelement <3 x float> %32, i32 1 ; CHECK-LLVM: %45 = insertelement <3 x float> %43, float %44, i64 2 ; CHECK-LLVM: %46 = insertvalue [3 x <3 x float>] %39, <3 x float> %45, 1 ; CHECK-LLVM: %47 = extractelement <3 x float> %30, i32 2 -; CHECK-LLVM: %48 = insertelement <3 x float> undef, float %47, i64 0 +; CHECK-LLVM: %48 = insertelement <3 x float> poison, float %47, i64 0 ; CHECK-LLVM: %49 = extractelement <3 x float> %31, i32 2 ; CHECK-LLVM: %50 = insertelement <3 x float> %48, float %49, i64 1 ; CHECK-LLVM: %51 = extractelement <3 x float> %32, i32 2 @@ -68,16 +68,16 @@ ; CHECK-LLVM: %57 = extractvalue [4 x <3 x float>] %54, 2 ; CHECK-LLVM: %58 = extractvalue [4 x <3 x float>] %54, 3 ; CHECK-LLVM: %59 = extractelement <3 x float> %55, i32 0 -; CHECK-LLVM: %60 = insertelement <4 x float> undef, float %59, i64 0 +; CHECK-LLVM: %60 = insertelement <4 x float> poison, float %59, i64 0 ; CHECK-LLVM: %61 = extractelement <3 x float> %56, i32 0 ; CHECK-LLVM: %62 = insertelement <4 x float> %60, float %61, i64 1 ; CHECK-LLVM: %63 = extractelement <3 x float> %57, i32 0 ; CHECK-LLVM: %64 = insertelement <4 x float> %62, float %63, i64 2 ; CHECK-LLVM: %65 = extractelement <3 x float> %58, i32 0 ; CHECK-LLVM: %66 = insertelement <4 x float> %64, float %65, i64 3 -; CHECK-LLVM: %67 = insertvalue [3 x <4 x float>] undef, <4 x float> %66, 0 +; CHECK-LLVM: %67 = insertvalue [3 x <4 x float>] poison, <4 x float> %66, 0 ; CHECK-LLVM: %68 = extractelement <3 x float> %55, i32 1 -; CHECK-LLVM: %69 = insertelement <4 x float> undef, float %68, i64 0 +; CHECK-LLVM: %69 = insertelement <4 x float> poison, float %68, i64 0 ; CHECK-LLVM: %70 = extractelement <3 x float> %56, i32 1 ; CHECK-LLVM: %71 = insertelement <4 x float> %69, float %70, i64 1 ; CHECK-LLVM: %72 = extractelement <3 x float> %57, i32 1 @@ -86,7 +86,7 @@ ; CHECK-LLVM: %75 = insertelement <4 x float> %73, float %74, i64 3 ; CHECK-LLVM: %76 = insertvalue [3 x <4 x float>] %67, <4 x float> %75, 1 ; CHECK-LLVM: %77 = extractelement <3 x float> %55, i32 2 -; CHECK-LLVM: %78 = insertelement <4 x float> undef, float %77, i64 0 +; CHECK-LLVM: %78 = insertelement <4 x float> poison, float %77, i64 0 ; CHECK-LLVM: %79 = extractelement <3 x float> %56, i32 2 ; CHECK-LLVM: %80 = insertelement <4 x float> %78, float %79, i64 1 ; CHECK-LLVM: %81 = extractelement <3 x float> %57, i32 2 diff --git a/test/transcoding/GlobalFunAnnotate.ll b/test/transcoding/GlobalFunAnnotate.ll index be52f5175..dfd680270 100644 --- a/test/transcoding/GlobalFunAnnotate.ll +++ b/test/transcoding/GlobalFunAnnotate.ll @@ -7,7 +7,7 @@ ;CHECK-SPIRV: Decorate {{[0-9]+}} UserSemantic "annotation_on_function" ;CHECK-LLVM: @0 = private unnamed_addr constant [23 x i8] c"annotation_on_function\00", section "llvm.metadata" -;CHECK-LLVM: @llvm.global.annotations = appending global [1 x { ptr, ptr, ptr, i32, ptr }] [{ ptr, ptr, ptr, i32, ptr } { ptr @foo, ptr @0, ptr undef, i32 undef, ptr undef }], section "llvm.metadata" +;CHECK-LLVM: @llvm.global.annotations = appending global [1 x { ptr, ptr, ptr, i32, ptr }] [{ ptr, ptr, ptr, i32, ptr } { ptr @foo, ptr @0, ptr poison, i32 poison, ptr poison }], section "llvm.metadata" target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64" target triple = "spir64-unknown-linux" diff --git a/test/transcoding/OpVariable_Initializer.ll b/test/transcoding/OpVariable_Initializer.ll index 212b9aaf3..c64e2f395 100644 --- a/test/transcoding/OpVariable_Initializer.ll +++ b/test/transcoding/OpVariable_Initializer.ll @@ -6,7 +6,7 @@ ; RUN: amd-llvm-spirv -r %t.spv -o %t.rev.bc ; RUN: llvm-dis < %t.rev.bc | FileCheck %s --check-prefix=CHECK-LLVM -; CHECK-LLVM: @test_atomic_fn.L = internal addrspace(3) global [64 x i32] undef, align 4 +; CHECK-LLVM: @test_atomic_fn.L = internal addrspace(3) global [64 x i32] poison, align 4 ; CHECK-SPIRV-NOT: undef ; CHECK-SPIRV: 4 TypePointer [[PtrT:[0-9]+]] 4 diff --git a/test/transcoding/addrspace_global_annotations.ll b/test/transcoding/addrspace_global_annotations.ll index 6234690c4..dab0020e9 100644 --- a/test/transcoding/addrspace_global_annotations.ll +++ b/test/transcoding/addrspace_global_annotations.ll @@ -15,7 +15,7 @@ target triple = "spir64-unknown-unknown" %class.test = type { %"class.test_private" } %"class.test_private" = type { i16 } -; CHECK: @llvm.global.annotations = appending global [2 x { ptr, ptr, ptr, i32, ptr }] [{ ptr, ptr, ptr, i32, ptr } { ptr addrspacecast (ptr addrspace(1) @samples to ptr), ptr @0, ptr undef, i32 undef, ptr undef }, { ptr, ptr, ptr, i32, ptr } { ptr addrspacecast (ptr addrspace(2) @foo to ptr), ptr @1, ptr undef, i32 undef, ptr undef }] +; CHECK: @llvm.global.annotations = appending global [2 x { ptr, ptr, ptr, i32, ptr }] [{ ptr, ptr, ptr, i32, ptr } { ptr addrspacecast (ptr addrspace(1) @samples to ptr), ptr @0, ptr poison, i32 poison, ptr poison }, { ptr, ptr, ptr, i32, ptr } { ptr addrspacecast (ptr addrspace(2) @foo to ptr), ptr @1, ptr poison, i32 poison, ptr poison }] @llvm.global.annotations = addrspace(1) global [2 x { ptr addrspace(1), ptr addrspace(1), ptr addrspace(1), i32, ptr addrspace(1) }] [ { ptr addrspace(1), ptr addrspace(1), ptr addrspace(1), i32, ptr addrspace(1) } { ptr addrspace(1) @samples, ptr addrspace(1) @.str, ptr addrspace(1) null, i32 92, ptr addrspace(1) null }, { ptr addrspace(1), ptr addrspace(1), ptr addrspace(1), i32, ptr addrspace(1) } { ptr addrspace(1) addrspacecast (ptr addrspace(2) @foo to ptr addrspace(1)), ptr addrspace(1) @.str.2, ptr addrspace(1) null, i32 30, ptr addrspace(1) null }] @samples = external addrspace(1) global { [64 x %class.test] } diff --git a/test/transcoding/annotate_attribute.ll b/test/transcoding/annotate_attribute.ll index 1b2546fc5..a154aedec 100644 --- a/test/transcoding/annotate_attribute.ll +++ b/test/transcoding/annotate_attribute.ll @@ -109,17 +109,17 @@ entry: %var_three = alloca i8, align 1 %var_four = alloca i8, align 1 call void @llvm.lifetime.start.p0(i64 4, ptr %var_one) #4 - ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{.*}}, ptr [[STR]], ptr undef, i32 undef, ptr undef) + ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{.*}}, ptr [[STR]], ptr poison, i32 poison, ptr poison) call void @llvm.var.annotation(ptr %var_one, ptr addrspace(1) @.str, ptr addrspace(1) @.str.1, i32 2, ptr addrspace(1) undef) call void @llvm.lifetime.start.p0(i64 4, ptr %var_two) #4 - ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{.*}}, ptr [[STR2]], ptr undef, i32 undef, ptr undef) + ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{.*}}, ptr [[STR2]], ptr poison, i32 poison, ptr poison) call void @llvm.var.annotation(ptr %var_two, ptr addrspace(1) @.str.2, ptr addrspace(1) @.str.1, i32 3, ptr addrspace(1) undef) call void @llvm.lifetime.start.p0(i64 1, ptr %var_three) #4 - ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{.*}}, ptr [[STR3]], ptr undef, i32 undef, ptr undef) + ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{.*}}, ptr [[STR3]], ptr poison, i32 poison, ptr poison) call void @llvm.var.annotation(ptr %var_three, ptr addrspace(1) @.str.3, ptr addrspace(1) @.str.1, i32 4, ptr addrspace(1) undef) call void @llvm.lifetime.end.p0(i64 1, ptr %var_three) #4 call void @llvm.lifetime.start.p0(i64 1, ptr %var_four) #4 - ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{.*}}, ptr [[STR7]], ptr undef, i32 undef, ptr undef) + ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{.*}}, ptr [[STR7]], ptr poison, i32 poison, ptr poison) call void @llvm.var.annotation(ptr %var_four, ptr addrspace(1) @.str.7, ptr addrspace(1) @.str.1, i32 4, ptr addrspace(1) @.args.0) call void @llvm.lifetime.end.p0(i64 1, ptr %var_four) #4 call void @llvm.lifetime.end.p0(i64 4, ptr %var_two) #4 @@ -212,7 +212,7 @@ define weak_odr dso_local spir_kernel void @_ZTSZ11TestKernelAvE4MyIP(ptr addrsp %4 = call ptr addrspace(4) @llvm.ptr.annotation.p4.p1(ptr addrspace(4) %3, ptr addrspace(1) @.str.11, ptr addrspace(1) @.str.1.12, i32 13, ptr addrspace(1) @.args) ; CHECK-LLVM: %[[ALLOCA:.*]] = alloca %struct.MyIP, align 8 ; CHECK-LLVM: %[[ASCAST:.*]] = addrspacecast ptr %[[ALLOCA]] to ptr addrspace(4) - ; CHECK-LLVM: call void @llvm.var.annotation{{.*}}(ptr addrspace(4) %[[ASCAST]], ptr [[STR12]], ptr undef, i32 undef, ptr undef) + ; CHECK-LLVM: call void @llvm.var.annotation{{.*}}(ptr addrspace(4) %[[ASCAST]], ptr [[STR12]], ptr poison, i32 poison, ptr poison) %5 = addrspacecast ptr addrspace(1) %0 to ptr addrspace(4) store ptr addrspace(4) %5, ptr addrspace(4) %4, align 8, !tbaa !17 %6 = load ptr addrspace(4), ptr addrspace(4) %4, align 8, !tbaa !17 diff --git a/test/transcoding/builtin_vars_arithmetics.ll b/test/transcoding/builtin_vars_arithmetics.ll index 5bb553dbc..15efb5789 100644 --- a/test/transcoding/builtin_vars_arithmetics.ll +++ b/test/transcoding/builtin_vars_arithmetics.ll @@ -49,7 +49,7 @@ ; CHECK-LLVM-NOT: load <3 x i64> ; CHECK-LLVM-OCL: %[[Id0:[0-9]+]] = call spir_func i64 @_Z13get_global_idj(i32 0) #1 ; CHECK-LLVM-SPV: %[[Id0:[0-9]+]] = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0) #1 -; CHECK-LLVM: %[[FirstVec:[0-9]+]] = insertelement <3 x i64> undef, i64 %[[Id0]], i32 0 +; CHECK-LLVM: %[[FirstVec:[0-9]+]] = insertelement <3 x i64> poison, i64 %[[Id0]], i32 0 ; CHECK-LLVM-OCL: %[[Id1:[0-9]+]] = call spir_func i64 @_Z13get_global_idj(i32 1) #1 ; CHECK-LLVM-SPV: %[[Id1:[0-9]+]] = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 1) #1 ; CHECK-LLVM: %[[SecondVec:[0-9]+]] = insertelement <3 x i64> %[[FirstVec]], i64 %[[Id1]], i32 1 @@ -64,7 +64,7 @@ ; CHECK-LLVM-NOT: load <3 x i64> ; CHECK-LLVM-OCL: %[[GOffset0:[0-9]+]] = call spir_func i64 @_Z17get_global_offsetj(i32 0) #1 ; CHECK-LLVM-SPV: %[[GOffset0:[0-9]+]] = call spir_func i64 @_Z25__spirv_BuiltInGlobalSizei(i32 0) #1 -; CHECK-LLVM: %[[FirstVec2:[0-9]+]] = insertelement <3 x i64> undef, i64 %[[GOffset0]], i32 0 +; CHECK-LLVM: %[[FirstVec2:[0-9]+]] = insertelement <3 x i64> poison, i64 %[[GOffset0]], i32 0 ; CHECK-LLVM-OCL: %[[GOffset1:[0-9]+]] = call spir_func i64 @_Z17get_global_offsetj(i32 1) #1 ; CHECK-LLVM-SPV: %[[GOffset1:[0-9]+]] = call spir_func i64 @_Z25__spirv_BuiltInGlobalSizei(i32 1) #1 ; CHECK-LLVM: %[[SecondVec2:[0-9]+]] = insertelement <3 x i64> %[[FirstVec2]], i64 %[[GOffset1]], i32 1 diff --git a/test/transcoding/builtin_vars_different_type.ll b/test/transcoding/builtin_vars_different_type.ll index d1072b62b..2f877b748 100644 --- a/test/transcoding/builtin_vars_different_type.ll +++ b/test/transcoding/builtin_vars_different_type.ll @@ -16,7 +16,7 @@ entry: %2 = add i32 5, %1 ret void ; CHECK-SPV-IR: %[[#ID0:]] = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 0) #1 -; CHECK-SPV-IR: %[[#ID1:]] = insertelement <3 x i64> undef, i64 %[[#ID0]], i32 0 +; CHECK-SPV-IR: %[[#ID1:]] = insertelement <3 x i64> poison, i64 %[[#ID0]], i32 0 ; CHECK-SPV-IR: %[[#ID2:]] = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 1) #1 ; CHECK-SPV-IR: %[[#ID3:]] = insertelement <3 x i64> %[[#ID1]], i64 %[[#ID2]], i32 1 ; CHECK-SPV-IR: %[[#ID4:]] = call spir_func i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 2) #1 diff --git a/test/transcoding/multiple_user_semantic.ll b/test/transcoding/multiple_user_semantic.ll index 0f3ff5b89..1ec7e5d51 100644 --- a/test/transcoding/multiple_user_semantic.ll +++ b/test/transcoding/multiple_user_semantic.ll @@ -36,10 +36,10 @@ ; CHECK-LLVM: %[[#StructMember:]] = alloca %class.Sample, align 4 ; CHECK-LLVM: %[[#Var:]] = alloca i32, align 4 ; CHECK-LLVM-DAG: %[[#GEP1:]] = getelementptr inbounds %class.Sample, ptr %[[#StructMember]], i32 0, i32 0 -; CHECK-LLVM-DAG: %[[#PtrAnn1:]] = call ptr @llvm.ptr.annotation.p0.p0(ptr %[[#GEP1:]], ptr @[[StrStructA]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM-DAG: %[[#PtrAnn2:]] = call ptr @llvm.ptr.annotation.p0.p0(ptr %[[#PtrAnn1]], ptr @[[StrStructB]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM-DAG: call void @llvm.var.annotation.p0.p0(ptr %[[#Var]], ptr @[[StrA]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM-DAG: call void @llvm.var.annotation.p0.p0(ptr %[[#Var]], ptr @[[StrB]], ptr undef, i32 undef, ptr undef) +; CHECK-LLVM-DAG: %[[#PtrAnn1:]] = call ptr @llvm.ptr.annotation.p0.p0(ptr %[[#GEP1:]], ptr @[[StrStructA]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM-DAG: %[[#PtrAnn2:]] = call ptr @llvm.ptr.annotation.p0.p0(ptr %[[#PtrAnn1]], ptr @[[StrStructB]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM-DAG: call void @llvm.var.annotation.p0.p0(ptr %[[#Var]], ptr @[[StrA]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM-DAG: call void @llvm.var.annotation.p0.p0(ptr %[[#Var]], ptr @[[StrB]], ptr poison, i32 poison, ptr poison) source_filename = "llvm-link" target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64" diff --git a/test/transcoding/multiple_user_semantic_nonopaque.ll b/test/transcoding/multiple_user_semantic_nonopaque.ll index 64432fdbc..b02e7d016 100644 --- a/test/transcoding/multiple_user_semantic_nonopaque.ll +++ b/test/transcoding/multiple_user_semantic_nonopaque.ll @@ -33,11 +33,11 @@ ; CHECK-LLVM-DAG: @[[StrStructA:[0-9_.]+]] = {{.*}}"class_annotation_a\00" ; CHECK-LLVM-DAG: @[[StrStructB:[0-9_.]+]] = {{.*}}"class_annotation_b\00" ; CHECK-LLVM: [[#Var:]] = alloca i32, align 4 -; CHECK-LLVM: call void @llvm.var.annotation{{.*}}(ptr %[[#Var]], ptr @[[StrA]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM: call void @llvm.var.annotation{{.*}}(ptr %[[#Var]], ptr @[[StrB]], ptr undef, i32 undef, ptr undef) +; CHECK-LLVM: call void @llvm.var.annotation{{.*}}(ptr %[[#Var]], ptr @[[StrA]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM: call void @llvm.var.annotation{{.*}}(ptr %[[#Var]], ptr @[[StrB]], ptr poison, i32 poison, ptr poison) ; CHECK-LLVM: %[[#StructMember:]] = alloca %class.Sample, align 4 -; CHECK-LLVM: call void @llvm.var.annotation{{.*}}(ptr %[[#StructMember]], ptr @[[StrStructA]], ptr undef, i32 undef, ptr undef) -; CHECK-LLVM: call void @llvm.var.annotation{{.*}}(ptr %[[#StructMember]], ptr @[[StrStructB]], ptr undef, i32 undef, ptr undef) +; CHECK-LLVM: call void @llvm.var.annotation{{.*}}(ptr %[[#StructMember]], ptr @[[StrStructA]], ptr poison, i32 poison, ptr poison) +; CHECK-LLVM: call void @llvm.var.annotation{{.*}}(ptr %[[#StructMember]], ptr @[[StrStructB]], ptr poison, i32 poison, ptr poison) source_filename = "llvm-link" diff --git a/test/transcoding/registerallocmode.ll b/test/transcoding/registerallocmode.ll index 4b5b0f71c..11cab51df 100644 --- a/test/transcoding/registerallocmode.ll +++ b/test/transcoding/registerallocmode.ll @@ -23,7 +23,7 @@ ; CHECK-LLVM: @[[FLAG4:[0-9]+]] = private unnamed_addr constant [20 x i8] c"num-thread-per-eu 8\00", section "llvm.metadata" ; CHECK-LLVM: @[[FLAG5:[0-9]+]] = private unnamed_addr constant [20 x i8] c"num-thread-per-eu 0\00", section "llvm.metadata" -; CHECK-LLVM: @llvm.global.annotations = appending global [6 x { ptr, ptr, ptr, i32, ptr }] [{ ptr, ptr, ptr, i32, ptr } { ptr @main_l3, ptr @[[FLAG0]], ptr undef, i32 undef, ptr undef }, { ptr, ptr, ptr, i32, ptr } { ptr @main_l6, ptr @[[FLAG1]], ptr undef, i32 undef, ptr undef }, { ptr, ptr, ptr, i32, ptr } { ptr @main_l9, ptr @[[FLAG2]], ptr undef, i32 undef, ptr undef }, { ptr, ptr, ptr, i32, ptr } { ptr @main_l3, ptr @[[FLAG3]], ptr undef, i32 undef, ptr undef }, { ptr, ptr, ptr, i32, ptr } { ptr @main_l6, ptr @[[FLAG4]], ptr undef, i32 undef, ptr undef }, { ptr, ptr, ptr, i32, ptr } { ptr @main_l9, ptr @[[FLAG5]], ptr undef, i32 undef, ptr undef }], section "llvm.metadata" +; CHECK-LLVM: @llvm.global.annotations = appending global [6 x { ptr, ptr, ptr, i32, ptr }] [{ ptr, ptr, ptr, i32, ptr } { ptr @main_l3, ptr @[[FLAG0]], ptr poison, i32 poison, ptr poison }, { ptr, ptr, ptr, i32, ptr } { ptr @main_l6, ptr @[[FLAG1]], ptr poison, i32 poison, ptr poison }, { ptr, ptr, ptr, i32, ptr } { ptr @main_l9, ptr @[[FLAG2]], ptr poison, i32 poison, ptr poison }, { ptr, ptr, ptr, i32, ptr } { ptr @main_l3, ptr @[[FLAG3]], ptr poison, i32 poison, ptr poison }, { ptr, ptr, ptr, i32, ptr } { ptr @main_l6, ptr @[[FLAG4]], ptr poison, i32 poison, ptr poison }, { ptr, ptr, ptr, i32, ptr } { ptr @main_l9, ptr @[[FLAG5]], ptr poison, i32 poison, ptr poison }], section "llvm.metadata" target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64" target triple = "spir64" diff --git a/test/transcoding/vec_type_hint.cl b/test/transcoding/vec_type_hint.cl index bbc91ff4f..9b87230b1 100644 --- a/test/transcoding/vec_type_hint.cl +++ b/test/transcoding/vec_type_hint.cl @@ -39,7 +39,7 @@ void test_int() {} // CHECK-SPIRV: {{[0-9]+}} ExecutionMode {{[0-9]+}} 30 {{[0-9]+}} // CHECK-SPIRV: {{[0-9]+}} ExecutionMode {{[0-9]+}} 30 {{[0-9]+}} -// CHECK-LLVM: [[VFLOAT]] = !{<4 x float> undef, i32 1} -// CHECK-LLVM: [[VDOUBLE]] = !{double undef, i32 1} -// CHECK-LLVM: [[VUINT]] = !{<4 x i32> undef, i32 1} -// CHECK-LLVM: [[VINT]] = !{<8 x i32> undef, i32 1} +// CHECK-LLVM: [[VFLOAT]] = !{<4 x float> poison, i32 1} +// CHECK-LLVM: [[VDOUBLE]] = !{double poison, i32 1} +// CHECK-LLVM: [[VUINT]] = !{<4 x i32> poison, i32 1} +// CHECK-LLVM: [[VINT]] = !{<8 x i32> poison, i32 1} diff --git a/test/var_undef.ll b/test/var_undef.ll index d89d5ba50..757980bf4 100644 --- a/test/var_undef.ll +++ b/test/var_undef.ll @@ -9,12 +9,16 @@ ; RUN: llvm-dis %t.rev.bc -o %t.rev.ll ; RUN: FileCheck < %t.rev.ll %s --check-prefix CHECK-LLVM -; CHECK-SPIRV:Name [[BAR_VAR:[0-9]+]] "bar" +; CHECK-SPIRV: Name [[FOO_VAR:[0-9]+]] "foo" +; CHECK-SPIRV: Name [[BAR_VAR:[0-9]+]] "bar" +;; foo variable has optional initializer (OpUndef) +; CHECK-SPIRV: 5 Variable [[#]] [[FOO_VAR]] ;; bar variable does not have optional initializer ;; word count must be 4 -; CHECK-SPIRV:4 Variable [[#]] [[BAR_VAR]] +; CHECK-SPIRV: 4 Variable [[#]] [[BAR_VAR]] -; CHECK-LLVM:@bar = internal addrspace(3) global %range undef, align 8 +; CHECK-LLVM: @foo = internal addrspace(3) global %anon undef, align 8 +; CHECK-LLVM: @bar = internal addrspace(3) global %range poison, align 8 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64" target triple = "spir64-unknown-unknown" diff --git a/test/vector_times_matrix.spt b/test/vector_times_matrix.spt index d6638a523..b0ea21d42 100644 --- a/test/vector_times_matrix.spt +++ b/test/vector_times_matrix.spt @@ -45,7 +45,7 @@ ; CHECK-LLVM: %.splat = shufflevector <4 x float> %.splatinsert, <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-LLVM: %4 = extractvalue [4 x <4 x float>] %2, 0 ; CHECK-LLVM: %5 = extractelement <4 x float> %4, i32 0 -; CHECK-LLVM: %6 = insertelement <4 x float> undef, float %5, i32 0 +; CHECK-LLVM: %6 = insertelement <4 x float> poison, float %5, i32 0 ; CHECK-LLVM: %7 = extractvalue [4 x <4 x float>] %2, 1 ; CHECK-LLVM: %8 = extractelement <4 x float> %7, i32 0 ; CHECK-LLVM: %9 = insertelement <4 x float> %6, float %8, i32 1 @@ -62,7 +62,7 @@ ; CHECK-LLVM: %.splat2 = shufflevector <4 x float> %.splatinsert1, <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-LLVM: %19 = extractvalue [4 x <4 x float>] %2, 0 ; CHECK-LLVM: %20 = extractelement <4 x float> %19, i32 1 -; CHECK-LLVM: %21 = insertelement <4 x float> undef, float %20, i32 0 +; CHECK-LLVM: %21 = insertelement <4 x float> poison, float %20, i32 0 ; CHECK-LLVM: %22 = extractvalue [4 x <4 x float>] %2, 1 ; CHECK-LLVM: %23 = extractelement <4 x float> %22, i32 1 ; CHECK-LLVM: %24 = insertelement <4 x float> %21, float %23, i32 1 @@ -79,7 +79,7 @@ ; CHECK-LLVM: %.splat4 = shufflevector <4 x float> %.splatinsert3, <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-LLVM: %34 = extractvalue [4 x <4 x float>] %2, 0 ; CHECK-LLVM: %35 = extractelement <4 x float> %34, i32 2 -; CHECK-LLVM: %36 = insertelement <4 x float> undef, float %35, i32 0 +; CHECK-LLVM: %36 = insertelement <4 x float> poison, float %35, i32 0 ; CHECK-LLVM: %37 = extractvalue [4 x <4 x float>] %2, 1 ; CHECK-LLVM: %38 = extractelement <4 x float> %37, i32 2 ; CHECK-LLVM: %39 = insertelement <4 x float> %36, float %38, i32 1 @@ -96,7 +96,7 @@ ; CHECK-LLVM: %.splat6 = shufflevector <4 x float> %.splatinsert5, <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-LLVM: %49 = extractvalue [4 x <4 x float>] %2, 0 ; CHECK-LLVM: %50 = extractelement <4 x float> %49, i32 3 -; CHECK-LLVM: %51 = insertelement <4 x float> undef, float %50, i32 0 +; CHECK-LLVM: %51 = insertelement <4 x float> poison, float %50, i32 0 ; CHECK-LLVM: %52 = extractvalue [4 x <4 x float>] %2, 1 ; CHECK-LLVM: %53 = extractelement <4 x float> %52, i32 3 ; CHECK-LLVM: %54 = insertelement <4 x float> %51, float %53, i32 1