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I have issued a pull request for a script that creates a set of basic logic gates. It is run by running "script" in the Logic directory.
The gates follow the IEEE recommended drawing and are scaled to 1/4 size. I will also be adding more primitives in this scale and 1/6 and 1/8 as well.
These parts should be generated and added to the IC library
John Eaton
The text was updated successfully, but these errors were encountered:
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I have issued a pull request for a script that creates a set of basic logic gates. It is run by running "script" in the Logic directory.
The gates follow the IEEE recommended drawing and are scaled to 1/4 size. I will also be adding more primitives in this scale and 1/6 and 1/8 as well.
These parts should be generated and added to the IC library
John Eaton
The text was updated successfully, but these errors were encountered: