From ce256a38bc87d2f648bf385017cb201b527c01d8 Mon Sep 17 00:00:00 2001 From: "Sidorov, Dmitry" Date: Wed, 25 Sep 2024 06:18:24 -0700 Subject: [PATCH] Also add INTEL extension for tooling Signed-off-by: Sidorov, Dmitry --- include/spirv/unified1/spirv.bf | 2 ++ include/spirv/unified1/spirv.core.grammar.json | 18 ++++++++++++++++++ include/spirv/unified1/spirv.cs | 2 ++ include/spirv/unified1/spirv.h | 2 ++ include/spirv/unified1/spirv.hpp | 2 ++ include/spirv/unified1/spirv.hpp11 | 2 ++ include/spirv/unified1/spirv.json | 2 ++ include/spirv/unified1/spirv.lua | 2 ++ include/spirv/unified1/spirv.py | 2 ++ include/spirv/unified1/spv.d | 2 ++ 10 files changed, 36 insertions(+) diff --git a/include/spirv/unified1/spirv.bf b/include/spirv/unified1/spirv.bf index 7a337d30a..1d29fe570 100644 --- a/include/spirv/unified1/spirv.bf +++ b/include/spirv/unified1/spirv.bf @@ -1262,6 +1262,7 @@ namespace Spv BFloat16ConversionINTEL = 6115, SplitBarrierINTEL = 6141, ArithmeticFenceEXT = 6144, + ArithmeticFenceINTEL = 6144, FPGAClusterAttributesV2INTEL = 6150, FPGAKernelAttributesv2INTEL = 6161, FPMaxErrorINTEL = 6169, @@ -2227,6 +2228,7 @@ namespace Spv OpControlBarrierArriveINTEL = 6142, OpControlBarrierWaitINTEL = 6143, OpArithmeticFenceEXT = 6145, + OpArithmeticFenceINTEL = 6145, OpSubgroupBlockPrefetchINTEL = 6221, OpGroupIMulKHR = 6401, OpGroupFMulKHR = 6402, diff --git a/include/spirv/unified1/spirv.core.grammar.json b/include/spirv/unified1/spirv.core.grammar.json index f6164751a..e3bdb8b4a 100644 --- a/include/spirv/unified1/spirv.core.grammar.json +++ b/include/spirv/unified1/spirv.core.grammar.json @@ -9932,6 +9932,18 @@ "capabilities" : [ "ArithmeticFenceEXT" ], "version" : "None" }, + { + "opname" : "OpArithmeticFenceINTEL", + "class" : "Miscellaneous", + "opcode" : 6145, + "operands" : [ + { "kind" : "IdResultType" }, + { "kind" : "IdResult" }, + { "kind" : "IdRef", "name" : "'Target '" } + ], + "capabilities" : [ "ArithmeticFenceINTEL" ], + "version" : "None" + }, { "opname" : "OpSubgroupBlockPrefetchINTEL", "class" : "Group", @@ -16759,6 +16771,12 @@ "extensions" : [ "SPV_EXT_arithmetic_fence" ], "version" : "None" }, + { + "enumerant" : "ArithmeticFenceINTEL", + "value" : 6144, + "extensions" : [ "SPV_INTEL_arithmetic_fence" ], + "version" : "None" + }, { "enumerant" : "FPGAClusterAttributesV2INTEL", "value" : 6150, diff --git a/include/spirv/unified1/spirv.cs b/include/spirv/unified1/spirv.cs index 1ec4356fe..36a286377 100644 --- a/include/spirv/unified1/spirv.cs +++ b/include/spirv/unified1/spirv.cs @@ -1261,6 +1261,7 @@ public enum Capability BFloat16ConversionINTEL = 6115, SplitBarrierINTEL = 6141, ArithmeticFenceEXT = 6144, + ArithmeticFenceINTEL = 6144, FPGAClusterAttributesV2INTEL = 6150, FPGAKernelAttributesv2INTEL = 6161, FPMaxErrorINTEL = 6169, @@ -2226,6 +2227,7 @@ public enum Op OpControlBarrierArriveINTEL = 6142, OpControlBarrierWaitINTEL = 6143, OpArithmeticFenceEXT = 6145, + OpArithmeticFenceINTEL = 6145, OpSubgroupBlockPrefetchINTEL = 6221, OpGroupIMulKHR = 6401, OpGroupFMulKHR = 6402, diff --git a/include/spirv/unified1/spirv.h b/include/spirv/unified1/spirv.h index 231a7a4a8..9a7d987ce 100644 --- a/include/spirv/unified1/spirv.h +++ b/include/spirv/unified1/spirv.h @@ -1232,6 +1232,7 @@ typedef enum SpvCapability_ { SpvCapabilityBFloat16ConversionINTEL = 6115, SpvCapabilitySplitBarrierINTEL = 6141, SpvCapabilityArithmeticFenceEXT = 6144, + SpvCapabilityArithmeticFenceINTEL = 6144, SpvCapabilityFPGAClusterAttributesV2INTEL = 6150, SpvCapabilityFPGAKernelAttributesv2INTEL = 6161, SpvCapabilityFPMaxErrorINTEL = 6169, @@ -2172,6 +2173,7 @@ typedef enum SpvOp_ { SpvOpControlBarrierArriveINTEL = 6142, SpvOpControlBarrierWaitINTEL = 6143, SpvOpArithmeticFenceEXT = 6145, + SpvOpArithmeticFenceINTEL = 6145, SpvOpSubgroupBlockPrefetchINTEL = 6221, SpvOpGroupIMulKHR = 6401, SpvOpGroupFMulKHR = 6402, diff --git a/include/spirv/unified1/spirv.hpp b/include/spirv/unified1/spirv.hpp index 197160001..fe17e7e7c 100644 --- a/include/spirv/unified1/spirv.hpp +++ b/include/spirv/unified1/spirv.hpp @@ -1228,6 +1228,7 @@ enum Capability { CapabilityBFloat16ConversionINTEL = 6115, CapabilitySplitBarrierINTEL = 6141, CapabilityArithmeticFenceEXT = 6144, + CapabilityArithmeticFenceINTEL = 6144, CapabilityFPGAClusterAttributesV2INTEL = 6150, CapabilityFPGAKernelAttributesv2INTEL = 6161, CapabilityFPMaxErrorINTEL = 6169, @@ -2168,6 +2169,7 @@ enum Op { OpControlBarrierArriveINTEL = 6142, OpControlBarrierWaitINTEL = 6143, OpArithmeticFenceEXT = 6145, + OpArithmeticFenceINTEL = 6145, OpSubgroupBlockPrefetchINTEL = 6221, OpGroupIMulKHR = 6401, OpGroupFMulKHR = 6402, diff --git a/include/spirv/unified1/spirv.hpp11 b/include/spirv/unified1/spirv.hpp11 index 5a545081d..89d63b273 100644 --- a/include/spirv/unified1/spirv.hpp11 +++ b/include/spirv/unified1/spirv.hpp11 @@ -1228,6 +1228,7 @@ enum class Capability : unsigned { BFloat16ConversionINTEL = 6115, SplitBarrierINTEL = 6141, ArithmeticFenceEXT = 6144, + ArithmeticFenceINTEL = 6144, FPGAClusterAttributesV2INTEL = 6150, FPGAKernelAttributesv2INTEL = 6161, FPMaxErrorINTEL = 6169, @@ -2168,6 +2169,7 @@ enum class Op : unsigned { OpControlBarrierArriveINTEL = 6142, OpControlBarrierWaitINTEL = 6143, OpArithmeticFenceEXT = 6145, + OpArithmeticFenceINTEL = 6145, OpSubgroupBlockPrefetchINTEL = 6221, OpGroupIMulKHR = 6401, OpGroupFMulKHR = 6402, diff --git a/include/spirv/unified1/spirv.json b/include/spirv/unified1/spirv.json index 842c38c5d..81d485b4a 100644 --- a/include/spirv/unified1/spirv.json +++ b/include/spirv/unified1/spirv.json @@ -1205,6 +1205,7 @@ "BFloat16ConversionINTEL": 6115, "SplitBarrierINTEL": 6141, "ArithmeticFenceEXT": 6144, + "ArithmeticFenceINTEL": 6144, "FPGAClusterAttributesV2INTEL": 6150, "FPGAKernelAttributesv2INTEL": 6161, "FPMaxErrorINTEL": 6169, @@ -2170,6 +2171,7 @@ "OpControlBarrierArriveINTEL": 6142, "OpControlBarrierWaitINTEL": 6143, "OpArithmeticFenceEXT": 6145, + "OpArithmeticFenceINTEL": 6145, "OpSubgroupBlockPrefetchINTEL": 6221, "OpGroupIMulKHR": 6401, "OpGroupFMulKHR": 6402, diff --git a/include/spirv/unified1/spirv.lua b/include/spirv/unified1/spirv.lua index 8b79343ef..bc9a29574 100644 --- a/include/spirv/unified1/spirv.lua +++ b/include/spirv/unified1/spirv.lua @@ -1219,6 +1219,7 @@ spv = { BFloat16ConversionINTEL = 6115, SplitBarrierINTEL = 6141, ArithmeticFenceEXT = 6144, + ArithmeticFenceINTEL = 6144, FPGAClusterAttributesV2INTEL = 6150, FPGAKernelAttributesv2INTEL = 6161, FPMaxErrorINTEL = 6169, @@ -2159,6 +2160,7 @@ spv = { OpControlBarrierArriveINTEL = 6142, OpControlBarrierWaitINTEL = 6143, OpArithmeticFenceEXT = 6145, + OpArithmeticFenceINTEL = 6145, OpSubgroupBlockPrefetchINTEL = 6221, OpGroupIMulKHR = 6401, OpGroupFMulKHR = 6402, diff --git a/include/spirv/unified1/spirv.py b/include/spirv/unified1/spirv.py index 8bdcd8458..e178cc613 100644 --- a/include/spirv/unified1/spirv.py +++ b/include/spirv/unified1/spirv.py @@ -1190,6 +1190,7 @@ 'BFloat16ConversionINTEL' : 6115, 'SplitBarrierINTEL' : 6141, 'ArithmeticFenceEXT' : 6144, + 'ArithmeticFenceINTEL' : 6144, 'FPGAClusterAttributesV2INTEL' : 6150, 'FPGAKernelAttributesv2INTEL' : 6161, 'FPMaxErrorINTEL' : 6169, @@ -2109,6 +2110,7 @@ 'OpControlBarrierArriveINTEL' : 6142, 'OpControlBarrierWaitINTEL' : 6143, 'OpArithmeticFenceEXT' : 6145, + 'OpArithmeticFenceINTEL' : 6145, 'OpSubgroupBlockPrefetchINTEL' : 6221, 'OpGroupIMulKHR' : 6401, 'OpGroupFMulKHR' : 6402, diff --git a/include/spirv/unified1/spv.d b/include/spirv/unified1/spv.d index e94e8cd0e..5eda89605 100644 --- a/include/spirv/unified1/spv.d +++ b/include/spirv/unified1/spv.d @@ -1264,6 +1264,7 @@ enum Capability : uint BFloat16ConversionINTEL = 6115, SplitBarrierINTEL = 6141, ArithmeticFenceEXT = 6144, + ArithmeticFenceINTEL = 6144, FPGAClusterAttributesV2INTEL = 6150, FPGAKernelAttributesv2INTEL = 6161, FPMaxErrorINTEL = 6169, @@ -2229,6 +2230,7 @@ enum Op : uint OpControlBarrierArriveINTEL = 6142, OpControlBarrierWaitINTEL = 6143, OpArithmeticFenceEXT = 6145, + OpArithmeticFenceINTEL = 6145, OpSubgroupBlockPrefetchINTEL = 6221, OpGroupIMulKHR = 6401, OpGroupFMulKHR = 6402,