diff --git a/include/spirv/unified1/spirv.bf b/include/spirv/unified1/spirv.bf index 1d29fe570..7a337d30a 100644 --- a/include/spirv/unified1/spirv.bf +++ b/include/spirv/unified1/spirv.bf @@ -1262,7 +1262,6 @@ namespace Spv BFloat16ConversionINTEL = 6115, SplitBarrierINTEL = 6141, ArithmeticFenceEXT = 6144, - ArithmeticFenceINTEL = 6144, FPGAClusterAttributesV2INTEL = 6150, FPGAKernelAttributesv2INTEL = 6161, FPMaxErrorINTEL = 6169, @@ -2228,7 +2227,6 @@ namespace Spv OpControlBarrierArriveINTEL = 6142, OpControlBarrierWaitINTEL = 6143, OpArithmeticFenceEXT = 6145, - OpArithmeticFenceINTEL = 6145, OpSubgroupBlockPrefetchINTEL = 6221, OpGroupIMulKHR = 6401, OpGroupFMulKHR = 6402, diff --git a/include/spirv/unified1/spirv.core.grammar.json b/include/spirv/unified1/spirv.core.grammar.json index e3bdb8b4a..f6164751a 100644 --- a/include/spirv/unified1/spirv.core.grammar.json +++ b/include/spirv/unified1/spirv.core.grammar.json @@ -9932,18 +9932,6 @@ "capabilities" : [ "ArithmeticFenceEXT" ], "version" : "None" }, - { - "opname" : "OpArithmeticFenceINTEL", - "class" : "Miscellaneous", - "opcode" : 6145, - "operands" : [ - { "kind" : "IdResultType" }, - { "kind" : "IdResult" }, - { "kind" : "IdRef", "name" : "'Target '" } - ], - "capabilities" : [ "ArithmeticFenceINTEL" ], - "version" : "None" - }, { "opname" : "OpSubgroupBlockPrefetchINTEL", "class" : "Group", @@ -16771,12 +16759,6 @@ "extensions" : [ "SPV_EXT_arithmetic_fence" ], "version" : "None" }, - { - "enumerant" : "ArithmeticFenceINTEL", - "value" : 6144, - "extensions" : [ "SPV_INTEL_arithmetic_fence" ], - "version" : "None" - }, { "enumerant" : "FPGAClusterAttributesV2INTEL", "value" : 6150, diff --git a/include/spirv/unified1/spirv.cs b/include/spirv/unified1/spirv.cs index 36a286377..1ec4356fe 100644 --- a/include/spirv/unified1/spirv.cs +++ b/include/spirv/unified1/spirv.cs @@ -1261,7 +1261,6 @@ public enum Capability BFloat16ConversionINTEL = 6115, SplitBarrierINTEL = 6141, ArithmeticFenceEXT = 6144, - ArithmeticFenceINTEL = 6144, FPGAClusterAttributesV2INTEL = 6150, FPGAKernelAttributesv2INTEL = 6161, FPMaxErrorINTEL = 6169, @@ -2227,7 +2226,6 @@ public enum Op OpControlBarrierArriveINTEL = 6142, OpControlBarrierWaitINTEL = 6143, OpArithmeticFenceEXT = 6145, - OpArithmeticFenceINTEL = 6145, OpSubgroupBlockPrefetchINTEL = 6221, OpGroupIMulKHR = 6401, OpGroupFMulKHR = 6402, diff --git a/include/spirv/unified1/spirv.h b/include/spirv/unified1/spirv.h index 9a7d987ce..231a7a4a8 100644 --- a/include/spirv/unified1/spirv.h +++ b/include/spirv/unified1/spirv.h @@ -1232,7 +1232,6 @@ typedef enum SpvCapability_ { SpvCapabilityBFloat16ConversionINTEL = 6115, SpvCapabilitySplitBarrierINTEL = 6141, SpvCapabilityArithmeticFenceEXT = 6144, - SpvCapabilityArithmeticFenceINTEL = 6144, SpvCapabilityFPGAClusterAttributesV2INTEL = 6150, SpvCapabilityFPGAKernelAttributesv2INTEL = 6161, SpvCapabilityFPMaxErrorINTEL = 6169, @@ -2173,7 +2172,6 @@ typedef enum SpvOp_ { SpvOpControlBarrierArriveINTEL = 6142, SpvOpControlBarrierWaitINTEL = 6143, SpvOpArithmeticFenceEXT = 6145, - SpvOpArithmeticFenceINTEL = 6145, SpvOpSubgroupBlockPrefetchINTEL = 6221, SpvOpGroupIMulKHR = 6401, SpvOpGroupFMulKHR = 6402, diff --git a/include/spirv/unified1/spirv.hpp b/include/spirv/unified1/spirv.hpp index fe17e7e7c..197160001 100644 --- a/include/spirv/unified1/spirv.hpp +++ b/include/spirv/unified1/spirv.hpp @@ -1228,7 +1228,6 @@ enum Capability { CapabilityBFloat16ConversionINTEL = 6115, CapabilitySplitBarrierINTEL = 6141, CapabilityArithmeticFenceEXT = 6144, - CapabilityArithmeticFenceINTEL = 6144, CapabilityFPGAClusterAttributesV2INTEL = 6150, CapabilityFPGAKernelAttributesv2INTEL = 6161, CapabilityFPMaxErrorINTEL = 6169, @@ -2169,7 +2168,6 @@ enum Op { OpControlBarrierArriveINTEL = 6142, OpControlBarrierWaitINTEL = 6143, OpArithmeticFenceEXT = 6145, - OpArithmeticFenceINTEL = 6145, OpSubgroupBlockPrefetchINTEL = 6221, OpGroupIMulKHR = 6401, OpGroupFMulKHR = 6402, diff --git a/include/spirv/unified1/spirv.hpp11 b/include/spirv/unified1/spirv.hpp11 index 89d63b273..5a545081d 100644 --- a/include/spirv/unified1/spirv.hpp11 +++ b/include/spirv/unified1/spirv.hpp11 @@ -1228,7 +1228,6 @@ enum class Capability : unsigned { BFloat16ConversionINTEL = 6115, SplitBarrierINTEL = 6141, ArithmeticFenceEXT = 6144, - ArithmeticFenceINTEL = 6144, FPGAClusterAttributesV2INTEL = 6150, FPGAKernelAttributesv2INTEL = 6161, FPMaxErrorINTEL = 6169, @@ -2169,7 +2168,6 @@ enum class Op : unsigned { OpControlBarrierArriveINTEL = 6142, OpControlBarrierWaitINTEL = 6143, OpArithmeticFenceEXT = 6145, - OpArithmeticFenceINTEL = 6145, OpSubgroupBlockPrefetchINTEL = 6221, OpGroupIMulKHR = 6401, OpGroupFMulKHR = 6402, diff --git a/include/spirv/unified1/spirv.json b/include/spirv/unified1/spirv.json index 81d485b4a..842c38c5d 100644 --- a/include/spirv/unified1/spirv.json +++ b/include/spirv/unified1/spirv.json @@ -1205,7 +1205,6 @@ "BFloat16ConversionINTEL": 6115, "SplitBarrierINTEL": 6141, "ArithmeticFenceEXT": 6144, - "ArithmeticFenceINTEL": 6144, "FPGAClusterAttributesV2INTEL": 6150, "FPGAKernelAttributesv2INTEL": 6161, "FPMaxErrorINTEL": 6169, @@ -2171,7 +2170,6 @@ "OpControlBarrierArriveINTEL": 6142, "OpControlBarrierWaitINTEL": 6143, "OpArithmeticFenceEXT": 6145, - "OpArithmeticFenceINTEL": 6145, "OpSubgroupBlockPrefetchINTEL": 6221, "OpGroupIMulKHR": 6401, "OpGroupFMulKHR": 6402, diff --git a/include/spirv/unified1/spirv.lua b/include/spirv/unified1/spirv.lua index bc9a29574..8b79343ef 100644 --- a/include/spirv/unified1/spirv.lua +++ b/include/spirv/unified1/spirv.lua @@ -1219,7 +1219,6 @@ spv = { BFloat16ConversionINTEL = 6115, SplitBarrierINTEL = 6141, ArithmeticFenceEXT = 6144, - ArithmeticFenceINTEL = 6144, FPGAClusterAttributesV2INTEL = 6150, FPGAKernelAttributesv2INTEL = 6161, FPMaxErrorINTEL = 6169, @@ -2160,7 +2159,6 @@ spv = { OpControlBarrierArriveINTEL = 6142, OpControlBarrierWaitINTEL = 6143, OpArithmeticFenceEXT = 6145, - OpArithmeticFenceINTEL = 6145, OpSubgroupBlockPrefetchINTEL = 6221, OpGroupIMulKHR = 6401, OpGroupFMulKHR = 6402, diff --git a/include/spirv/unified1/spirv.py b/include/spirv/unified1/spirv.py index e178cc613..8bdcd8458 100644 --- a/include/spirv/unified1/spirv.py +++ b/include/spirv/unified1/spirv.py @@ -1190,7 +1190,6 @@ 'BFloat16ConversionINTEL' : 6115, 'SplitBarrierINTEL' : 6141, 'ArithmeticFenceEXT' : 6144, - 'ArithmeticFenceINTEL' : 6144, 'FPGAClusterAttributesV2INTEL' : 6150, 'FPGAKernelAttributesv2INTEL' : 6161, 'FPMaxErrorINTEL' : 6169, @@ -2110,7 +2109,6 @@ 'OpControlBarrierArriveINTEL' : 6142, 'OpControlBarrierWaitINTEL' : 6143, 'OpArithmeticFenceEXT' : 6145, - 'OpArithmeticFenceINTEL' : 6145, 'OpSubgroupBlockPrefetchINTEL' : 6221, 'OpGroupIMulKHR' : 6401, 'OpGroupFMulKHR' : 6402, diff --git a/include/spirv/unified1/spv.d b/include/spirv/unified1/spv.d index 5eda89605..e94e8cd0e 100644 --- a/include/spirv/unified1/spv.d +++ b/include/spirv/unified1/spv.d @@ -1264,7 +1264,6 @@ enum Capability : uint BFloat16ConversionINTEL = 6115, SplitBarrierINTEL = 6141, ArithmeticFenceEXT = 6144, - ArithmeticFenceINTEL = 6144, FPGAClusterAttributesV2INTEL = 6150, FPGAKernelAttributesv2INTEL = 6161, FPMaxErrorINTEL = 6169, @@ -2230,7 +2229,6 @@ enum Op : uint OpControlBarrierArriveINTEL = 6142, OpControlBarrierWaitINTEL = 6143, OpArithmeticFenceEXT = 6145, - OpArithmeticFenceINTEL = 6145, OpSubgroupBlockPrefetchINTEL = 6221, OpGroupIMulKHR = 6401, OpGroupFMulKHR = 6402,